7 years agoregmap: Add tracepoints for cache only and cache bypass
Mark Brown [Thu, 23 Feb 2012 22:02:57 +0000]
regmap: Add tracepoints for cache only and cache bypass

Useful for figuring out where the hardware interaction went or came from.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 5d5b7d4f80ed6e861c1c220fd57e3dad0912526e)

Change-Id: Ie7c0659458a3a4a2f100d86db552c606d9da0e6b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96488
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoregmap: Mark the cache as clean after a successful sync
Mark Brown [Thu, 23 Feb 2012 22:05:59 +0000]
regmap: Mark the cache as clean after a successful sync

Previously the cache would never be marked clean, meaning syncs would
never be suppressed which isn't the end of the world but could be
inefficient.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 6ff7373809a9b4eb644d83e2e299da297e1cbffa)

Change-Id: I52aef73bc6bc0df10dd64da92d0bf591e44ddc0e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96487
Reviewed-by: Automatic_Commit_Validation_User

7 years agoregmap: Remove default cache sync implementation
Mark Brown [Thu, 23 Feb 2012 20:48:40 +0000]
regmap: Remove default cache sync implementation

It's not used as all cache types have sync operations so it's just dead
code which never gets tested.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit c3ec23288a92e20e0aff84a4cb6fbc7cc9bcf567)

Change-Id: I3ba8c8afee9a7c945dc0a52e87c9f4a357e79308
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96486
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoregmap: Skip hardware defaults for LZO caches
Mark Brown [Thu, 23 Feb 2012 20:11:58 +0000]
regmap: Skip hardware defaults for LZO caches

Saves some I/O when resyncing; we assume that syncs start from the device
reset state.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit a3c3774176838bbfa4f6e48133644903818e56dc)

Change-Id: Ib4471bd06856ccd2652f21dd0d9d51319df00939
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96485
Reviewed-by: Automatic_Commit_Validation_User

7 years agoregmap: Expose the driver name in debugfs
Dimitris Papastamos [Wed, 22 Feb 2012 14:20:09 +0000]
regmap: Expose the driver name in debugfs

Add a file called 'name' containing the name of the driver.

Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit f0c2319f9f196726ebe4d7508fd8fbd804988db3)

Change-Id: Id67e73cfd573a71377fe6bbc5c3068718822ef38
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96484
Reviewed-by: Automatic_Commit_Validation_User

7 years agoregmap: Add support for writing to regmap registers via debugfs
Dimitris Papastamos [Wed, 22 Feb 2012 12:43:50 +0000]
regmap: Add support for writing to regmap registers via debugfs

To enable writing to the regmap debugfs registers file users will
need to modify the source directly and #define REGMAP_ALLOW_WRITE_DEBUGFS.
The reason for this is that it is dangerous to expose this
functionality in general where clients could potentially be PMICs.

[A couple of minor style updates -- broonie]

Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 09c6ecd394105c4864a0e409e181c9b1578c2a63)

Change-Id: Ia9408880e25d5060796ab79812a023def00b10bc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96483
Reviewed-by: Automatic_Commit_Validation_User

7 years agoregmap: Support raw reads from cached registers
Mark Brown [Tue, 21 Feb 2012 19:12:47 +0000]
regmap: Support raw reads from cached registers

Fall back to a register by register read to do so; most likely we'll be
cache only so the overhead will be low.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit b8fb5ab156055b745254609f4635fcfd6b7dabc8)

Change-Id: I9f3b6011f4704987c5a014de8b30a2e6e3196d21
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96482
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoregmap: Allow users to query the size of register values
Mark Brown [Fri, 17 Feb 2012 22:20:14 +0000]
regmap: Allow users to query the size of register values

Generic infrastructure based on top of regmap may want to operate on
blocks of data and therefore find it useful to find the size of the
register values. Provide an accessor operation for this.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry-pick from mainline a6539c3

Change-Id: I455ace158eea38f6a92938f6330ec074bc18f0da
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96481
Reviewed-by: Automatic_Commit_Validation_User

7 years agoregmap: Implement support for 32 bit registers and values
Mark Brown [Fri, 17 Feb 2012 23:58:25 +0000]
regmap: Implement support for 32 bit registers and values

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 7d5e525b9ceda0e3b85da0acdaa2de19fea51edc)

Change-Id: I6f6fec44b439b4916eba7f32ece1fa011e3ac021
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/96480
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarch: arm: configs: Disable Custom Regulatory
Nitin Bindal [Wed, 11 Apr 2012 12:00:33 +0000]
arch: arm: configs: Disable Custom Regulatory

By default BCMDHD_CUSTOM_REGULATORY_DOMAIN is enabled.

Custom Regulatory domain(CRD) set by bcmdhd driver does not
enable 5GHz band scan. If we disable this config variable,
then CRD of driver will not be used and Kernel will use
default CRD which supports both 2.4 GHz and 5 GHz scan.
So, disable this config variable.

Bug 947472

Change-Id: I051db89cba38e2bb07eb716eec2e74611ad89f06
Signed-off-by: Nitin Bindal <nbindal@nvidia.com>
Reviewed-on: http://git-master/r/95850
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agodrivers: hwmon: tsensor: Enable tsensor hw reset
Joshua Primero [Wed, 28 Mar 2012 22:52:53 +0000]
drivers: hwmon: tsensor: Enable tsensor hw reset

Enabled hw reset in tsensor if temperature exceeds given
temperature limit.

bug 966994

Change-Id: I2444c97c97c45b2d190a224388876d592d983c7f
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/93030
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agoarm: tegra3: defconfig: Enable function tracer
Prashant Gaikwad [Thu, 29 Mar 2012 05:08:22 +0000]
arm: tegra3: defconfig: Enable function tracer

Bug 953102

Change-Id: I4ef0a32c10df7be63ca5f048eceecd222fa8a8ab
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/89721
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agodrivers: net: bcmdhd: enable CRD through kernel config
Nitin Bindal [Wed, 11 Apr 2012 10:37:00 +0000]
drivers: net: bcmdhd: enable CRD through kernel config

Enable Custom Regulatory Domain(CRD) support, only if
BCMDHD_CUSTOM_REGULATORY_DOMAIN kernel config is set.
By default BCMDHD_CUSTOM_REGULATORY_DOMAIN is enabled.

Bug 947472

Change-Id: I40ea3c3c531d4e309c0928db396b9cc832be43cc
Signed-off-by: Nitin Bindal <nbindal@nvidia.com>
Reviewed-on: http://git-master/r/88266
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: fuse: Use module_param_cb
Juha Tukkinen [Tue, 10 Apr 2012 12:14:29 +0000]
ARM: tegra: fuse: Use module_param_cb

Use module_param_cb instead of obsolete module_param_call.

Change-Id: I25a86cfa0782e373b82eb58f92058ff6a38fdcba
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/95646
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agovideo: tegra: nvavp: Remove T30 A01 workaround
Juha Tukkinen [Tue, 10 Apr 2012 11:06:11 +0000]
video: tegra: nvavp: Remove T30 A01 workaround

Remove CONFIG_TEGRA_SMMU_BASE_AT_E0000000 workaround as T30 A01 is no
longer supported.

Change-Id: Ic47d0aa16c555bd7821416fff29d723924c6118b
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/95645
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoARM: tegra: common: Remove T30 A01 SMMU workaround
Juha Tukkinen [Tue, 10 Apr 2012 10:53:21 +0000]
ARM: tegra: common: Remove T30 A01 SMMU workaround

Remove CONFIG_TEGRA_SMMU_BASE_AT_E0000000 workaround as T30 A01 is no
longer supported.

Change-Id: I0ba6c838984e3c3ec401057925727c9596a8075f
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/95644
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoarch: ARM: Tegra: removing the akm8975 driver
Ramalingam C [Tue, 10 Apr 2012 12:03:12 +0000]
arch: ARM: Tegra: removing the akm8975 driver

Undefining the config variable CONFIG_SENSORS_AK8975, since we are
using drivers/misc/inv_mpu/compass/ak8975.c as compass driver.

Bug 965154

Change-Id: Ie6ca5b08cee9dba5375457f39d52ae9ebf97ddf9
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/95636
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: clock: Update common clock table
Alex Frid [Tue, 10 Apr 2012 00:13:14 +0000]
ARM: tegra: clock: Update common clock table

- Moved table entries for always running core clocks on the top of
the table (this way we guarantee that changing parent of such clock
down the road would automatically enable new parent).

- Removed unnecessary pll_a and pll_a_out0 entries (effectively they
are "NOP") - actual audio configuration is done in per-board tables.

- Removed unnecessary pll_c and pll_c_out1 entries for emulation
platforms

Change-Id: I8327d6313804419405dd93af08f369db02fcbf25
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/95465
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoarm: tegra: enterprise: Firmware update support for pn544
Mohan T [Tue, 10 Apr 2012 12:41:25 +0000]
arm: tegra: enterprise: Firmware update support for pn544

Enable firmware GPIO for board E1205 with fab A03 or A04.

Bug 959290

Change-Id: Ide17c4e6dcda8c2c9690f581b8714486a3c4e532
Signed-off-by: Mohan T <mohant@nvidia.com>
Reviewed-on: http://git-master/r/95389
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: power: Cancel hotplug work upon disable
Antti P Miettinen [Fri, 6 Apr 2012 11:21:26 +0000]
ARM: tegra: power: Cancel hotplug work upon disable

Cancel hotplug work when auto hotplug gets disabled to prevent
e.g. cpu_up() getting called in LP cluster.

Bug 965777

Change-Id: I058fe6a5e0c2fd3203ce9bc951d0973b60e033e0
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/95076
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agotracing: Add tracepoints for cluster switch
Antti P Miettinen [Mon, 2 Apr 2012 11:27:21 +0000]
tracing: Add tracepoints for cluster switch

Simple trace points for measuring cluster switch latencies.

Bug 958262

Change-Id: Ia1e5e13131d5e55aaa0a44e9e8b5196539df54e7
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/93841
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agoarm: tegra: xmm: CP wakeup and system suspend
Seshendra Gadagottu [Thu, 29 Mar 2012 21:04:43 +0000]
arm: tegra: xmm: CP wakeup and system suspend

To handle race condition between CP wakeup and system suspend
following policy enforced:
1. If system suspend happens first, then buffer the CP wake
   request and will abort the suspend at the end of device suspend
   complete.
2. If CP wakeup happens first, then system suspend starts then abort
   the system suspend immediately.

Bug 938553
Bug 948198
Bug 943035

Signed-off-by: Seshendra Gadagottu<sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/83130
(cherry picked from commit b2bd06368d3f6e16e5a7dd81c76dda0293de301b)

Change-Id: Ic7024aa739472a666f1274ccd7c9722259d54fa5
Reviewed-on: http://git-master/r/93384
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Tested-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

7 years agotracing: Add tracepoints for CPU scaling
Antti P Miettinen [Thu, 29 Mar 2012 04:14:40 +0000]
tracing: Add tracepoints for CPU scaling

Simple tracepoints for measuring CPU scaling latencies.

Bug 960307

Change-Id: I6fd4e67e352a2ff134da58866d943457506d080b
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/93080
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agotracing: Add tracepoints for hotplug
Antti P Miettinen [Wed, 28 Mar 2012 17:42:55 +0000]
tracing: Add tracepoints for hotplug

Simple trace points for measuring hotplug up/down times.

Bug 960310

Change-Id: I1927aae6edb74cba7ca3e9522d138407b48325dc
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/92920
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Satya Popuri <spopuri@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agousb: host: tegra: regrouping ehci functions
Venu Byravarasu [Thu, 29 Mar 2012 10:08:44 +0000]
usb: host: tegra: regrouping ehci functions

Re-arranged standard and modified ehci functions into
two separate groups, for more readability

Change-Id: I320a50ed44c3f0990692ae38b55dc6a04fe7c378
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/92823
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agousb: cdc_ether: Add new product id for the 5AE profile
Jonathan Roux [Tue, 24 Jan 2012 15:33:16 +0000]
usb: cdc_ether: Add new product id for the 5AE profile

Bug 924863

Change-Id: I10d3036ce19f8c1f37e57998c204f3a72bd42f85
Signed-off-by: Steve Lin <stlin@nvidia.com>
Reviewed-on: http://git-master/r/89718
Reviewed-by: Automatic_Commit_Validation_User

7 years agomisc: tegra-cryptodev: Enhancement to support user space tests
vjagadish [Fri, 9 Dec 2011 04:15:56 +0000]
misc: tegra-cryptodev: Enhancement to support user space tests

Enchancement to support user space tests such as OFB, CTR, sha1,
sha224,sha256, sha384, sha512.

BUG 903375

Change-Id: I52767978bd3758671ec6fff988223ac046f5579c
Reviewed-on: http://git-master/r/84296
Tested-by: Venkata Jagadish <vjagadish@nvidia.com>
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agovideo: tegra: fb: Add interface to nvdps.
Kevin Huang [Tue, 10 Apr 2012 01:03:51 +0000]
video: tegra: fb: Add interface to nvdps.

Provide /sys/class/graphics/fb0/device/nvdps to change video mode
on-the-fly without resetting window layout like fb_set_var(). This
allows flicker free changes in refresh rate.

nvdps sysfs file takes an integer, and selects the closest matching mode
with the same or higher refresh rate. Reading the file displays the
current refresh rate.

Bug 560152

Change-Id: Id5c1eafaf338b99fa9742202b38ccbfc238b77d5
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/95473
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

7 years agoARM: tegra: cardhu: add multiple LCD modes
Jon Mayo [Thu, 22 Mar 2012 00:25:23 +0000]
ARM: tegra: cardhu: add multiple LCD modes

Add 50Hz and 48Hz refresh modes on internal panel.
Choose pll_d as default for internal panel.
Choose pll_d2 as default for HDMI output.
Print a warning when touch panel work around code is being used.

Bug 560152

Change-Id: Ia155e02b4fdc4ea3a749c3f1e9edea94786441ba
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/94890
Reviewed-by: Automatic_Commit_Validation_User

7 years agovideo: tegra: dc: load video mode during vblank
Jon Mayo [Fri, 16 Mar 2012 19:50:59 +0000]
video: tegra: dc: load video mode during vblank

Handle mode set for FBIOPUT_VSCREENINFO at the end of a frame (during
vblank). This elimiates the work around that requires disabling then
enabling display to change modes.
Adds a spinlock to protect irq code from updates to tegra_dc_mode structure.

Bug 560152

Change-Id: I5d2175f01a177a32d685b46e5af4f78efeec0786
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/90688
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: resolve compilation time warnings
Sanjay Singh Rawat [Thu, 29 Mar 2012 06:49:38 +0000]
video: tegra: resolve compilation time warnings

bug 949219

Change-Id: I1ed8d08de4bdba4643b2ae4e8320db6f9c97a18f
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/92310
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoarm: tegra20: pm: Reduce CPU min voltage to 0.8V
Prashant Gaikwad [Tue, 3 Apr 2012 06:11:19 +0000]
arm: tegra20: pm: Reduce CPU min voltage to 0.8V

Bug 955718

Reviewed-on: http://git-master/r/94164
(cherry picked from commit 1be4c3a94dd95a9c0fae2317983b0d7e44e39a1f)

Reviewed-on: http://git-master/r/94407
(cherry picked from commit 00799dbe21f5835b729f2fe9fcf95f30aa0b149f)

Change-Id: I909a15ead2d4ecb3dc416b8d3863fa8cb3645501
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/94164
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: cardhu: integrate latest mem tables
Ray Poudrier [Fri, 23 Mar 2012 06:12:47 +0000]
ARM: tegra: cardhu: integrate latest mem tables

Bug 918704

Change-Id: I83bdce136df07d744c69a75a38bb5ae1d541055e
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/91935
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: dvfs: optimized bin0 entries
Prashant Gaikwad [Tue, 11 Oct 2011 11:58:17 +0000]
arm: tegra: dvfs: optimized bin0 entries

Updated optimized bin0 entries for AP25 CPU dvfs.

Bug 955718
Bug 643434

Reviewed-on: http://git-master/r/57303
(cherry picked from commit 6e5c759fcdfcdf4d1306fe5c9e33bf2dd5458076)

Reviewed-on: http://git-master/r/94406
(cherry picked from commit 61317b2ed1a259d5c0460aec8bc1d9f4e2275922)

Change-Id: I84cccfde1c0fa292c64a9acd2c96643416f00735
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/90306
Reviewed-by: Automatic_Commit_Validation_User

7 years agopower: max17048: correct i2c error handling
Chandler Zhang [Sat, 31 Mar 2012 09:14:31 +0000]
power: max17048: correct i2c error handling

Correct max17048_read_word() function related i2c error handling

Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/93702
(cherry picked from commit ba8bdc020c6e2ed57255786b3d61b870b0b5a516)

Change-Id: Ice9845bb39288442bd6637eedeaf6de6ad1acbda
Reviewed-on: http://git-master/r/95346
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chandler Zhang <chazhang@nvidia.com>
Tested-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Tested-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agopower: max17048: addition of new properties
Syed Rafiuddin [Wed, 4 Apr 2012 06:04:02 +0000]
power: max17048: addition of new properties

Addition of health and capacity level properties

Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/93532
(cherry picked from commit 9892e1c30828bdcbf6ae53af72bb1a39cd19993e)

Change-Id: I28e9822772316ba7389a3c9518cf4778606dbfb7
Reviewed-on: http://git-master/r/95345
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chandler Zhang <chazhang@nvidia.com>
Tested-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Tested-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

7 years agoarm: tegra: whistler: use common platform data struct
Ravindra Lokhande [Fri, 6 Apr 2012 14:25:01 +0000]
arm: tegra: whistler: use common platform data struct

Change-Id: I46e81bf2ad285433e61c3a1bc7f5e1c9aca655fa
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/95102
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoasoc: wm8753 machine: use common platform data
Ravindra Lokhande [Fri, 6 Apr 2012 14:22:23 +0000]
asoc: wm8753 machine: use common platform data

use common platform data for machine driver

Change-Id: I90e0d2f47aed46da650305d98f6525287adfaf04
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/95101
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agovideo: tegra: dtv: Remove check for dma req list before cancelling
Laxman Dewangan [Fri, 6 Apr 2012 13:17:06 +0000]
video: tegra: dtv: Remove check for dma req list before cancelling

Removing the checking whether dma req queue is empty or not
before canceling/stopping dma.
This function cannot guarantee correct result as there may be the
race between hw and sw status update.
If client wants to cancel dma req, it can directly call tegra_dma_cancel().

As the function tegra_dma_is_empty() does not return correct result,
it will be depreciated from the dma apis.

Change-Id: I3f5ebee8a7be345b02fcd8a69530c9b53207ef28
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/95090
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agoconfig: tegra[3]: enable devtmpfs
Mursalin Akon [Wed, 4 Apr 2012 16:15:08 +0000]
config: tegra[3]: enable devtmpfs

Enable devtmpfs to allow init of
Ubuntu 12.04/Debian Sid/Fedora 17 to
continue booting successfully.

Bug 948495

Change-Id: Ia43f79cae31964c8a6bb76d1a936fd70e6038b53
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/94556
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoregulator: max8907: Add driver specific data for regulator
Alok Chauhan [Fri, 17 Feb 2012 09:47:38 +0000]
regulator: max8907: Add driver specific data for regulator

Adding the regulator driver specific information and passing
this information through regulator driver data. This struture
is containing delay operation which is require to voltage to
be settle down after enabling rail.

Bug 939242

Change-Id: I7da6ec487fe5f04857d3fd5f06a383b4a8fbcc7b
Signed-off-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-on: http://git-master/r/94500
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoarm: tegra: Add delay support in regulator
Alok Chauhan [Fri, 17 Feb 2012 09:41:01 +0000]
arm: tegra: Add delay support in regulator

bug 939242

Change-Id: I552c664fbac5519cc97593ebec3884f716158887
Signed-off-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-on: http://git-master/r/94499
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agovideo: tegra: host: move resources to devices
Mayuresh Kulkarni [Tue, 3 Apr 2012 06:32:20 +0000]
video: tegra: host: move resources to devices

- as of now the resources needed by all the host1x
modules are part of resource list of host1x device
- now that each module is a nvhost_device of its own,
so it should hold the resources it needs instead of
host1x device holding it for them
- each device that needs its resources gets it in its
_probe() using a helper API in bus_client.c

Bug 871237

Change-Id: Ia7c63fcf40cbc5db76d4d8339294a0e9ce75e352
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/94166
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agonvavp: Add ioctl for wake_avp
Mandar Potdar [Mon, 2 Apr 2012 14:06:05 +0000]
nvavp: Add ioctl for wake_avp

Add wake_avp ioctl which provides way for user-mode driver to
simply wake-up the AVP.

bug 914504

Change-Id: I3075ba944d39749559f2c340a4851902821c344f
Signed-off-by: Mandar Potdar <mpotdar@nvidia.com>
Reviewed-on: http://git-master/r/93877
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Gajanan Bhat <gbhat@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoarm: tegra: p1852: Use GMI to untristate gpio X5/6
Amlan Kundu [Mon, 9 Apr 2012 10:39:39 +0000]
arm: tegra: p1852: Use GMI to untristate gpio X5/6

Using SPI1/SPI2 as initial pinmux for gpio X5/6 affecting spi
controller. GMI A26/27 can be pinmuxed for SPI1_CS0 and SPI1_SCK balls.
It will not affect GMI behavior because A26/27 presently not used on
p1852.

bug 927551
bug 875873

Reviewed-on: http://git-master/r/90551
(cherry-picked from 8b0123f835a671072b23abbe4fdb9d9aa16463cb)

Change-Id: If39c93daa7d1b73777b56c729b0c9b9149770440
Signed-off-by: Amlan Kundu <akundu@nvidia.com>
Reviewed-on: http://git-master/r/92499
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Gerrit_Virtual_Submit

7 years agoarm: tegra: Change DDC freq to 10KHz
Hao Tang [Wed, 7 Mar 2012 09:21:08 +0000]
arm: tegra: Change DDC freq to 10KHz

Bug 949759

Reduce DDC freq. The original freq is 100KHz, but some edid communication
at this rate on some monitors like acer H243HX may fail

Change-Id: Ib087025a35ff085b4bf618b70100fe6670c3eaec
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/88261
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoRevert "video: tegra: dc: Disable 1080p stereo support"
Andrija Bosnjakovic [Tue, 24 Jan 2012 08:59:56 +0000]
Revert "video: tegra: dc: Disable 1080p stereo support"

This reverts commit 75009bc2b1a0a2d2efbe1d166647e789b8a1b9f1.

In order to work around bug 869099,
this mode has been temporarily disabled.

Since the bug is not so visible, enable again.

Change-Id: Ie71dac4ecf620cd96796e2fde361b45dc7141497
Reviewed-on: http://git-master/r/92157
Reviewed-by: Alok Ahuja <alahuja@nvidia.com>
Reviewed-by: Aleksandar Odorovic <aodorovic@nvidia.com>
Reviewed-by: Dhiren Bhatia <dbhatia@nvidia.com>
Reviewed-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com>
Tested-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

7 years agoasoc: aic326x machine: use common platform data
Ravindra Lokhande [Fri, 6 Apr 2012 13:09:57 +0000]
asoc: aic326x machine: use common platform data

replace platform specific data with common platform data

Change-Id: Ie34b9b9288bf76a004db0bcdf4fd59845e0c9d71
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/95083
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoASoC: max98095 codec: check return value
Ravindra Lokhande [Fri, 6 Apr 2012 12:55:30 +0000]
ASoC: max98095 codec: check return value

check max98095_reset() return value, this function fails if codec
read/write fails.

Change-Id: I4dddd75e0870e4168288396a462133f7287ad72e
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/95078
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoarm: tegra: kai: enable correct gpio for NFC
Rakesh Goyal [Fri, 6 Apr 2012 08:06:49 +0000]
arm: tegra: kai: enable correct gpio for NFC

Bug 960069

Change-Id: Id7559b7b8a74f8ec0b5e127b8986c075fab21d59
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/95037
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: usb_phy: Fix remote wakeup issue during LP0
Rakesh Bodla [Tue, 3 Apr 2012 09:08:25 +0000]
ARM: tegra: usb_phy: Fix remote wakeup issue during LP0

Sleep walk settings for remote wakeup are set properly to detect
remote wakeup events

Bug 963900

Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
(cherry picked from commit fd9ccb33d91e0aaf0619ec065e1ba7ee52edf1bd)
Change-Id: I7c52d45901ce522c51570bdd84513fbbb6c93911
Reviewed-on: http://git-master/r/94892
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agousb: ehci: tegra: Fix tegra utmip issues
Rakesh Bodla [Tue, 3 Apr 2012 06:50:09 +0000]
usb: ehci: tegra: Fix tegra utmip issues

Following tegra USB UTMIP issues are fixed:
1. Clear run bit directly in the command
register instead of updating the shadow variable.
2. Reset EHCI while resuming from LP0 for
tegra 2.
3. Wait for 25ms to ensure port is resumed.

Bug 912880

Reviewed-on: http://git-master/r/92565
(cherry picked from commit 928ad32858af191fb9d90d736b910499121e10df)
Change-Id: I676f7f23fd8833a179e1670e6aed28a01baaf15b
Reviewed-on: http://git-master/r/94829
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agoARM: tegra: usb_phy: Fix tegra 2 utmip issues
Rakesh Bodla [Mon, 2 Apr 2012 07:00:59 +0000]
ARM: tegra: usb_phy: Fix tegra 2 utmip issues

Following tegra 2 UTMIP issues are fixed:
1. Remove unnecessary register programming
for tegra 2 while enable/disable OBS bus.
2. Clear run bit while disabling OBS bus.

Bug 912880

Reviewed-on: http://git-master/r/92564
(cherry picked from commit f2d53530033f30104effd35deec4606303b89918)
Change-Id: I441cc6a180c434b6a4e7880729676bb849fb15fb
Reviewed-on: http://git-master/r/94828
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agoARM: defconfig: fix kernel build of p852
Vishal Singh [Wed, 4 Apr 2012 09:46:56 +0000]
ARM: defconfig: fix kernel build of p852

Enable CONFIG_TEGRA_GRHOST and CONFIG_MMC_SDHCI_PLTFM to fix
kernel build and enable SD/MMC respectively.

Bug 938667.
Bug 949584.

Change-Id: I649445da96b34c02d1142a1f801bbc0039e81c6c
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/94222
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoASoC: Tegra: customize modem parameters for voice call.
Ankit Gupta [Thu, 29 Mar 2012 05:28:56 +0000]
ASoC: Tegra: customize modem parameters for voice call.

Add support to customize modem parameters for voice call.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>

Change-Id: I947bf1955713c4ae19e5dd829091bd7e51bca08f
Reviewed-on: http://git-master/r/93091
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Ankit Gupta (Engrg-SW) <ankitgupta@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoARM: tegra: emc: Reduce DDR3 min rate to 25.5MHz
Daniel Solomon [Mon, 19 Mar 2012 18:45:03 +0000]
ARM: tegra: emc: Reduce DDR3 min rate to 25.5MHz

Reduce DDR3 min rate to 25.5MHz to save power.

Bug 947228

Signed-off-by: Daniel Solomon <daniels@nvidia.com>
(cherry picked from commit f09e23ac983a24d9ba03a11764b871b9d548f4dc)
Change-Id: I4cd19099943cfa06d7fe7cca308042c44e708748
Reviewed-on: http://git-master/r/93958
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

7 years agoasoc: tegra: ALC5640 machine: Fix ext mic detect issue
Manoj Gangwal [Fri, 16 Mar 2012 13:25:26 +0000]
asoc: tegra: ALC5640 machine: Fix ext mic detect issue

Enable/disable the ext mic depending on the jack notification
for insertion/removal comes.This is done to save the Audio power.

Bug 955019

Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
(cherry picked from commit 7a22037fd4a274637a5bdb18a8c5452fe58aad32)
Change-Id: I1a8b47c4e9c424a914f546b48c86a6fb07d8e42a
Reviewed-on: http://git-master/r/93956
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoasoc: tegra: ALC5640 machine: Turn off ext_mic by default
Daniel Solomon [Mon, 12 Mar 2012 22:55:16 +0000]
asoc: tegra: ALC5640 machine: Turn off ext_mic by default

Drive ext mic gpio (active low) to 1 during init. It will
be toggled as needed by ext mic events.

Bug 949026

Signed-off-by: Daniel Solomon <daniels@nvidia.com>
(cherry picked from commit de806c193fde5cd8c5b0285efeeaef4adb7be611)
Change-Id: Idd72830d89ebe080739694d7f2c8f6ad80d5cdf5
Reviewed-on: http://git-master/r/93955
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoconfig: rename+move bcm4329 nvram file
Mursalin Akon [Wed, 4 Apr 2012 18:20:56 +0000]
config: rename+move bcm4329 nvram file

bcm43330 nvram file is located as
/lib/firmware/nvram_4330.txt.
Make the name convension and location
the same for bcm4329 nvram file.

Bug 953186

Change-Id: Id1a606b341302dbef98f9edb481c18a8f3b3617d
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/94571
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoasoc: codecs: Enable bias off when idle for rt5639 and rt5640
Daniel Solomon [Thu, 22 Mar 2012 01:38:22 +0000]
asoc: codecs: Enable bias off when idle for rt5639 and rt5640

Allow bias off in order to turn off clock extern1 when codec
is not used.

Bug 957635

Signed-off-by: Daniel Solomon <daniels@nvidia.com>
(cherry picked from commit adc6929ab3170acd6a0b2cee4f65fa20a1c1d30f)
Change-Id: I4f2e91b0cd9bb4516a5722d2df268f08e78f92e2
Reviewed-on: http://git-master/r/93949
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

7 years agovideo: tegra: dc: avoid overflow in bw calculation
Jon Mayo [Tue, 27 Mar 2012 20:55:31 +0000]
video: tegra: dc: avoid overflow in bw calculation

Change to using kbytes/sec to avoid overflowing 32-bit integer in
bandwidth calculation.
Changing efficiency adjustment to ~35%.

Bug 958016

Change-Id: Ia8bdf79e4b3e4bc65517db18d9f351a5f840805e
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/92658
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: Fix calling ipi_timer() from local timer IRQ
Antti P Miettinen [Wed, 4 Apr 2012 17:59:52 +0000]
ARM: Fix calling ipi_timer() from local timer IRQ

Commit d4c9c46147102dfc403691ed52609ae36ba5df08 moved
irq_enter()/irq_exit() calls around. This caused
irq_enter()/irq_exit() for ipi_timer() to be missing
when ipi_timer() was called from local timer IRQ.
Add the missing calls.

Bug 961231

Change-Id: I32bfdf2620ca3df31d90f16924b06f4a1e24c0b7
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/94566
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: host: Move context init outside __init
Terje Bergstrom [Thu, 29 Mar 2012 12:23:28 +0000]
video: tegra: host: Move context init outside __init

Context handler init functions are referred to from non-init section.
The functions should not have __init attribute, even though they're
only used in init time.

Change-Id: I1b6bca48504fd7989edaa037c4b022a76244b0f6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/93216
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agoARM: 7133/1: SMP: fix per cpu timer setup before the cpu is marked online
Thomas Gleinxer [Fri, 14 Oct 2011 11:44:41 +0000]
ARM: 7133/1: SMP: fix per cpu timer setup before the cpu is marked online

The problem is related to the early enabling of interrupts and the
per cpu timer setup before the cpu is marked online. This doesn't
need to be done in order to call calibrate_delay().

calibrate_delay() monitors jiffies, which are updated from the CPU
which is waiting for the new CPU to set the online bit.

So simply calibrate_delay() can be called on the new CPU just from
the interrupt disabled region and move the local timer setup after
stored the cpu data and before enabling interrupts.

This solves both the cpu_online vs. cpu_active problem and the
affinity setting of the per cpu timers.

Change-Id: I3ce734e674715f59d057a76821fc5f93706b875f
Signed-off-by: Thomas Gleinxer <tglx@linutronix.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/87227
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: SMP: wait for CPU to be marked active
Russell King [Mon, 20 Jun 2011 15:46:01 +0000]
ARM: SMP: wait for CPU to be marked active

When we bring a CPU online, we should wait for it to become active
before entering the idle thread, so we know that the scheduler and
thread migration is going to work.

Change-Id: I0fa128768f575ddd0a5d976be66869dbd88f355e
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/87226
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra20: pm: flush L1 data before exit coherency
Prashant Gaikwad [Tue, 27 Mar 2012 12:10:35 +0000]
ARM: tegra20: pm: flush L1 data before exit coherency

Bug 934368

Change-Id: I960d8ae5c6390e719b8ee6c9cbc067cf8d28122d
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/92543
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

7 years agoARM: tegra30: pm: flush L1 data before exit coherency on secondary CPU
Varun Wadekar [Tue, 27 Mar 2012 10:47:20 +0000]
ARM: tegra30: pm: flush L1 data before exit coherency on secondary CPU

Change-Id: Ib16ee5efdf8686d750a5263baa8fff4d258e68cd
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/92542
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: rethink the cpu suspend-resume code path
Varun Wadekar [Fri, 30 Mar 2012 04:13:40 +0000]
ARM: tegra: rethink the cpu suspend-resume code path

The current kernel methodology expects that tegra_cpu_suspend
is actually the last function in the entire suspend sequence.

In order to achieve this, the code needs to be remodelled a
bit so that we actually execute native cpu_suspend at the end
of the suspend sequence. This allows us to leverage all the
cpu_suspend code developed by ARM in the upstream kernels.

Bug 934368

Change-Id: I94172d7adaa54c10043c479a57b270925d85a16b
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/84481
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: remove usage of USE_TEGRA_CPU_SUSPEND
Varun Wadekar [Tue, 27 Mar 2012 11:58:00 +0000]
ARM: tegra: remove usage of USE_TEGRA_CPU_SUSPEND

Bug 934368

Change-Id: Ic9d75cbb0c324b1858b2e476e33dd4f96349bce3
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/86351
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoRevert "ARM: tegra: power: Workaround PMD corruption by cpu_resume_mmu"
Dan Willemsen [Wed, 2 Nov 2011 23:49:01 +0000]
Revert "ARM: tegra: power: Workaround PMD corruption by cpu_resume_mmu"

This reverts commit 48565a367997c1748c655bc834e06b348d4e5b2c.

Change-Id: I0e1411f1260ae916c510478276d88b41416a0d42
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85670
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: pm: add L2 cache cleaning for suspend
Russell King [Thu, 1 Sep 2011 10:57:59 +0000]
ARM: pm: add L2 cache cleaning for suspend

We need to ensure that state is pushed out from the L2 cache when
suspending so that the resume paths can access their data before the
MMU and caches have been re-initialized.  Add the necessary calls to
__cpu_suspend_save().

Change-Id: Idf7516347478731b722e62a37b5cc9f1c52be68e
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85729
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: pm: convert some assembly to C
Russell King [Thu, 1 Sep 2011 10:52:33 +0000]
ARM: pm: convert some assembly to C

Convert some of the sleep.S guts to C code, which makes it easier to
use our macros and to add L2 cache handling.  We provide a helper
function, __cpu_suspend_save(), which deals with saving the common
state, setting up for resume, and flushing caches.

The remainder left as assembly code is the saving of the CPU general
purpose registers, and allocating space on the stack to save the CPU
specific registers and resume state.

Change-Id: I0e8bc196fa7302cfe52c17d39675dadf25ea1004
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85728
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: pm: no need to save/restore context ID register
Russell King [Sun, 28 Aug 2011 09:30:34 +0000]
ARM: pm: no need to save/restore context ID register

There is no need to save and restore the context ID register on ARMv6
and ARMv7 with a temporary page table as we write the context ID
register when we switch back to the real page tables for the thread.

Moreover, the temporary page tables do not contain any non-global
mappings, so the context ID value should not be used.  To be safe,
initialize the register to a reserved context ID value.

Change-Id: I7de05e736dde5bc1b8ab682a8660eaaba52104cf
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85727
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: pm: get rid of cpu_resume_turn_mmu_on
Russell King [Wed, 31 Aug 2011 22:26:18 +0000]
ARM: pm: get rid of cpu_resume_turn_mmu_on

We don't require cpu_resume_turn_mmu_on as we can combine the ldr
instruction with the following code provided we ensure that
cpu_resume_mmu is aligned for older CPUs.  Note that we also align
to a 32-byte boundary to ensure that the code can't cross a section
boundary.

Change-Id: I356eeff464eec48d167d98ee45b80b300d7c4c99
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85726
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: pm: only use preallocated page table during resume
Varun Wadekar [Tue, 27 Mar 2012 11:56:39 +0000]
ARM: pm: only use preallocated page table during resume

Only use the preallocated page table during the resume, not while
suspending.  This avoids the overhead of having to switch unnecessarily
to the resume page table in the suspend path.

Change-Id: Ib71c9b60b0ec39749aadc6f592549d213e6a852e
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85725
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: pm: preallocate a page table for suspend/resume
Russell King [Fri, 26 Aug 2011 19:28:52 +0000]
ARM: pm: preallocate a page table for suspend/resume

Preallocate a page table and setup an identity mapping for the MMU
enable code.  This means we don't have to "borrow" a page table to
do this, avoiding complexities with L2 cache coherency.

Change-Id: I625d3622359e961e4f358171e9a82b51bcecf9c2
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85671
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: pm: force non-zero return value from __cpu_suspend when aborting
Russell King [Sat, 27 Aug 2011 10:17:36 +0000]
ARM: pm: force non-zero return value from __cpu_suspend when aborting

Ensure that the return value from __cpu_suspend is non-zero when
aborting.  Zero indicates a successful suspend occurred.

Change-Id: I53afba30ecd8a34ea16f39eaafa07e7b0c127e64
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85669
Reviewed-by: Automatic_Commit_Validation_User

7 years agoconfig: tegra[3]: remove trailing /
Mursalin Akon [Wed, 4 Apr 2012 16:22:24 +0000]
config: tegra[3]: remove trailing /

Remove the trailing / from bcmdhd firmware path.

Change-Id: I76e415784cd29bf2551b36c236d84bcbbc5bda1b
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/94557
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: Enterprise: Provide settling time for 3.3 Voltage rail
Chaitanya Bandi [Wed, 4 Apr 2012 14:44:39 +0000]
ARM: tegra: Enterprise: Provide settling time for 3.3 Voltage rail

It is observed that voltage rails for 3V3 is taking around 400us
for setting it output. Providing the startup delay of 500us for this
rail so that rails are stablized at desired level before any consumer
uses that rail.

Bug 959902

Change-Id: I602b428db44d595a94d69fccb3340a77c3819a3b
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/94537
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agolib: devres: add convenience function to remap a resource
Wolfram Sang [Tue, 25 Oct 2011 13:16:47 +0000]
lib: devres: add convenience function to remap a resource

Almost every platform_driver does the three steps get_resource,
request_mem_region, ioremap. This does not only lead to a lot of code
duplication, but also a huge number of similar error strings and
inconsistent error codes on failure. So, introduce a helper function
which simplifies remapping a resource and make it hard to do something
wrong and add documentation for it.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
(cherry picked from mainline commit
72f8c0bfa0de64c68ee59f40eb9b2683bffffbb0)

Change-Id: I600c5200104e234d42ca396e50853133b3ab4b1f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94533
Reviewed-by: Automatic_Commit_Validation_User

7 years agodmaengine: add context parameter to prep_slave_sg and prep_dma_cyclic
Alexandre Bounine [Thu, 8 Mar 2012 20:35:13 +0000]
dmaengine: add context parameter to prep_slave_sg and prep_dma_cyclic

Add context parameter to device_prep_slave_sg() and device_prep_dma_cyclic()
interfaces to allow passing client/target specific information associated
with the data transfer.
Modify all affected DMA engine drivers.

Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>

Cherry-picked from mainline
185ecb5f4fd43911c35956d4cc7d94a1da30417f

Change-Id: Ief79d20f6e9d367ee2b530d08df72864fb16895a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94464
Reviewed-by: Automatic_Commit_Validation_User

7 years agodmaengine/dma_slave: introduce inline wrappers
Alexandre Bounine [Thu, 8 Mar 2012 21:11:18 +0000]
dmaengine/dma_slave: introduce inline wrappers

Add inline wrappers for device_prep_slave_sg() and device_prep_dma_cyclic()
interfaces to hide new parameter from current users of affected interfaces.
Convert current users to use new wrappers instead of direct calls.
Suggested by Russell King [https://lkml.org/lkml/2012/2/3/269].

Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>

cherry-picked from mainline commit
16052827d98fbc13c31ebad560af4bd53e2b4dd5

Change-Id: I929a49556539621a0546829e88b3caa498c94be2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94463

7 years agodmaengine: add new enum dma_transfer_direction
Vinod Koul [Thu, 13 Oct 2011 09:45:27 +0000]
dmaengine: add new enum dma_transfer_direction

This new enum removes usage of dma_data_direction for dma direction. The new
enum cleans tells the DMA direction and mode
This further paves way for merging the dmaengine _prep operations and also for
interleaved dma

Suggested-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Cherry-picked from mainline
49920bc66984a512f4bcc7735a61642cd0e4d6f2

Change-Id: Ia554f0635e46d98aac4899d369533b8b4f7dd294
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94462
Reviewed-by: Automatic_Commit_Validation_User

7 years agoarm: tegra: turn off pll-a/p in LP1
Mayuresh Kulkarni [Fri, 24 Feb 2012 14:05:36 +0000]
arm: tegra: turn off pll-a/p in LP1

- current code does not turn off pll-a/p in LP1
irrespective of voice call status
- add a new flag to indicate voice call on-going
- use PMC_SCRATCH37 to hold this flag
- if it is set, do not turn-off pll-a/p during LP1
- save-restore PMC_SCRATCH37 if it was used to hold the
voice call on-going flag
- fix few misc formatting issues in tegra3_cpu_clk32k

Bug 924817

Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/85768
(cherry picked from commit 7853981c987ae329620bb54d869016cb74a6c054)

Change-Id: Id5348d2eb44a4bacaf00f6d17edceedaef819e29
Reviewed-on: http://git-master/r/94395
Tested-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agotegra_audio: add default implementation for tegra_is_voice_call_active()
Mayuresh Kulkarni [Mon, 26 Mar 2012 12:48:54 +0000]
tegra_audio: add default implementation for tegra_is_voice_call_active()

- mods kernel do not enable audio related configs in kernel
- tegra_is_voice_call_active() is defined only when audio
related configs are enabled
- this commit adds a default implementation for tegra_is_voice_call_active()
which can be called from generic pm code in mach-tegra
- it also makes the default implementation inline

Bug 924817

Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/92312
(cherry picked from commit 1b7507db6f2266d5cac10fcd4b3e7b06f6d2f3bd)

Change-Id: I286237b838c39cf5c7784c014459bdcaf50c31ef
Reviewed-on: http://git-master/r/94394
Tested-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: p852: fix kernel boot
Vishal Singh [Tue, 3 Apr 2012 12:15:02 +0000]
ARM: tegra: p852: fix kernel boot

CSUS clock can't be driven from any clk other than clk_m. So
updating its parent to clk_m.
Removing pll_m's entry as it's already enabled and running at
666 MHz which is our requirement.
Removing tegra_init_suspend() as it's not needed on p852.

Bug 938667.
Bug 949584.

Change-Id: Id62401de11d213d4e0b87b52fe30e2b37372bbea
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/94237
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoRegulator: gpio_swtich: Remove gpio_switch regulator driver
Laxman Dewangan [Tue, 3 Apr 2012 09:02:16 +0000]
Regulator: gpio_swtich: Remove gpio_switch regulator driver

The gpio_switch regulator is NV driver developed during
tegra3 bringup time. The driver functionality is upstreamed
to mainline into fixed regulator and it is accepted by community.
The required functionality is also downstream and required client
driver is moved to use the fixed  regulator. Hence this driver
is just duplicating functionality with fixed regulator and hence
removing this.

Change-Id: I893328497644612a2267f2c24298ff2f668e75d4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94198
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agoARM: tegra: configs: Remove CONFIG_REGULATOR_GPIO_SWITCH
Laxman Dewangan [Tue, 3 Apr 2012 08:55:44 +0000]
ARM: tegra: configs: Remove CONFIG_REGULATOR_GPIO_SWITCH

Removing config variable CONFIG_REGULATOR_GPIO_SWITCH as the
same functionality can be achieve with fixed regulator.

Change-Id: I803105f2a247da70721f29562881448bb00d3a44
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94197
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: cardhu: Use fixed regulator for open drain gpio
Laxman Dewangan [Tue, 3 Apr 2012 08:55:02 +0000]
ARM: tegra: cardhu: Use fixed regulator for open drain gpio

The gpio regulator which is controlled through the gpio, which
is open drain type, is using the gpio_switch regulator.
The open drain support is added into the fixed regulator
and hence moving the regulator to use fixed regulator.

Change-Id: I1428d7e10ff469587c45fe913c4be8b4e35cb5bd
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94196
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agousb: gadget: fsl_udc: boost cpu rate for transaction
Alok Chauhan [Wed, 7 Mar 2012 08:18:41 +0000]
usb: gadget: fsl_udc: boost cpu rate for transaction

Boost CPU rate floor ( based upon
TEGRA_GADGET_BOOST_CPU_FREQ ) before any transaction
starts and remove the boost once the transaction completes.

Bug 923594

Signed-off-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-on: http://git-master/r/88247
(cherry picked from commit cfb0c2d7bc7c00962c97c895958e2e0a13a14cfd)

Change-Id: I6c7524dbf90d6c3c8840ee8cd88e896dde6aa041
Reviewed-on: http://git-master/r/94173
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoarm: tegra: enterprise: enable pullup for preq1 on A03/A04
Tom Cherry [Fri, 23 Mar 2012 20:57:32 +0000]
arm: tegra: enterprise: enable pullup for preq1 on A03/A04

Bug 958089

Reviewed-on: http://git-master/r/92054
(cherry picked from commit 92ff85f937cefc0fbe029607e23557adcf13f9fd)

Change-Id: I7e8815f758c2527da3ab635f102888e5a6d5e951
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/94118
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agomfd: tps80031: add option to enable internal pullup or pulldown
Tom Cherry [Fri, 23 Mar 2012 20:55:52 +0000]
mfd: tps80031: add option to enable internal pullup or pulldown

Bug 958089

(cherry-picked from commit 7f4c6d6b9dd2b06984b59dcd60d92026cab4c87c)
Reviewed-on: http://git-master/r/92053

Change-Id: I0f2bdb5482fdcb508808d2d58771d74a05b5597f
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/94117
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoarm: tegra: enterprise: Calibrated A03/A04 backlight table
Tom Cherry [Fri, 30 Mar 2012 23:31:58 +0000]
arm: tegra: enterprise: Calibrated A03/A04 backlight table

Bug 956246

Reviewed-on: http://git-master/r/93644
(cherry picked from commit 5009daf8f362b11810f19253d747042b41badfd3)

Change-Id: I5752eb06a95986c974acce24fa63e1c13e47cd4e
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/94116
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

7 years agodrivers: misc: nct: Remove regulator error message
Preetham Chandru [Mon, 2 Apr 2012 06:40:19 +0000]
drivers: misc: nct: Remove regulator error message

Print only a warning message if vdd regulator is not registered.
Some board do not have a seperate vdd regulator and hence
print only a warning message in such cases.

Bug 961258
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Change-Id: I953d17ae14650c622e06febe415362e5cb096236
Reviewed-on: http://git-master/r/93777
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: kai: Update measured backlight output
Daniel Solomon [Sun, 1 Apr 2012 20:51:18 +0000]
ARM: tegra: kai: Update measured backlight output

Update measured backlight output for correct linearization.

Bug 962780

Change-Id: Ic35b159a0b951eafff7890e7a7487f3c94b468e8
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/93744
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hu He <hhe@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

7 years agovideo: tegra: host: Init scale3d worker always
Terje Bergstrom [Fri, 30 Mar 2012 09:44:40 +0000]
video: tegra: host: Init scale3d worker always

Initialize scale3d worker even though scale3d would be disabled.

Bug 954879

Change-Id: Iaf3a12740d1d377d949cdfbf7e11fa00568e72fe
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/93488
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agovideo: tegra: host: Add syncpt sysfs entries
Terje Bergstrom [Tue, 27 Mar 2012 12:43:58 +0000]
video: tegra: host: Add syncpt sysfs entries

Expose sync point current and max values through sysfs.

Bug 957639

Change-Id: I2a3b914d404bb8d7bbed86d383c859bd8237a278
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/92778
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoi2c: tegra: Support for I2C_M_REV_DIR_ADDR protocol mangling
Laxman Dewangan [Tue, 27 Mar 2012 13:24:35 +0000]
i2c: tegra: Support for I2C_M_REV_DIR_ADDR protocol mangling

Add support for protocol mangling "I2C_M_REV_DIR_ADDR"

Change-Id: Icdef16885f1cf6ed1ce9c4003a94c2c2e917ced2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92572
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stephen Warren <swarren@nvidia.com>

7 years agosound: soc: tegra: Use tegra_dma_cancel() to abort request
Laxman Dewangan [Thu, 22 Mar 2012 10:04:52 +0000]
sound: soc: tegra: Use tegra_dma_cancel() to abort request

To terminate request from dma, use the tegra_dma_cancel() inplace of
tegra_dma_dequeue().
The api tegra_dma_dequeue() is getting to be obsolete.

Change-Id: Id2a888a726086fb1e4ade04ac047442554188bee
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91754
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoserial: tegra: Use tegra_dma_cancel() to abort request
Laxman Dewangan [Thu, 22 Mar 2012 10:04:24 +0000]
serial: tegra: Use tegra_dma_cancel() to abort request

To terminate request from dma, use the tegra_dma_cancel() inplace of
tegra_dma_dequeue().
The api tegra_dma_dequeue() is getting to be obsolete.

Change-Id: I2e2c5d68dee64da02370beca6f61c650049402a2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91753
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>