7 years agoasoc: tegra: MAX98088 machine: Add support for setting bias level
Ankit Gupta [Mon, 14 May 2012 13:13:23 +0000]
asoc: tegra: MAX98088 machine: Add support for setting bias level

Allow setting bias level to turn off clock extern1 when codec
is idle for enterprise board. (Maxim 98088 codec)

Bug 984678

Change-Id: Ib01be71362ab0c5525f570693b41db73777875e6
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Reviewed-on: http://git-master/r/102240
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc:tegra: Enable I2S tx in voice call
Nikesh Oswal [Fri, 11 May 2012 14:23:27 +0000]
asoc:tegra: Enable I2S tx in voice call

Associated with I2S there is a playback ref count, when
we open the I2S for plyabck it is incremented and during
voice call we check if its not zero then enable the tX.
This logic fails if the start-trigger is not called for the prior
playback stream. Hence we unconditionally enable the tx,
which is harmless

Bug: 981806

Change-Id: I66aafda596e2b2b03745e93f3e851dedc3b8ef5d
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/101996
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoARM: tegra: cardhu: wakeup system from GPIO_PV0 without key detection
Laxman Dewangan [Thu, 10 May 2012 13:52:47 +0000]
ARM: tegra: cardhu: wakeup system from GPIO_PV0 without key detection

To meet the LP0 exit power on sequence, it is require to wake system
for tegra gpio in place of PMIC for E1291-A04.
Also it is observed that if GPIO key is used to wakeup then there is
possibility of loosing the key event and hence adding the gpio
GPIO_PV0 as the key with code of RESERVED so that it can only
wakeup system but will not able to send the key event through
gpio keys.

bug 981320

Change-Id: I8610adca4b5ed8ae79f8fcca9a1d4b5548158c60
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/101784
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: pm: suspend trace event
Sivaram Nair [Wed, 9 May 2012 16:51:38 +0000]
ARM: tegra: pm: suspend trace event

A new trace event is added for tracing cpu suspend start and end

Change-Id: I2506e3aed0692c44fb4325e9d381cea53228b0c3
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/101748
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agoasoc: codecs: spdif: Add support for setting bias level
Ankit Gupta [Thu, 3 May 2012 09:45:31 +0000]
asoc: codecs: spdif: Add support for setting bias level

Allow setting bias level to turn off clock extern1 on enterprise
when codec is idle. Added a dummy widget to make the
target_bias_level to BIAS_OFF as per required by the new ALSA
kernel.

Bug 984678
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>

Change-Id: I29de405c26286eee0a49e655f1d4236f6093ce8a
Reviewed-on: http://git-master/r/100287
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Tested-by: Ankit Gupta (Engrg-SW) <ankitgupta@nvidia.com>

7 years agoasoc: tegra: pcm: Add support for setting bias level
Ankit Gupta [Thu, 3 May 2012 09:36:27 +0000]
asoc: tegra: pcm: Add support for setting bias level

Allow setting bias level to turn off clock extern1 when codec
is idle for Enterprise (Maxim 98088 codec).

Bug 984678
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>

Change-Id: I09538dafe6c6f01547ff989de3c23933c9745db0
Reviewed-on: http://git-master/r/100286
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Manoj Gangwal <mgangwal@nvidia.com>
Tested-by: Ankit Gupta (Engrg-SW) <ankitgupta@nvidia.com>

7 years agoarm: tegra: p1852: Add Tegra camera driver
Songhee Baek [Wed, 9 May 2012 21:20:22 +0000]
arm: tegra: p1852: Add Tegra camera driver

Add Tegra camera driver to support video
capture through H/W interfaces VIP, CSI.

Bug 978086

Change-Id: I0dc51e47928388ed2073a99f8ca80b5a5a77d166
Signed-off-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-on: http://git-master/r/101590
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: clock: Export clock minimum
Antti P Miettinen [Wed, 9 May 2012 16:57:01 +0000]
ARM: tegra: clock: Export clock minimum

Add clock minimum to debugfs.

Bug 917644

Change-Id: Ie088809829af2bdc81a969a034bf00847459f0ce
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/101555
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: sdhci: Limit eMMC,SDIO,SD DDR clock
Pavan Kunapuli [Wed, 9 May 2012 13:29:19 +0000]
arm: tegra: sdhci: Limit eMMC,SDIO,SD DDR clock

Limit eMMC, SD and SDIO DDR mode clock to 41MHz.

Bug 967719

Change-Id: Iaccc5b771b81b15226f87684b547ad1fb7dd38d3
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/101173
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoarm: tegra: clock: Add tegra3 sdmmc4 EMC shared user
Pavan Kunapuli [Fri, 4 May 2012 15:27:38 +0000]
arm: tegra: clock: Add tegra3 sdmmc4 EMC shared user

Adding tegra3 sdmmc4 EMC shared user in the tegra3
clock table.

Bug 967719

Change-Id: I934dcaebf664f8b1db9ea07eef07eb6f266822aa
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100582
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agommc: tegra: Set eMMC DDR clock based on emc clock
Pavan Kunapuli [Mon, 7 May 2012 12:13:25 +0000]
mmc: tegra: Set eMMC DDR clock based on emc clock

Set the eMMC ddr mode clock dynamically based on emc
clock rate. If ddr clock limit is specified and the emc
clock is less than max emc freq, then limit emmc ddr
clk. If not, set the max eMMC ddr clock.

Bug 967719

Change-Id: I9f70077c4ac4bb1f3e6d894fcb8420b1aba284dd
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100579
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: sdhci: Define ddr50 clock limit
Pavan Kunapuli [Fri, 4 May 2012 13:32:04 +0000]
arm: tegra: sdhci: Define ddr50 clock limit

Added a new variable in sdhci platform data
which will limit the ddr50 mode clock.

Bug 967719

Change-Id: I3f55b55651362447845c2e1d5000939e3e028df6
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100569
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agodrivers: video: tegra: Implement HOST1X syncpt init
Terje Bergstrom [Thu, 26 Apr 2012 11:18:55 +0000]
drivers: video: tegra: Implement HOST1X syncpt init

Move initialization for HOST1X sync point irq to nvhost driver.

Bug 871237

Change-Id: I0d31e03b43999c609194665cdcbd2f0e498d848f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/100250
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agoARM: tegra: Correction of safe option
Ashwini Ghuge [Fri, 11 May 2012 11:50:58 +0000]
ARM: tegra: Correction of safe option

Corrected safe option for LPW0 and LPW2

Bug 920686

Change-Id: I14e1a22de3338ba569d3b381508e123d12aad059
Reviewed-on: http://git-master/r/101973
Tested-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoarm: tegra: cardhu: add ov5640 support
Charlie Huang [Sat, 28 Apr 2012 00:07:12 +0000]
arm: tegra: cardhu: add ov5640 support

bug 921322

Change-Id: If7f05c632816abac54852293ebd3834b5b3984d8
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/99508
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agomedia: video: tegra: ov5640: add support
Charlie Huang [Sat, 28 Apr 2012 00:04:09 +0000]
media: video: tegra: ov5640: add support

add ov5640 yuv sensor support - initial.

bug 921322

Change-Id: I813afa8963e39afe475f9fdd43152cfaf1a16ae1
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/99506
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

7 years agoasoc: codecs: resolve compilation time warnings
Sanjay Singh Rawat [Fri, 6 Apr 2012 13:24:06 +0000]
asoc: codecs: resolve compilation time warnings

Bug 949219

Change-Id: I9c2a0aa22432c586a7e72273ad935d42332e873f
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/95087
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: config: tegra3: enable CONFIG_REGULATOR_USERSPACE_CONSUMER
Laxman Dewangan [Thu, 3 May 2012 11:00:47 +0000]
ARM: config: tegra3: enable CONFIG_REGULATOR_USERSPACE_CONSUMER

By enabling the user space regulator consumer, it is possible
to control the rail from userspace through sysfs.

bug 966960

Change-Id: I0f4a7a0afdc998d58e6448e4f621ee4e430a7ef6
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100320
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: Pinmux conflict correction
Ashwini Ghuge [Fri, 11 May 2012 11:48:05 +0000]
ARM: tegra: Pinmux conflict correction

Corrected Mux option for LPW2

Bug 920686

Change-Id: I1e93a28c070ca7689c305d84ed8664c3f170bfcb
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/101959
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: Enable TXFILLTUNING for all USB interfaces
Venu Byravarasu [Thu, 3 May 2012 10:21:00 +0000]
ARM: tegra: Enable TXFILLTUNING for all USB interfaces

As per recommendation from ASIC team, Setting TXFILLTUNNING to 0x10
for all USB interfaces.

bug 974507

Change-Id: Id2ee26927e56bf500a0fed2a414b74ffab157403
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/99629
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: enterprise: power: Fix sdmmc3 regulator entry
Pavan Kunapuli [Fri, 11 May 2012 11:23:48 +0000]
arm: enterprise: power: Fix sdmmc3 regulator entry

Register vdio_sdmmc3 supply with a valid device id
instead of NULL.

Bug 982788

Change-Id: Ie19d8a48b381190e8f966928a785af0f51794cb1
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/101971
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoarm: tegra: configs: Add GPIO regulator support
Pavan Kunapuli [Fri, 11 May 2012 11:21:59 +0000]
arm: tegra: configs: Add GPIO regulator support

Enable CONFIG_GPIO_REGULATOR for Tegra3 platforms.

Bug 982788

Change-Id: I17587447013fdde6dc58b4fbf23f0ca37faa3dc5
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/101968
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoRevert "serial: tegra: Use tegra_dma_cancel() to abort request"
Pradeep Kumar [Fri, 11 May 2012 06:24:05 +0000]
Revert "serial: tegra: Use tegra_dma_cancel() to abort request"

BT Filetransfer have some issue.
This reverts commit e8c243d5d09d1a552b66df7a8a0a0313047ebbac.

Bug 982630

Change-Id: I6e76d44e076874569518fa881e427918d3e546f2
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/101914
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agovideo: tegra: host: move chip_support out of nvhost_master
Mayuresh Kulkarni [Fri, 13 Apr 2012 14:12:37 +0000]
video: tegra: host: move chip_support out of nvhost_master

- currently, nvhost_master holds the reference to struct
chip_support
- the struct chip_support hides the chip specific implementation
for channel submit, cdma, push buffer operations etc. so
it exposed all the internal structures through nvhost_master
- move chip_support to be a part of nvhost_bus since it only has
function pointers to chip specific api implementations
- nvhost_master is host1x device specific private data so
ideally it should not hold reference to chip specifics

Bug 871237

Change-Id: I4f3f48ee5fc47a90288d110ea8eef905150275a0
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/94421
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agommc: tegra: Fix SDR50 mode clock rate setting
Pavan Kunapuli [Wed, 9 May 2012 12:44:51 +0000]
mmc: tegra: Fix SDR50 mode clock rate setting

In SDR50 mode, set the controller clock to double
the requested clock to ensure that the core voltage
is maintained at a min of 1.2V.

Bug 965298

Change-Id: I557a07de97efd6b44f812a11da657e03d3ddefd0
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/101522
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agovideo: tegra: dc: Add display feature table support.
Kevin Huang [Mon, 7 May 2012 08:47:52 +0000]
video: tegra: dc: Add display feature table support.

Add display feature table so that user and kernel could set and
update window attributes properly.

Bug 962353

Change-Id: I08490a225892660126f3eefe4d5b7a4bb61d9bf7
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/101078
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agommc: core: Abort failed transfer before retries
Pavan Kunapuli [Fri, 4 May 2012 12:53:56 +0000]
mmc: core: Abort failed transfer before retries

Retries should be done only after abort command
is issued for the current failed transfer. The block
layer already has an implementation for retrying.
No need for the extra retries.

Bug 961761
Bug 922239

Change-Id: I07f60e85e093b725007727833739013f8fd66d43
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100563
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agoRevert "asoc: tegra: Add TDM mode support"
Nikesh Oswal [Thu, 10 May 2012 06:53:45 +0000]
Revert "asoc: tegra: Add TDM mode support"

This reverts commit dfa00e184b5fe0d4d48fa62a15fc956de9b6b65c.
This is causing a regresssion.

Bug: 977319

Change-Id: I4fe6daf88b2988978f089194f2931691eeb0eb09
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/101687
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vijaya Bhaskar <vbhaskar@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoarm: tegra: enterprise: New EMC table for A04 enterprise
Karthik Ramakrishnan [Fri, 27 Apr 2012 00:17:16 +0000]
arm: tegra: enterprise: New EMC table for A04 enterprise

New EMC memory table for A04 Enterprise board
Bug 969716

Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Change-Id: I6936859ddf8d01b71025bfd21b690394dc3207bc
Reviewed-on: http://git-master/r/101626
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

7 years agovideo: tegra: host: Add syncpt trace events
Terje Bergstrom [Wed, 9 May 2012 12:54:02 +0000]
video: tegra: host: Add syncpt trace events

Add trace events for updating the syncpt value from hardware, and
wait check.

Change-Id: If17de153ae36c0665fe0af2f405dfe42f7fcd656
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/101524
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>

7 years agovideo: tegra: host: Add context switch to trace dump
Terje Bergstrom [Wed, 9 May 2012 11:55:28 +0000]
video: tegra: host: Add context switch to trace dump

Add context switch to the ftrace dump.

Change-Id: I5df032273982b919fb94263cff38d8b8b6b6be45
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/101523
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agoARM: tegra: kai: change NCT72 conversion rate
Daniel Fu [Tue, 8 May 2012 10:22:00 +0000]
ARM: tegra: kai: change NCT72 conversion rate

Bug 961829

NCT72 thermal sensor consumes ~3mW at 16Hz conversion rate.
At 32Hz, the power consumption ~1.5mW.
Change conversion rate to 32Hz to reduce power consumption.
LP0 power consumption will not reduce, because the sensor will
enter standby mode.

Signed-off-by: Daniel Fu <danifu@nvidia.com>
Change-Id: If584c57b4d6e0b3068d9a1210a977ef5cd347984
Reviewed-on: http://git-master/r/101217
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoArm: Tegra: Nor: use timing1 proper value
Mohit Kataria [Mon, 9 Apr 2012 06:19:27 +0000]
Arm: Tegra: Nor: use timing1 proper value

timing1_read was initialized with timing0 from nor platform data
changed the same to use timing1 from platform data instead of
timing0

Bug 934187

Change-Id: I04c41323de25fb2bb53dac91301cee9c0820707a
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/95293
Reviewed-on: http://git-master/r/100904
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Amlan Kundu <akundu@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoArm: tegra: p1852: Changed sclk to run at max.
Mohit Kataria [Mon, 7 May 2012 06:58:34 +0000]
Arm: tegra: p1852: Changed sclk to run at max.

Sclk frequecy changes depending on the clocks derived from sclk.
Changed it to run at max POR frequecy.

Bug 971061

Change-Id: I357e1acd8d049bf233ff79b942c911db123865f6
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/100859
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agoarm: tegra: Correct tap delay for all T30 sdhci controllers
naveenk [Wed, 25 Apr 2012 13:49:18 +0000]
arm: tegra: Correct tap delay for all T30 sdhci controllers

Tap delay value of 0x0F is recommended by HW team

Bug 911075

Change-Id: I9b73e7203c0dcb1971073b1d7251d11d71eddff3
Reviewed-on: http://git-master/r/98796
(cherry picked from commit 637b073d6ff7d7d71c2e0e632b222ecc6850be23)
Reviewed-on: http://git-master/r/98763
Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agopower: bq27x00: start/stop delayed work upon suspend/resume
Pritesh Raithatha [Wed, 11 Apr 2012 10:41:10 +0000]
power: bq27x00: start/stop delayed work upon suspend/resume

Cancel delayed work upon suspend and schedule it on resume

Bug 917914

Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/95833
(cherry picked from commit a191d13e9dcdae715c9e03e1980857d00c082dc5)

Change-Id: Ib8292daed3b4115657b1a66e1382ed7c1c448071
Reviewed-on: http://git-master/r/97080
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
GVS: Gerrit_Virtual_Submit <kchilds@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agousb: gadget: udc-core: fix kernel crash on soft_connect and srp interfaces
Preetham Chandru [Wed, 2 May 2012 13:32:58 +0000]
usb: gadget: udc-core: fix kernel crash on soft_connect and srp interfaces

We should not call dev_get_drvdata() as the driver data is never set.
We should use container_of() as it is been used for other sysfs attributes.
Without this change writing to the soft_connect or srp interfaces crashes
the kernel because of null pointer dereference.

Bug 975473
Signed-off-by: Preeham Chandru R <pchandru@nvidia.com>

Change-Id: I45f6dab32f5435d518bd5b4fcdfafa54b9b89acd
Reviewed-on: http://git-master/r/100238
Tested-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agoRevert "ARM: tegra: clock: Don't fail clk_enable when max_rate has been lowered"
Alex Frid [Sat, 5 May 2012 01:07:08 +0000]
Revert "ARM: tegra: clock: Don't fail clk_enable when max_rate has been lowered"

This reverts commit 8d351aa5478de533114e614f2607bc85ed23df91.

The above commit introduced recursive call of clk enable/set rate APIs
that may hang the system.

Change-Id: I04eff9e1c3ddee82f6d2e17690122cc41fad203f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/100710
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoARM: tegra: power: Apply down delay to balancing CPUs
Alex Frid [Sun, 29 Apr 2012 06:25:39 +0000]
ARM: tegra: power: Apply down delay to balancing CPUs

On Tegra3 secondary G-CPU may be turned off by auto-hotplug governor
in two cases: when overall CPU load is low enough to justify transition
to LP CPU, or when CPU cores usage by the scheduler is unbalanced
(skewed). In the former case down delay (currently 2sec) was inserted
before the core is turned Off. In the latter case the up delay (100ms)
was used, i.e., the same delay applied to balancing cores regardless
of the On/Off direction.

This commit would apply down delay when turning core Off in both cases
above, and keep using up delay only for turning core On.

Change-Id: Id545f8d48cbf380e24824a5adfe045ff68c1f39c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/99708
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoRevert "asoc:codecs: tiaic326x: remove minidsp support"
Simone Willett [Tue, 8 May 2012 23:31:49 +0000]
Revert "asoc:codecs: tiaic326x: remove minidsp support"

This reverts commit 774fa71fc9834fbdcb297048d9e9a4bc7b944b48

Change-Id: Ib187dff51d3b2fd2b2ac0c98a53abe07c99148aa
Reviewed-on: http://git-master/r/101359
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agocpufreq: interface for setting governor for a cpu
Puneet Saxena [Thu, 19 Apr 2012 07:02:29 +0000]
cpufreq: interface for setting governor for a cpu

This implementation sets governor for a cpu using existing
cpufreq interfaces.

bug 871958

Change-Id: Ic4e7e2a2b0babaf1829b559b5db211666d449b86
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/97939
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoasoc: codecs: rt5640: resolve compilation time warnings
Sanjay Singh Rawat [Mon, 26 Mar 2012 11:03:25 +0000]
asoc: codecs: rt5640: resolve compilation time warnings

bug 949219

Change-Id: I4409eaff4042967133cc948452ca8e52d15b2d18
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/92279
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoinput: touchscreen: resolve compilation time warnings
Sanjay Singh Rawat [Mon, 26 Mar 2012 10:53:07 +0000]
input: touchscreen: resolve compilation time warnings

bug 949219

Change-Id: I408fb008a70c7ea546384e68ac50c1f0604fc39a
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/92276
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoasoc: tegra: pcm: If there is no dma information exit from trigger
Nikesh Oswal [Tue, 8 May 2012 11:17:40 +0000]
asoc: tegra: pcm: If there is no dma information exit from trigger

If there is no dma information exit from trigger, this is required
for the dummy voice call playback and capture streams

Change-Id: I5276e7ebb72c17268a9785204fea9f395b2e5d3a
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/101235
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc:codecs: aic326x: change alsa ctrls for headphone driver
Nikesh Oswal [Tue, 8 May 2012 11:16:06 +0000]
asoc:codecs: aic326x: change alsa ctrls for headphone driver

Use non-inverting type alsa control for headphones as same have
been used for spk and recv

Change-Id: I39d2613071063782dff8151b07ef46ca8e16db5c
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/101234
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoasoc:codecs: tiaic326x: remove minidsp support
Nikesh Oswal [Tue, 8 May 2012 11:14:59 +0000]
asoc:codecs: tiaic326x: remove minidsp support

disable the flags for turning off the mini dsp support

Change-Id: Ieb0b18fc3cc1143cbd0a315c85688d2f1ae4efe1
Reviewed-on: http://git-master/r/101233
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

7 years agoArm: tegra: p1852: Avp clock frequency to 334
Mohit Kataria [Mon, 7 May 2012 08:02:00 +0000]
Arm: tegra: p1852: Avp clock frequency to 334

changed the max avp clock from 378MHz to 334MHz as per new POR changes

Bug 883565

Change-Id: I4e9dda0288f3f85c8b1705971bb8f389127cff28
Reviewed-on: http://git-master/r/97279
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/100870
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

7 years agovideo: tegra: host: Iterate devices without nb_channels
Terje Bergstrom [Thu, 26 Apr 2012 09:49:28 +0000]
video: tegra: host: Iterate devices without nb_channels

Do not use nb_channels to find out the number of client devices.
Instead, allocate devno regions when they are needed and find a
device by module id by iterating over nvhost bus.

Bug 871237

Change-Id: I53fd0d8e5874422ef9877430c0a170db2660118a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/99067
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agomfd: twl6025: resolve compilation time warnings
Sanjay Singh Rawat [Mon, 26 Mar 2012 12:16:55 +0000]
mfd: twl6025: resolve compilation time warnings

bug 949219

Change-Id: Ied38dc0ff7ade8b15561747cde6d552f2597e9e6
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/92307
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agosecurity: tf: resolve compilation time warnings
Sanjay Singh Rawat [Mon, 26 Mar 2012 10:15:23 +0000]
security: tf: resolve compilation time warnings

bug 949219

Change-Id: Ia7d23d3aab631e6a78c53518bc1f608d46e8f341
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/92260
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agovideo: tegra: fb: Call mode filter from check var
Shashank Sharma [Mon, 30 Apr 2012 13:53:57 +0000]
video: tegra: fb: Call mode filter from check var

Call dc_hdmi_mode_filter to validate a videomode. X prepares its
own modedb of supported HDMI modes, but all of them may not be
supported from the HDMI driver. This call makes sure a X-mode is
listed only if supported in DC driver.

Bug: 959676

Change-Id: I8aff65f4e08fcc4471af096150e3972b5913a95a
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/99650
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoinput: touch: enterprise: Increase i2c to 400Khz.
David Jung [Wed, 25 Apr 2012 00:35:27 +0000]
input: touch: enterprise:  Increase i2c to 400Khz.

Modified board file to increase the speed of I2C connection
for Atmel touch driver from 100KHz to 400KHz

Bug 962710

Change-Id: Ic692a4b610c5b952c1bdcfbb26e19714b1952a5f
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/98585
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ali Ekici <aekici@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agovideo: tegra: dc: Set default videomode
Shashank Sharma [Mon, 30 Apr 2012 12:06:24 +0000]
video: tegra: dc: Set default videomode

Set default videomode during the dc probe. This patch enables
HDMI during the probe only and fixes following issues:
1. Until Xinit there was no display on HDMI.
2. Framebuffer console on HDMI needs it to be enabled well before
   Xinit.
To avoide un-necessary powering on HDMI,Check HPD and enable HDMI
only if it's present.

Bug: 930136
Bug: 977705
Change-Id: Ifb71328e5df0ccbb5751669db71fd24719fe3738
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/100656
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agomfd: max77663: Add gpio irq masking in irq_sync_unlock
Jinyoung Park [Mon, 23 Apr 2012 09:49:33 +0000]
mfd: max77663: Add gpio irq masking in irq_sync_unlock

Add gpio irq masking in irq_sync_unlock.

Change-Id: I008caf58ae82d9ed888f4720f54675e9106f027d
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/98664
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agommc: host: loglevel of a message to KERN_INFO
Ramalingam C [Fri, 4 May 2012 06:27:55 +0000]
mmc: host: loglevel of a message to KERN_INFO

Some boards don't have a vddio regulator for few rails hence not getting
the regulator handle. And we assume that those rails are always powered.
Hence rephrased the error message and lowered the loglevel to KERN_INFO.

Bug 976177

Change-Id: I92b82f75934eaf7137584a625065e3389b6ae1b7
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/100490
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agoarm: tegra: Cardhu board file, 400K I2C touch drvr
Ali Ekici [Thu, 19 Apr 2012 22:39:17 +0000]
arm: tegra: Cardhu board file, 400K I2C touch drvr

Modified board file to increase the speed of I2C connection
for Atmel touch driver from 100KHz to 400KHz

Bug 962710
Bug 950422

Change-Id: Ib0f08af35d84cfc1f33cc3771d2aa422f79d98d0
Signed-off-by: Ali Ekici <aekici@nvidia.com>
Reviewed-on: http://git-master/r/97744
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Collins <rcollins@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: David Jung <djung@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoregulator: max77663: fix fps update condition
Jinyoung Park [Wed, 28 Mar 2012 03:32:41 +0000]
regulator: max77663: fix fps update condition

Fix fps update condition in max77663_regulator_set_fps().

Bug 930883

Change-Id: I2f57603320a91b2727932586fc3c66d9de347d64
signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/92707
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agomfd: max77663: Unmask EN0 rising interrupt
Jinyoung Park [Wed, 25 Apr 2012 06:21:42 +0000]
mfd: max77663: Unmask EN0 rising interrupt

Unmasked EN0 rising interrupt to generate fast PMU_INT by
EN0(POWER_KEY).

Bug 930883

Change-Id: I9a3d8c4f564e83deea86fbd3d05f14933a0b0f65
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/98665
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

7 years agobluetooth: tibluesleep: clean up tibluesleep driver
Nagarjuna Kristam [Tue, 17 Apr 2012 06:44:35 +0000]
bluetooth: tibluesleep: clean up tibluesleep driver

Remove UART clock enable code, as UART clock gating is not
needed in tibluesleep driver.
Remove un-wanted tasklets, workqueues and wakelocks
Remove extra lines and spaces

Change-Id: I422e09ece2c736c4a98911a5bd84029ad654cb08
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/96944
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agoARM: tegra: enterprise: register parent regulator before fuse regulator
Laxman Dewangan [Fri, 27 Apr 2012 18:10:12 +0000]
ARM: tegra: enterprise: register parent regulator before fuse regulator

bug 978829

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/99460
(cherry picked from commit b5531673e3da75f2406685ce377f39d76f494162)

Change-Id: I5280dedb460df9852cc39d1c17132319e202c7b2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100524
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: cardhu: Wakup through GPIO-PV0 for E1291-A04
Laxman Dewangan [Wed, 2 May 2012 16:11:57 +0000]
ARM: tegra: cardhu: Wakup through GPIO-PV0 for E1291-A04

To have the proper LP0 exit power sequence, it is require to
wakeup system through tegra gpio rather than PMU-INT.

bug 957972

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100107
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Cherry-picked commit ffe8e102d91c5eafc0b71b044b97fe9e8cef7463

Change-Id: I0518e46b43ec36ba6e076a946da2d395cd31777e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100521
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoARM: tegra: clock: Add locked version of round rate
Alex Frid [Sun, 18 Mar 2012 06:38:07 +0000]
ARM: tegra: clock: Add locked version of round rate

Add locked version of round rate API to be used by tegra arch
specific layer.

Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 457627966b91f2141439812869adc4acf9242471)

Change-Id: Id68d0bb952d1e7d9e650341872d1b06b0b2d3cea
Reviewed-on: http://git-master/r/100474
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoarm: tegra: pl310: Enable dynamic clock gating and standy.
Krishna Reddy [Fri, 4 May 2012 02:16:24 +0000]
arm: tegra: pl310: Enable dynamic clock gating and standy.

Bug 947861

Change-Id: Ib4ce7bfa3624562a766678a2ef20ebdcd3055d89
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/100462
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoarm: tegra: scu: Enable IC and SCU standby
Krishna Reddy [Fri, 4 May 2012 02:02:04 +0000]
arm: tegra: scu: Enable IC and SCU standby

Bug 947861

Change-Id: I1ac97b5de5e7e79a418b3c38c70df4976616cdf3
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/100457
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agovideo: tegra: nvmap: config option to enable page pools.
Krishna Reddy [Thu, 3 May 2012 22:36:48 +0000]
video: tegra: nvmap: config option to enable page pools.

Add config option to enable/disable nvmap page pools.

Change-Id: I873e81a675fecd768534d4ce03c2f8fdd3c6a063
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/100424
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoarm: tegra: kai: set the pull up source GPIO_PCC7
Hunk Lin [Tue, 1 May 2012 03:04:18 +0000]
arm: tegra: kai: set the pull up source GPIO_PCC7

TEGRA_GPIO_PCC7(PEX_L2_CLKREQ) is used as the pull up source to pull up
other pins in schematic. So set it to high default.

bug 949026

Change-Id: I5a4d806ec4b54969514547472cd08018d285ced5
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/99778
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agoARM: tegra2: clock: Enable PREINIT_CLOCKS
Jong Kim [Sat, 28 Apr 2012 01:11:26 +0000]
ARM: tegra2: clock: Enable PREINIT_CLOCKS

Enable CONFIG_PREINIT_CLOCKS.

bug 967065

Change-Id: Ib6675f9bff6729ffe7dfcd8b753c42b5d32240e4
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/99517
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agousb: otg: tegra: Change suspend resume logic
Rakesh Bodla [Fri, 4 May 2012 09:36:18 +0000]
usb: otg: tegra: Change suspend resume logic

Changed the suspend resume logic as per new
UDC driver. Also, added few debug prints.

Bug 887361

Change-Id: I36ec1f160e8b4db54b5bd2153bdbf1c4fae1cc2a
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/99450
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agoarm: configs: tegra: enable tegra udc driver
Rakesh Bodla [Fri, 4 May 2012 09:24:04 +0000]
arm: configs: tegra: enable tegra udc driver

Enable tegra udc driver.

Bug 887361

Change-Id: Iaac2486d2a05454fa351920d5c65d17b9c2a881b
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/99449
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

7 years agoarm: tegra: update the udc driver name
Rakesh Bodla [Fri, 27 Apr 2012 17:13:47 +0000]
arm: tegra: update the udc driver name

Update the clocks structure to use new udc driver
name. Also, update the device structure.

Bug 887361

Change-Id: I0fd846ab177e8651f285bcb9796361d30967b830
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/99448
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agousb: tegra: add USB device controller driver for tegra chip
Rakesh Bodla [Fri, 27 Apr 2012 17:11:08 +0000]
usb: tegra: add USB device controller driver for tegra chip

Add High-speed USB device controller driver for tegra chips.
This can work in OTG device mode with tegra OTG driver.
Driver currently supports only UMTIP PHY.

Bug 887361

Change-Id: I63774a44e3bb607c93007b170ba8b811f96e43f8
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/97918
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: Export tegra_powergate_is_powered()
Antti P Miettinen [Thu, 19 Apr 2012 21:14:01 +0000]
ARM: tegra: Export tegra_powergate_is_powered()

Export tegra_powergate_is_powered() for use by modules.

Change-Id: I8cfbb8aeb95dca00cbf6ef0c8c2bd189afeb62b6
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/97724
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agoarm: tegra: kai: Switch to external temperature sensor
Kerwin Wan [Wed, 14 Mar 2012 11:36:00 +0000]
arm: tegra: kai: Switch to external temperature sensor

Disable internal temperature sensor and enable external temperature
sensor.

This is a modified version of change
74db6e22d316a95630d3059644fbc55e2620cb9b

Bug 954134

Change-Id: Id64bb93a09e1701165ad1f82e08bb92e61425873
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/96285
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agoARM: tegra: cardhu: pm299: system wake through tegra gpio
Laxman Dewangan [Thu, 3 May 2012 15:03:52 +0000]
ARM: tegra: cardhu: pm299: system wake through tegra gpio

Waking up system through the tegra gpio inplace of ricoh onkey
when using the ricoh based pmu.

bug 978922

Change-Id: If9c5baffa42aca5fcc7d6238c5cf122a136e7760
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100351
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

7 years agovideo: early exit from update_cdma
Pranav Chaturvedi [Mon, 16 Apr 2012 03:39:44 +0000]
video: early exit from update_cdma

when update_cdma_locked() is invoked, CDMA is not running
implies that the queue is cleared and we can return immediately.

Bug 960487

Change-Id: I599027906dc405f4490590443d4f4d5a3202b5b0
Reviewed-on: http://git-master/r/96650
(cherry picked from commit f297b4812d15540f4b14c87178662a7ca6575ce9)
Reviewed-on: http://git-master/r/99994
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agovideo: tegra: host: Clean up includes
Terje Bergstrom [Thu, 26 Apr 2012 09:26:30 +0000]
video: tegra: host: Clean up includes

Clean up #includes. Replace #includes with forward declarations where
possible, and remove extraneous #includes.

Bug 871237

Change-Id: I6942e0c632b42ad7009589ebdd78def88ae4baa4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/99046
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 years agoARM: tegra: enterprise: Limit holdoff set for 533MHz
Ray Poudrier [Sun, 26 Feb 2012 22:59:13 +0000]
ARM: tegra: enterprise: Limit holdoff set for 533MHz

Bug 935079

Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/86009
(cherry picked from commit 83eb3734f76e598d570dd9624e7e06f8b3e05afe)

Change-Id: I5911670e7c1e8dd5fc4e89d4be21b9dcbc4c9085
Reviewed-on: http://git-master/r/98535
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>

7 years agomedia: video: tegra: ov5650: read sensor fuse id
Charlie Huang [Tue, 24 Apr 2012 02:09:15 +0000]
media: video: tegra: ov5650: read sensor fuse id

The sequence of read fuse id is:

1. write to OTP index register 0x3d00.
2. read out byte from ox3d04.
3. repeat step 1 to the next byte with its index respectively.

also fixed ov5650_read_reg always fail issue.

bug 957657

Change-Id: I649a7765320d0d4be8111a7f523d8487b872b620
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/98330
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Wei Chen <wechen@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

7 years agoARM: tegra: Enable ARM errata 716044 for Tegra2.
Krishna Reddy [Wed, 11 Apr 2012 18:23:25 +0000]
ARM: tegra: Enable ARM errata 716044 for Tegra2.

Change-Id: Id71da6f6371f337f913d981f6d121c3fb2561a41
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/95915
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agoARM: errata: 716044: an uncacheable load multiple can cause a deadlock.
Krishna Reddy [Wed, 11 Apr 2012 18:20:20 +0000]
ARM: errata: 716044: an uncacheable load multiple can cause a deadlock.

Under some rare circumstances, an uncacheable load multiple
instruction (LDRD, LDM, VLDM, VLD1, VLD2, VLD3, VLD4) can cause
a processor deadlock.

Change-Id: Ibd79aa8182dce37d0be9892f2310735e1123618a
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/95914
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agoarm: tegra: Implement safe option for T30 pinmux
Ashwini Ghuge [Wed, 25 Apr 2012 03:47:11 +0000]
arm: tegra: Implement safe option for T30 pinmux

Bug 950086

Change-Id: I2eb129566bfea83b9a73d29f0c6443bdab087b65
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/95518
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Andy Park <andyp@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agodmaengine/dma_slave: fix merge issue.
Linqiang Pu [Wed, 2 May 2012 13:37:27 +0000]
dmaengine/dma_slave: fix merge issue.

Change-Id: I0931f4ef7a5464dd32d8c703288a137fc77857ce
Signed-off-by: Linqiang Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/100090
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

7 years agoARM: tegra2: clock: Put Tegra2 clocks to known states
Jong Kim [Sat, 28 Apr 2012 00:53:02 +0000]
ARM: tegra2: clock: Put Tegra2 clocks to known states

Add TEGRA_PREINIT_CLOCKS option to put host1x, disp1, and video clocks
into known state, so that L4T Ventana/Harmony works on u-boot.

bug 967065

Change-Id: If7637b13e0daf1823fa0fe694a87870f4601e4df
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/95734
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

7 years agomfd: tps80031: fix missed irq issue
Steve Kuo [Fri, 30 Mar 2012 07:00:38 +0000]
mfd: tps80031: fix missed irq issue

We found missed irq could be happened if clear all INT_STS_x register in one time.
Shadow register pushes the irq status after the first byte of INT_STS_x was cleared
The proposed way to clear interrupt is to write only one INT_STS_x register.
It will also clear the other two ones.

Bug 952476

Reviewed-on: http://git-master/r/93453
Signed-off-by: Steve Kuo <stevek@nvidia.com>

(cherry picked from commit 0c92f32e9e03defaeac991518b26134e59ef4db6)

Change-Id: I76179be4847f59a1687926b9b0dde6ebd3f58aa4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100306

7 years agoARM: tegra: enterprise: register supply regulator before child regulator
Laxman Dewangan [Fri, 27 Apr 2012 17:15:38 +0000]
ARM: tegra: enterprise: register supply regulator before child regulator

LDO3 has the input from the VIO output and hence VIO should be
register before LDO3 for regulator registration.

bug 976254

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/99446

Change-Id: I6771af3e7eb93886e974695ab3550cdf8ebc52c4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100262
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: whistler: Set I2c pin drive strength to max
Laxman Dewangan [Thu, 22 Mar 2012 13:31:45 +0000]
ARM: tegra: whistler: Set I2c pin drive strength to max

Setting i2c drive strenth to maximum and pulling all pins
to high.
bug 951052
bug 958415
bug 927583

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91805

Change-Id: Ia2bf4ccba6d4c47411e59fb9567dc4e3c2db76ae
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100261
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: ventana: Set drive strength to max for all i2c pins
Laxman Dewangan [Fri, 23 Mar 2012 09:02:24 +0000]
ARM: tegra: ventana: Set drive strength to max for all i2c pins

Setting drive strength to maiximum for all i2c pins.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91952

Change-Id: I8882dd238af34e06c924f2e160d0897111e8103d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100260
Reviewed-by: Automatic_Commit_Validation_User

7 years agoARM: tegra: whistler: Add slave address for i2c driver
Laxman Dewangan [Fri, 23 Mar 2012 09:00:33 +0000]
ARM: tegra: whistler: Add slave address for i2c driver

Configuring all i2c controller to have slave addresss to 0xFC
(unused slave address) to avoid responding the slave with general
call address.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91951

Change-Id: Id1a45f46cfc5ffa3a48b01c0bae71c4ee9ab699b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100259
Reviewed-by: Automatic_Commit_Validation_User

7 years agoRevert "video: tegra: dc: Set default videomode"
Hunk Lin [Wed, 2 May 2012 21:35:47 +0000]
Revert "video: tegra: dc: Set default videomode"

This reverts commit 9349cedf17f9b3c10760c8d48f831473f87a3a15.

It is reviewed on http://git-master/r/99635
It will cause HDMI power ON and emc clock bump up to 667Mhz
after resume from LP0.

bug 930136

Change-Id: I130494fdb381b3d322ac0e3fc8be2e44f2c2d7a7
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/100202
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

7 years agoARM: tegra: power: Enforce CPU rate range in min cpu notifier
Alex Frid [Fri, 20 Apr 2012 06:04:28 +0000]
ARM: tegra: power: Enforce CPU rate range in min cpu notifier

On Tegra3 make sure cpu rate is within G-mode range before LP to G
mode switch triggered by minimum CPUs notifier.

Bug 964208

Change-Id: Ic4ee6bc7eca5ad0902da4907e4702f296a155280
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/99834
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoarm: tegra: enterprise: Set gpio LCD_D8 to tristate
Karthik Ramakrishnan [Mon, 28 Nov 2011 19:27:18 +0000]
arm: tegra: enterprise: Set gpio LCD_D8 to tristate

LCD_D8 used for BAT_REMOVAL staus from PMU to be
programmed as input/tristate to in line with hardware
schematics. It is connected VIO_IN

Bug 955519
(Cherry picked from I692d8d805c54da3996c33b9837b197a6995689c8)
Change-Id: I68e6566249675cd5fce8aa954983478e4fc29a4c
Reviewed-On: http://git-master/r/#change,91589
Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Reviewed-on: http://git-master/r/99742
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agogpio: tegra: implement gpio_request and gpio_free.
Laxman Dewangan [Tue, 24 Apr 2012 13:33:26 +0000]
gpio: tegra: implement gpio_request and gpio_free.

Recent pinctrl discussions concluded that gpiolib APIs
should in fact do whatever is required to mux a GPIO onto
pins.
This change is based on the work done by Stephen Warren in mainline
kernel.
-----
commit 3e215d0a19c2a0c389bd9117573b6dd8e46f96a8

    gpio: tegra: Hide tegra_gpio_enable/disable()

    Recent pinctrl discussions concluded that gpiolib APIs should in fact do
    whatever is required to mux a GPIO onto pins, by calling pinctrl APIs if
    required. This change implements this for the Tegra GPIO driver, and removes
    calls to the Tegra-specific APIs from drivers and board files.
----

Change-Id: I482ea5c177cf2ee6fa06ddac48b556f1508efacb
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/98466
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>

7 years agovideo: tegra: dsi: Ref-count pllp_out3 clock in DSI.
Kevin Huang [Mon, 23 Apr 2012 20:59:55 +0000]
video: tegra: dsi: Ref-count pllp_out3 clock in DSI.

Bug 933653

Change-Id: If7ce4dc5129782a7e3487028d2dba01c9380ba90
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/98256
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

7 years agoARM: tegra: clock: Add DSI implicit dependency on PLLP
Alex Frid [Sun, 22 Apr 2012 03:08:40 +0000]
ARM: tegra: clock: Add DSI implicit dependency on PLLP

Added dsi fixed clock entry derived from PLLP_OUT3. This would allow
DC driver to properly ref-count implicit dependency of DSI operations
on PLLP_OUT3 clock.

Bug 933653

Change-Id: I71e6ada13f9d231c5a4924f345cdbf7cf05cd59e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/98103
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

7 years agoarm: tegra: Update pinmux setting for nct alert
Ashwini Ghuge [Fri, 27 Apr 2012 07:26:32 +0000]
arm: tegra: Update pinmux setting for nct alert

Set KB_ROW11 pin to default PULL_UP to fix
the excessive interrupts from nct alert.

Bug 973536

Change-Id: Idab3769f3fe1945f5e0f487f7bd23a7c0b58d5d1
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/99339
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hunk Lin <hulin@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agoRevert "arm: tegra3: change min_rate for clocks"
Amit Kamath [Thu, 26 Apr 2012 04:17:35 +0000]
Revert "arm: tegra3: change min_rate for clocks"

This reverts commit 5dc206986103aaa443fa6b0ef6fef20bcb35d299 because
it causes noisy audio playback on Tegra3 platforms with secure-os.

Bug 939415

Change-Id: Ib19962dd57a2560945d1c0ed49b3eade2c751446
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/98986
Reviewed-by: Automatic_Commit_Validation_User

7 years agonet: wireless: sd8797: change wlan interface to wlan0
Narayan Reddy [Thu, 26 Apr 2012 05:04:33 +0000]
net: wireless: sd8797: change wlan interface to wlan0

Change wlan interface from mlan to wlan.

Bug 954218

Change-Id: I5b2b2840a4830eda908a47cc0fc59d0479a1df34
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/98997
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>

7 years agoarm: tegra3: configs:marvel driver as a module
Narayan Reddy [Tue, 24 Apr 2012 12:39:11 +0000]
arm: tegra3: configs:marvel driver as a module

enable marvel driver as module to load at boot time

Bug 954218

Change-Id: I7dc6385dcbad7b7a7960b688c6d74bd6bc35cad9
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/98454
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

7 years agommc: host: Disable SDIO card clock when idle for Tegra 3 only
Mursalin Akon [Fri, 27 Apr 2012 22:21:05 +0000]
mmc: host: Disable SDIO card clock when idle for Tegra 3 only

The CL disables SDIO card clock when idle for Tegra 3 only.

Bonus: conditional build for some tegra 3 functionalities.

Bug 975541

Change-Id: I097c4771f3565bf9137d7854ada10c1fe8535056
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/99707
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Peer Chen <pchen@nvidia.com>

7 years agovideo: tegra: fb: Enable window state while pan
Shashank Sharma [Fri, 27 Apr 2012 11:24:04 +0000]
video: tegra: fb: Enable window state while pan

Set window enabled flag in pan display. This fixes a blank
window display while switching console from dc_ext device to
framebuffer device, and allows dc_ext and fbdev to co-exist.

Removed previous work around to unblank fb from
tegra_dc_blank function.

Bug: 970263
Bug: 963480

Change-Id: I9853da211f78815246965d240d1717345c5ab391
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/99422
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>