[XTENSA] Add kernel module support
Chris Zankel [Tue, 14 Aug 2007 20:02:06 +0000 (13:02 -0700)]
Add kernel module support.

Signed-off-by: Chris Zankel <chris@zankel.net>

arch/xtensa/kernel/module.c
include/asm-xtensa/elf.h

index 2ea1755..ddf14dc 100644 (file)
@@ -7,7 +7,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2001 - 2005 Tensilica Inc.
+ * Copyright (C) 2001 - 2006 Tensilica Inc.
  *
  * Chris Zankel <chris@zankel.net>
  *
 #include <linux/kernel.h>
 #include <linux/cache.h>
 
-LIST_HEAD(module_buf_list);
+#undef DEBUG_RELOCATE
 
 void *module_alloc(unsigned long size)
 {
-  panic("module_alloc not implemented");
+       if (size == 0)
+               return NULL;
+       return vmalloc(size);
 }
 
 void module_free(struct module *mod, void *module_region)
 {
-  panic("module_free not implemented");
+       vfree(module_region);
+       /* FIXME: If module_region == mod->init_region, trim exception
+          table entries. */
 }
 
 int module_frob_arch_sections(Elf32_Ehdr *hdr,
                              Elf32_Shdr *sechdrs,
                              char *secstrings,
-                             struct module *me)
+                             struct module *mod)
 {
-  panic("module_frob_arch_sections not implemented");
+       return 0;
+}
+
+static int
+decode_calln_opcode (unsigned char *location)
+{
+#ifdef __XTENSA_EB__
+       return (location[0] & 0xf0) == 0x50;
+#endif
+#ifdef __XTENSA_EL__
+       return (location[0] & 0xf) == 0x5;
+#endif
+}
+
+static int
+decode_l32r_opcode (unsigned char *location)
+{
+#ifdef __XTENSA_EB__
+       return (location[0] & 0xf0) == 0x10;
+#endif
+#ifdef __XTENSA_EL__
+       return (location[0] & 0xf) == 0x1;
+#endif
 }
 
 int apply_relocate(Elf32_Shdr *sechdrs,
                   const char *strtab,
                   unsigned int symindex,
                   unsigned int relsec,
-                  struct module *module)
+                  struct module *mod)
 {
-  panic ("apply_relocate not implemented");
+        printk(KERN_ERR "module %s: REL RELOCATION unsupported\n",
+               mod->name);
+        return -ENOEXEC;
+
 }
 
 int apply_relocate_add(Elf32_Shdr *sechdrs,
                       const char *strtab,
                       unsigned int symindex,
                       unsigned int relsec,
-                      struct module *module)
+                      struct module *mod)
 {
-  panic("apply_relocate_add not implemented");
+       unsigned int i;
+        Elf32_Rela *rela = (void *)sechdrs[relsec].sh_addr;
+       Elf32_Sym *sym;
+       unsigned char *location;
+       uint32_t value;
+
+#ifdef DEBUG_RELOCATE
+       printk("Applying relocate section %u to %u\n", relsec,
+              sechdrs[relsec].sh_info);
+#endif
+       for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rela); i++) {
+               location = (char *)sechdrs[sechdrs[relsec].sh_info].sh_addr
+                       + rela[i].r_offset;
+               sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
+                       + ELF32_R_SYM(rela[i].r_info);
+               value = sym->st_value + rela[i].r_addend;
+
+               switch (ELF32_R_TYPE(rela[i].r_info)) {
+               case R_XTENSA_NONE:
+               case R_XTENSA_DIFF8:
+               case R_XTENSA_DIFF16:
+               case R_XTENSA_DIFF32:
+               case R_XTENSA_ASM_EXPAND:
+                       break;
+
+               case R_XTENSA_32:
+               case R_XTENSA_PLT:
+                       *(uint32_t *)location += value;
+                       break;
+
+               case R_XTENSA_SLOT0_OP:
+                       if (decode_calln_opcode(location)) {
+                               value -= ((unsigned long)location & -4) + 4;
+                               if ((value & 3) != 0 ||
+                                   ((value + (1 << 19)) >> 20) != 0) {
+                                       printk("%s: relocation out of range, "
+                                              "section %d reloc %d "
+                                              "sym '%s'\n",
+                                              mod->name, relsec, i,
+                                              strtab + sym->st_name);
+                                       return -ENOEXEC;
+                               }
+                               value = (signed int)value >> 2;
+#ifdef __XTENSA_EB__
+                               location[0] = ((location[0] & ~0x3) |
+                                           ((value >> 16) & 0x3));
+                               location[1] = (value >> 8) & 0xff;
+                               location[2] = value & 0xff;
+#endif
+#ifdef __XTENSA_EL__
+                               location[0] = ((location[0] & ~0xc0) |
+                                           ((value << 6) & 0xc0));
+                               location[1] = (value >> 2) & 0xff;
+                               location[2] = (value >> 10) & 0xff;
+#endif
+                       } else if (decode_l32r_opcode(location)) {
+                               value -= (((unsigned long)location + 3) & -4);
+                               if ((value & 3) != 0 ||
+                                   (signed int)value >> 18 != -1) {
+                                       printk("%s: relocation out of range, "
+                                              "section %d reloc %d "
+                                              "sym '%s'\n",
+                                              mod->name, relsec, i,
+                                              strtab + sym->st_name);
+                                       return -ENOEXEC;
+                               }
+                               value = (signed int)value >> 2;
+
+#ifdef __XTENSA_EB__
+                               location[1] = (value >> 8) & 0xff;
+                               location[2] = value & 0xff;
+#endif
+#ifdef __XTENSA_EL__
+                               location[1] = value & 0xff;
+                               location[2] = (value >> 8) & 0xff;
+#endif
+                       }
+                       /* FIXME: Ignore any other opcodes.  The Xtensa
+                          assembler currently assumes that the linker will
+                          always do relaxation and so all PC-relative
+                          operands need relocations.  (The assembler also
+                          writes out the tentative PC-relative values,
+                          assuming no link-time relaxation, so it is usually
+                          safe to ignore the relocations.)  If the
+                          assembler's "--no-link-relax" flag can be made to
+                          work, and if all kernel modules can be assembled
+                          with that flag, then unexpected relocations could
+                          be detected here.  */
+                       break;
+
+               case R_XTENSA_SLOT1_OP:
+               case R_XTENSA_SLOT2_OP:
+               case R_XTENSA_SLOT3_OP:
+               case R_XTENSA_SLOT4_OP:
+               case R_XTENSA_SLOT5_OP:
+               case R_XTENSA_SLOT6_OP:
+               case R_XTENSA_SLOT7_OP:
+               case R_XTENSA_SLOT8_OP:
+               case R_XTENSA_SLOT9_OP:
+               case R_XTENSA_SLOT10_OP:
+               case R_XTENSA_SLOT11_OP:
+               case R_XTENSA_SLOT12_OP:
+               case R_XTENSA_SLOT13_OP:
+               case R_XTENSA_SLOT14_OP:
+                       printk("%s: unexpected FLIX relocation: %u\n",
+                              mod->name,
+                              ELF32_R_TYPE(rela[i].r_info));
+                       return -ENOEXEC;
+
+               case R_XTENSA_SLOT0_ALT:
+               case R_XTENSA_SLOT1_ALT:
+               case R_XTENSA_SLOT2_ALT:
+               case R_XTENSA_SLOT3_ALT:
+               case R_XTENSA_SLOT4_ALT:
+               case R_XTENSA_SLOT5_ALT:
+               case R_XTENSA_SLOT6_ALT:
+               case R_XTENSA_SLOT7_ALT:
+               case R_XTENSA_SLOT8_ALT:
+               case R_XTENSA_SLOT9_ALT:
+               case R_XTENSA_SLOT10_ALT:
+               case R_XTENSA_SLOT11_ALT:
+               case R_XTENSA_SLOT12_ALT:
+               case R_XTENSA_SLOT13_ALT:
+               case R_XTENSA_SLOT14_ALT:
+                       printk("%s: unexpected ALT relocation: %u\n",
+                              mod->name,
+                              ELF32_R_TYPE(rela[i].r_info));
+                       return -ENOEXEC;
+
+               default:
+                       printk("%s: unexpected relocation: %u\n",
+                              mod->name,
+                              ELF32_R_TYPE(rela[i].r_info));
+                       return -ENOEXEC;
+               }
+       }
+       return 0;
 }
 
 int module_finalize(const Elf_Ehdr *hdr,
                    const Elf_Shdr *sechdrs,
-                   struct module *me)
+                   struct module *mod)
 {
-  panic ("module_finalize not implemented");
+       return 0;
 }
 
 void module_arch_cleanup(struct module *mod)
 {
-  panic("module_arch_cleanup not implemented");
-}
-
-struct bug_entry *module_find_bug(unsigned long bugaddr)
-{
-  panic("module_find_bug not implemented");
 }
index 1569b53..7083d46 100644 (file)
 #define EM_XTENSA      94
 #define EM_XTENSA_OLD  0xABC7
 
+/* Xtensa relocations defined by the ABIs */
+
+#define R_XTENSA_NONE           0
+#define R_XTENSA_32             1
+#define R_XTENSA_RTLD           2
+#define R_XTENSA_GLOB_DAT       3
+#define R_XTENSA_JMP_SLOT       4
+#define R_XTENSA_RELATIVE       5
+#define R_XTENSA_PLT            6
+#define R_XTENSA_OP0            8
+#define R_XTENSA_OP1            9
+#define R_XTENSA_OP2            10
+#define R_XTENSA_ASM_EXPAND    11
+#define R_XTENSA_ASM_SIMPLIFY  12
+#define R_XTENSA_GNU_VTINHERIT 15
+#define R_XTENSA_GNU_VTENTRY   16
+#define R_XTENSA_DIFF8         17
+#define R_XTENSA_DIFF16                18
+#define R_XTENSA_DIFF32                19
+#define R_XTENSA_SLOT0_OP      20
+#define R_XTENSA_SLOT1_OP      21
+#define R_XTENSA_SLOT2_OP      22
+#define R_XTENSA_SLOT3_OP      23
+#define R_XTENSA_SLOT4_OP      24
+#define R_XTENSA_SLOT5_OP      25
+#define R_XTENSA_SLOT6_OP      26
+#define R_XTENSA_SLOT7_OP      27
+#define R_XTENSA_SLOT8_OP      28
+#define R_XTENSA_SLOT9_OP      29
+#define R_XTENSA_SLOT10_OP     30
+#define R_XTENSA_SLOT11_OP     31
+#define R_XTENSA_SLOT12_OP     32
+#define R_XTENSA_SLOT13_OP     33
+#define R_XTENSA_SLOT14_OP     34
+#define R_XTENSA_SLOT0_ALT     35
+#define R_XTENSA_SLOT1_ALT     36
+#define R_XTENSA_SLOT2_ALT     37
+#define R_XTENSA_SLOT3_ALT     38
+#define R_XTENSA_SLOT4_ALT     39
+#define R_XTENSA_SLOT5_ALT     40
+#define R_XTENSA_SLOT6_ALT     41
+#define R_XTENSA_SLOT7_ALT     42
+#define R_XTENSA_SLOT8_ALT     43
+#define R_XTENSA_SLOT9_ALT     44
+#define R_XTENSA_SLOT10_ALT    45
+#define R_XTENSA_SLOT11_ALT    46
+#define R_XTENSA_SLOT12_ALT    47
+#define R_XTENSA_SLOT13_ALT    48
+#define R_XTENSA_SLOT14_ALT    49
+
 /* ELF register definitions. This is needed for core dump support.  */
 
 /*