bnx2x: Fix BCM84833 link
Yaniv Rosner [Tue, 2 Aug 2011 22:59:53 +0000 (22:59 +0000)]
BCM84833 fail to link due to incorrect auto-negotiation setting.

Signed-off-by: Yaniv Rosner <yanivr@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

drivers/net/bnx2x/bnx2x_link.c

index 6a3fdf8..cf8b8d1 100644 (file)
@@ -9268,7 +9268,13 @@ static int bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy,
        if (phy->req_duplex == DUPLEX_FULL)
                autoneg_val |= (1<<8);
 
-       bnx2x_cl45_write(bp, phy,
+       /*
+        * Always write this if this is not 84833.
+        * For 84833, write it only when it's a forced speed.
+        */
+       if ((phy->type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) ||
+               ((autoneg_val & (1<<12)) == 0))
+               bnx2x_cl45_write(bp, phy,
                         MDIO_AN_DEVAD,
                         MDIO_AN_REG_8481_LEGACY_MII_CTRL, autoneg_val);
 
@@ -9282,13 +9288,12 @@ static int bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy,
                        bnx2x_cl45_write(bp, phy,
                                 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL,
                                 0x3200);
-       } else if (phy->req_line_speed != SPEED_10 &&
-                  phy->req_line_speed != SPEED_100) {
+       } else
                bnx2x_cl45_write(bp, phy,
                                 MDIO_AN_DEVAD,
                                 MDIO_AN_REG_8481_10GBASE_T_AN_CTRL,
                                 1);
-       }
+
        /* Save spirom version */
        bnx2x_save_848xx_spirom_version(phy, params);
 
@@ -9781,11 +9786,9 @@ static void bnx2x_848x3_link_reset(struct bnx2x_phy *phy,
                bnx2x_cl45_read(bp, phy,
                                MDIO_CTL_DEVAD,
                                0x400f, &val16);
-               /* Put to low power mode on newer FW */
-               if ((val16 & 0x303f) > 0x1009)
-                       bnx2x_cl45_write(bp, phy,
-                                       MDIO_PMA_DEVAD,
-                                       MDIO_PMA_REG_CTRL, 0x800);
+               bnx2x_cl45_write(bp, phy,
+                               MDIO_PMA_DEVAD,
+                               MDIO_PMA_REG_CTRL, 0x800);
        }
 }