ARM: tegra11: dvfs: Update LP CPU dvfs table
Alex Frid [Thu, 25 Oct 2012 05:59:18 +0000 (22:59 -0700)]
Change-Id: I47c5f2eae9ad0cbb1685c232308cc30bf7b2e6bf
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/147679
(cherry picked from commit ed29f1c25fe727023f8624536a78fbe45ab91689)
Reviewed-on: http://git-master/r/161068
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

arch/arm/mach-tegra/tegra11_dvfs.c

index 506a549..0531153 100644 (file)
@@ -136,7 +136,7 @@ static struct dvfs core_dvfs_table[] = {
        /* Core voltages (mV):                  1000,  1050,     1100,    1120, */
        /* Clock limits for internal blocks, PLLs */
 #ifndef CONFIG_TEGRA_SIMULATION_PLATFORM
-       CORE_DVFS("cpu_lp", -1, 1, KHZ,       288000, 372000,  468000,  468000),
+       CORE_DVFS("cpu_lp", -1, 1, KHZ,       384000, 504000,  624000,  660000),
        CORE_DVFS("emc",   -1, 1, KHZ,        384000, 528000,  800000,  800000),
        CORE_DVFS("sbus",  -1, 1, KHZ,        136000, 204000,  204000,  204000),