V4L/DVB (13657): tw9910: Add revision control to tw9910_set_hsync
Kuninori Morimoto [Fri, 11 Dec 2009 14:34:51 +0000 (11:34 -0300)]
Bits 10-3 of hsync control are the same for Rev0 and Rev1, but only Rev1
also has bits 2-0 for hsync. Account for this difference and also fix a
register name.

Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

drivers/media/video/tw9910.c

index 2256ba6..8ec1031 100644 (file)
 #define LCTL24         0x68
 #define LCTL25         0x69
 #define LCTL26         0x6A
-#define HSGEGIN                0x6B
+#define HSBEGIN                0x6B
 #define HSEND          0x6C
 #define OVSDLY         0x6D
 #define OVSEND         0x6E
@@ -443,10 +443,11 @@ static int tw9910_set_cropping(struct i2c_client *client,
 static int tw9910_set_hsync(struct i2c_client *client,
                            const struct tw9910_hsync_ctrl *hsync)
 {
+       struct tw9910_priv *priv = to_tw9910(client);
        int ret;
 
        /* bit 10 - 3 */
-       ret = i2c_smbus_write_byte_data(client, HSGEGIN,
+       ret = i2c_smbus_write_byte_data(client, HSBEGIN,
                                        (hsync->start & 0x07F8) >> 3);
        if (ret < 0)
                return ret;
@@ -457,10 +458,12 @@ static int tw9910_set_hsync(struct i2c_client *client,
        if (ret < 0)
                return ret;
 
+       /* So far only revisions 0 and 1 have been seen */
        /* bit 2 - 0 */
-       ret = tw9910_mask_set(client, HSLOWCTL, 0x77,
-                             (hsync->start & 0x0007) << 4 |
-                             (hsync->end   & 0x0007));
+       if (1 == priv->revision)
+               ret = tw9910_mask_set(client, HSLOWCTL, 0x77,
+                                     (hsync->start & 0x0007) << 4 |
+                                     (hsync->end   & 0x0007));
 
        return ret;
 }