mmc: sh_mmcif: double clock speed
Simon Horman [Wed, 28 Mar 2012 09:01:09 +0000 (18:01 +0900)]
Correct an off-by one error when calculating the clock divisor in cases
where the host clock is a power of two of the target clock.  Previously the
divisor was one greater than the correct value in these cases leading to
the clock being set at half the desired speed.

Thanks to Guennadi Liakhovetski for working with me on the logic for this
change.

Tested-by: Cao Minh Hiep <hiepcm@gmail.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Chris Ball <cjb@laptop.org>

drivers/mmc/host/sh_mmcif.c

index aafaf0b..d79c643 100644 (file)
@@ -454,7 +454,8 @@ static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk)
                sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_SUP_PCLK);
        else
                sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_CLEAR &
-                               ((fls(host->clk / clk) - 1) << 16));
+                               ((fls(DIV_ROUND_UP(host->clk,
+                                                  clk) - 1) - 1) << 16));
 
        sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_ENABLE);
 }