tegra:pcie: Correct pcie check link sequence
Jay Agarwal [Fri, 9 Mar 2012 12:21:02 +0000 (17:21 +0530)]
1. Removed mdelay in reset code since pci devices
   are not detected with this.
2. Moved the reset logic down in retry label.

Bug 637871

Change-Id: Idd6344860e513407d5f8c8ba05e1beef0f39bf57
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/89128
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

arch/arm/mach-tegra/pcie.c

index 462142f..6a42436 100644 (file)
@@ -1040,13 +1040,6 @@ static bool tegra_pcie_check_link(struct tegra_pcie_port *pp, int idx,
        int timeout;
 
        do {
-               /* Pulse the PEX reset */
-               reg = afi_readl(reset_reg) & ~AFI_PEX_CTRL_RST;
-               afi_writel(reg, reset_reg);
-               mdelay(1);
-               reg = afi_readl(reset_reg) | AFI_PEX_CTRL_RST;
-               afi_writel(reg, reset_reg);
-
                timeout = TEGRA_PCIE_LINKUP_TIMEOUT;
                while (timeout) {
                        reg = readl(pp->base + RP_VEND_XP);
@@ -1075,6 +1068,12 @@ static bool tegra_pcie_check_link(struct tegra_pcie_port *pp, int idx,
                }
 
 retry:
+               /* Pulse the PEX reset */
+               reg = afi_readl(reset_reg) & ~AFI_PEX_CTRL_RST;
+               afi_writel(reg, reset_reg);
+               reg = afi_readl(reset_reg) | AFI_PEX_CTRL_RST;
+               afi_writel(reg, reset_reg);
+
                retries--;
        } while (retries);