drm/radeon: add GET_PARAM/INFO support for Z pipes
Alex Deucher [Wed, 19 Aug 2009 23:11:39 +0000 (19:11 -0400)]
Needed for occlusion queries on rv530 chips.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drivers/gpu/drm/radeon/r300.c
drivers/gpu/drm/radeon/r420.c
drivers/gpu/drm/radeon/r520.c
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_cp.c
drivers/gpu/drm/radeon/radeon_drv.h
drivers/gpu/drm/radeon/radeon_kms.c
drivers/gpu/drm/radeon/radeon_reg.h
drivers/gpu/drm/radeon/radeon_state.c
include/drm/radeon_drm.h

index c47579d..053f4ec 100644 (file)
@@ -448,6 +448,7 @@ void r300_gpu_init(struct radeon_device *rdev)
                /* rv350,rv370,rv380 */
                rdev->num_gb_pipes = 1;
        }
+       rdev->num_z_pipes = 1;
        gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16);
        switch (rdev->num_gb_pipes) {
        case 2:
@@ -486,7 +487,8 @@ void r300_gpu_init(struct radeon_device *rdev)
                printk(KERN_WARNING "Failed to wait MC idle while "
                       "programming pipes. Bad things might happen.\n");
        }
-       DRM_INFO("radeon: %d pipes initialized.\n", rdev->num_gb_pipes);
+       DRM_INFO("radeon: %d quad pipes, %d Z pipes initialized.\n",
+                rdev->num_gb_pipes, rdev->num_z_pipes);
 }
 
 int r300_ga_reset(struct radeon_device *rdev)
index dea497a..97426a6 100644 (file)
@@ -165,7 +165,18 @@ void r420_pipes_init(struct radeon_device *rdev)
                printk(KERN_WARNING "Failed to wait GUI idle while "
                       "programming pipes. Bad things might happen.\n");
        }
-       DRM_INFO("radeon: %d pipes initialized.\n", rdev->num_gb_pipes);
+
+       if (rdev->family == CHIP_RV530) {
+               tmp = RREG32(RV530_GB_PIPE_SELECT2);
+               if ((tmp & 3) == 3)
+                       rdev->num_z_pipes = 2;
+               else
+                       rdev->num_z_pipes = 1;
+       } else
+               rdev->num_z_pipes = 1;
+
+       DRM_INFO("radeon: %d quad pipes, %d z pipes initialized.\n",
+                rdev->num_gb_pipes, rdev->num_z_pipes);
 }
 
 void r420_gpu_init(struct radeon_device *rdev)
index 09fb0b6..ebd6b0f 100644 (file)
@@ -177,7 +177,6 @@ void r520_gpu_init(struct radeon_device *rdev)
         */
        /* workaround for RV530 */
        if (rdev->family == CHIP_RV530) {
-               WREG32(0x4124, 1);
                WREG32(0x4128, 0xFF);
        }
        r420_pipes_init(rdev);
index 79ad982..b519fb2 100644 (file)
@@ -655,6 +655,7 @@ struct radeon_device {
        int                             usec_timeout;
        enum radeon_pll_errata          pll_errata;
        int                             num_gb_pipes;
+       int                             num_z_pipes;
        int                             disp_priority;
        /* BIOS */
        uint8_t                         *bios;
index d835682..7a52c46 100644 (file)
@@ -406,6 +406,15 @@ static void radeon_init_pipes(drm_radeon_private_t *dev_priv)
 {
        uint32_t gb_tile_config, gb_pipe_sel = 0;
 
+       if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) {
+               uint32_t z_pipe_sel = RADEON_READ(RV530_GB_PIPE_SELECT2);
+               if ((z_pipe_sel & 3) == 3)
+                       dev_priv->num_z_pipes = 2;
+               else
+                       dev_priv->num_z_pipes = 1;
+       } else
+               dev_priv->num_z_pipes = 1;
+
        /* RS4xx/RS6xx/R4xx/R5xx */
        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R420) {
                gb_pipe_sel = RADEON_READ(R400_GB_PIPE_SELECT);
index 3933f82..6fa32da 100644 (file)
  * 1.28- Add support for VBL on CRTC2
  * 1.29- R500 3D cmd buffer support
  * 1.30- Add support for occlusion queries
+ * 1.31- Add support for num Z pipes from GET_PARAM
  */
 #define DRIVER_MAJOR           1
-#define DRIVER_MINOR           30
+#define DRIVER_MINOR           31
 #define DRIVER_PATCHLEVEL      0
 
 /*
@@ -329,6 +330,7 @@ typedef struct drm_radeon_private {
        resource_size_t fb_aper_offset;
 
        int num_gb_pipes;
+       int num_z_pipes;
        int track_flush;
        drm_local_map_t *mmio;
 
@@ -689,6 +691,7 @@ extern void r600_page_table_cleanup(struct drm_device *dev, struct drm_ati_pciga
 
 /* pipe config regs */
 #define R400_GB_PIPE_SELECT             0x402c
+#define RV530_GB_PIPE_SELECT2           0x4124
 #define R500_DYN_SCLK_PWMEM_PIPE        0x000d /* PLL */
 #define R300_GB_TILE_CONFIG             0x4018
 #       define R300_ENABLE_TILING       (1 << 0)
index 11ed672..dce09ad 100644 (file)
@@ -95,6 +95,9 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
        case RADEON_INFO_NUM_GB_PIPES:
                value = rdev->num_gb_pipes;
                break;
+       case RADEON_INFO_NUM_Z_PIPES:
+               value = rdev->num_z_pipes;
+               break;
        default:
                DRM_DEBUG("Invalid request %d\n", info->request);
                return -EINVAL;
index 5834497..4df43f6 100644 (file)
 #define RADEON_SCRATCH_REG4            0x15f0
 #define RADEON_SCRATCH_REG5            0x15f4
 
+#define RV530_GB_PIPE_SELECT2           0x4124
+
 #endif
index 46645f3..2882f40 100644 (file)
@@ -3081,6 +3081,9 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil
        case RADEON_PARAM_NUM_GB_PIPES:
                value = dev_priv->num_gb_pipes;
                break;
+       case RADEON_PARAM_NUM_Z_PIPES:
+               value = dev_priv->num_z_pipes;
+               break;
        default:
                DRM_DEBUG("Invalid parameter %d\n", param->param);
                return -EINVAL;
index b439255..2ba61e1 100644 (file)
@@ -709,6 +709,7 @@ typedef struct drm_radeon_indirect {
 #define RADEON_PARAM_FB_LOCATION           14   /* FB location */
 #define RADEON_PARAM_NUM_GB_PIPES          15   /* num GB pipes */
 #define RADEON_PARAM_DEVICE_ID             16
+#define RADEON_PARAM_NUM_Z_PIPES           17   /* num Z pipes */
 
 typedef struct drm_radeon_getparam {
        int param;
@@ -897,6 +898,7 @@ struct drm_radeon_cs {
 
 #define RADEON_INFO_DEVICE_ID          0x00
 #define RADEON_INFO_NUM_GB_PIPES       0x01
+#define RADEON_INFO_NUM_Z_PIPES        0x02
 
 struct drm_radeon_info {
        uint32_t                request;