video: tegra: host: Support per Soc hardware headers
Terje Bergstrom [Fri, 8 Jun 2012 08:40:27 +0000 (11:40 +0300)]
Make all chip specific functions static. Include the chip specific
functions in SoC files after including the hardware headers. This
makes the chip specific functions to be compiled per SoC, and with
the correct hardware definitions.

Bug 982965

Change-Id: I4774d4dc351951cb886d9d4da66cf021f3f0121e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/107581
Reviewed-by: Automatic_Commit_Validation_User

23 files changed:
drivers/video/tegra/host/gr3d/gr3d.c
drivers/video/tegra/host/gr3d/gr3d_t20.c
drivers/video/tegra/host/gr3d/gr3d_t20.h
drivers/video/tegra/host/gr3d/gr3d_t30.c
drivers/video/tegra/host/gr3d/gr3d_t30.h
drivers/video/tegra/host/host1x/Makefile
drivers/video/tegra/host/host1x/host1x01_hardware.h [moved from drivers/video/tegra/host/host1x/host1x_hardware.h with 93% similarity]
drivers/video/tegra/host/host1x/host1x_cdma.c
drivers/video/tegra/host/host1x/host1x_cdma.h
drivers/video/tegra/host/host1x/host1x_channel.c
drivers/video/tegra/host/host1x/host1x_channel.h [deleted file]
drivers/video/tegra/host/host1x/host1x_debug.c
drivers/video/tegra/host/host1x/host1x_intr.c
drivers/video/tegra/host/host1x/host1x_syncpt.c
drivers/video/tegra/host/host1x/host1x_syncpt.h
drivers/video/tegra/host/host1x/hw_host1x01_channel.h [moved from drivers/video/tegra/host/host1x/hw_host1x_channel.h with 100% similarity]
drivers/video/tegra/host/host1x/hw_host1x01_sync.h [moved from drivers/video/tegra/host/host1x/hw_host1x_sync.h with 100% similarity]
drivers/video/tegra/host/host1x/hw_host1x01_uclass.h [moved from drivers/video/tegra/host/host1x/hw_host1x_uclass.h with 100% similarity]
drivers/video/tegra/host/mpe/mpe.c
drivers/video/tegra/host/t20/t20.c
drivers/video/tegra/host/t20/t20.h
drivers/video/tegra/host/t30/t30.c
drivers/video/tegra/host/t30/t30.h

index 3cc041d..e2af384 100644 (file)
@@ -22,9 +22,7 @@
 #include <mach/gpufuse.h>
 
 #include "t20/t20.h"
-#include "host1x/host1x_channel.h"
-#include "host1x/host1x_hardware.h"
-#include "host1x/host1x_syncpt.h"
+#include "host1x/host1x01_hardware.h"
 #include "nvhost_hwctx.h"
 #include "dev.h"
 #include "gr3d.h"
index 23cd155..b6e3896 100644 (file)
@@ -21,9 +21,7 @@
 #include "nvhost_hwctx.h"
 #include "nvhost_channel.h"
 #include "host1x/host1x.h"
-#include "host1x/host1x_channel.h"
-#include "host1x/host1x_hardware.h"
-#include "host1x/host1x_syncpt.h"
+#include "host1x/host1x01_hardware.h"
 #include "gr3d.h"
 #include "chip_support.h"
 #include "nvhost_memmgr.h"
index 5fe6d50..e6fb8fd 100644 (file)
 #ifndef __NVHOST_GR3D_GR3D_T20_H
 #define __NVHOST_GR3D_GR3D_T20_H
 
+#include <linux/types.h>
+
 struct nvhost_hwctx_handler;
+struct nvhost_channel;
 
 struct nvhost_hwctx_handler *nvhost_gr3d_t20_ctxhandler_init(
                u32 syncpt, u32 waitbase,
index efff613..8674a91 100644 (file)
@@ -22,8 +22,7 @@
 #include "nvhost_channel.h"
 #include "nvhost_cdma.h"
 #include "dev.h"
-#include "host1x/host1x_hardware.h"
-#include "host1x/host1x_syncpt.h"
+#include "host1x/host1x01_hardware.h"
 #include "gr3d.h"
 #include "chip_support.h"
 #include "nvhost_memmgr.h"
index d1b787e..94d5dc0 100644 (file)
 #ifndef __NVHOST_GR3D_GR3D_T30_H
 #define __NVHOST_GR3D_GR3D_T30_H
 
+#include <linux/types.h>
+
 struct nvhost_hwctx_handler;
+struct nvhost_channel;
 
 struct nvhost_hwctx_handler *nvhost_gr3d_t30_ctxhandler_init(
                u32 syncpt, u32 waitbase,
index 55fcb37..7666494 100644 (file)
@@ -3,11 +3,6 @@ GCOV_PROFILE := y
 EXTRA_CFLAGS += -Idrivers/video/tegra/host
 
 nvhost-host1x-objs  = \
-       host1x.o \
-       host1x_syncpt.o \
-       host1x_channel.o \
-       host1x_intr.o \
-       host1x_cdma.o \
-       host1x_debug.o
+       host1x.o
 
 obj-$(CONFIG_TEGRA_GRHOST) += nvhost-host1x.o
@@ -1,7 +1,7 @@
 /*
- * drivers/video/tegra/host/host1x/host1x_hardware.h
+ * drivers/video/tegra/host/host1x/host1x01_hardware.h
  *
- * Tegra Graphics Host Register Offsets
+ * Tegra Graphics Host Register Offsets for T20/T30
  *
  * Copyright (c) 2010-2012 NVIDIA Corporation.
  *
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#ifndef __NVHOST_HOST1X_HOST1X_HARDWARE_H
-#define __NVHOST_HOST1X_HOST1X_HARDWARE_H
+#ifndef __NVHOST_HOST1X01_HARDWARE_H
+#define __NVHOST_HOST1X01_HARDWARE_H
 
 #include <linux/types.h>
 #include <linux/bitops.h>
-#include "hw_host1x_channel.h"
-#include "hw_host1x_sync.h"
-#include "hw_host1x_uclass.h"
+#include "hw_host1x01_channel.h"
+#include "hw_host1x01_sync.h"
+#include "hw_host1x01_uclass.h"
 
 /* class ids */
 enum {
index 8017c71..2e7ff57 100644 (file)
@@ -26,8 +26,6 @@
 #include "chip_support.h"
 #include "nvhost_memmgr.h"
 
-#include "host1x_hardware.h"
-#include "host1x_syncpt.h"
 #include "host1x_cdma.h"
 #include "host1x_hwctx.h"
 
@@ -371,7 +369,7 @@ static void cdma_stop(struct nvhost_cdma *cdma)
  * Stops both channel's command processor and CDMA immediately.
  * Also, tears down the channel and resets corresponding module.
  */
-void cdma_timeout_teardown_begin(struct nvhost_cdma *cdma)
+static void cdma_timeout_teardown_begin(struct nvhost_cdma *cdma)
 {
        struct nvhost_master *dev = cdma_to_dev(cdma);
        struct nvhost_channel *ch = cdma_to_channel(cdma);
@@ -403,7 +401,7 @@ void cdma_timeout_teardown_begin(struct nvhost_cdma *cdma)
        cdma->torndown = true;
 }
 
-void cdma_timeout_teardown_end(struct nvhost_cdma *cdma, u32 getptr)
+static void cdma_timeout_teardown_end(struct nvhost_cdma *cdma, u32 getptr)
 {
        struct nvhost_master *dev = cdma_to_dev(cdma);
        struct nvhost_channel *ch = cdma_to_channel(cdma);
@@ -492,25 +490,25 @@ static void cdma_timeout_handler(struct work_struct *work)
        mutex_unlock(&cdma->lock);
 }
 
-int host1x_init_cdma_support(struct nvhost_chip_support *op)
-{
-       op->cdma.start = cdma_start;
-       op->cdma.stop = cdma_stop;
-       op->cdma.kick = cdma_kick;
-
-       op->cdma.timeout_init = cdma_timeout_init;
-       op->cdma.timeout_destroy = cdma_timeout_destroy;
-       op->cdma.timeout_teardown_begin = cdma_timeout_teardown_begin;
-       op->cdma.timeout_teardown_end = cdma_timeout_teardown_end;
-       op->cdma.timeout_cpu_incr = cdma_timeout_cpu_incr;
-
-       op->push_buffer.reset = push_buffer_reset;
-       op->push_buffer.init = push_buffer_init;
-       op->push_buffer.destroy = push_buffer_destroy;
-       op->push_buffer.push_to = push_buffer_push_to;
-       op->push_buffer.pop_from = push_buffer_pop_from;
-       op->push_buffer.space = push_buffer_space;
-       op->push_buffer.putptr = push_buffer_putptr;
+static const struct nvhost_cdma_ops host1x_cdma_ops = {
+       .start = cdma_start,
+       .stop = cdma_stop,
+       .kick = cdma_kick,
+
+       .timeout_init = cdma_timeout_init,
+       .timeout_destroy = cdma_timeout_destroy,
+       .timeout_teardown_begin = cdma_timeout_teardown_begin,
+       .timeout_teardown_end = cdma_timeout_teardown_end,
+       .timeout_cpu_incr = cdma_timeout_cpu_incr,
+};
+
+static const struct nvhost_pushbuffer_ops host1x_pushbuffer_ops = {
+       .reset = push_buffer_reset,
+       .init = push_buffer_init,
+       .destroy = push_buffer_destroy,
+       .push_to = push_buffer_push_to,
+       .pop_from = push_buffer_pop_from,
+       .space = push_buffer_space,
+       .putptr = push_buffer_putptr,
+};
 
-       return 0;
-}
index 9c533d6..94bfc09 100644 (file)
@@ -1,7 +1,7 @@
 /*
  * drivers/video/tegra/host/host1x/host1x_cdma.h
  *
- * Tegra Graphics Host Channel
+ * Tegra Graphics Host Command DMA
  *
  * Copyright (c) 2011-2012, NVIDIA Corporation.
  *
@@ -36,7 +36,4 @@
  * and replaces the original timed out contexts GATHER slots */
 #define SYNCPT_INCR_BUFFER_SIZE_WORDS   (4096 / sizeof(u32))
 
-struct nvhost_chip_support;
-int host1x_init_cdma_support(struct nvhost_chip_support *);
-
 #endif
index 09f022b..98af575 100644 (file)
 #include <trace/events/nvhost.h>
 #include <linux/slab.h>
 
-#include "host1x_syncpt.h"
-#include "host1x_channel.h"
-#include "host1x_hardware.h"
 #include "host1x_hwctx.h"
 #include "nvhost_intr.h"
 
 #define NV_FIFO_READ_TIMEOUT 200000
 
+static int host1x_drain_read_fifo(struct nvhost_channel *ch,
+       u32 *ptr, unsigned int count, unsigned int *pending);
+
 static void sync_waitbases(struct nvhost_channel *ch, u32 syncpt_val)
 {
        unsigned long waitbase;
@@ -151,7 +151,7 @@ static void submit_ctxrestore(struct nvhost_job *job)
        trace_nvhost_channel_context_restore(ch->dev->name, &ctx->hwctx);
 }
 
-void submit_nullkickoff(struct nvhost_job *job, int user_syncpt_incrs)
+static void submit_nullkickoff(struct nvhost_job *job, int user_syncpt_incrs)
 {
        struct nvhost_channel *ch = job->ch;
        int incr;
@@ -180,7 +180,7 @@ void submit_nullkickoff(struct nvhost_job *job, int user_syncpt_incrs)
        }
 }
 
-void submit_gathers(struct nvhost_job *job)
+static void submit_gathers(struct nvhost_job *job)
 {
        /* push user gathers */
        int i;
@@ -195,7 +195,7 @@ void submit_gathers(struct nvhost_job *job)
        }
 }
 
-int host1x_channel_submit(struct nvhost_job *job)
+static int host1x_channel_submit(struct nvhost_job *job)
 {
        struct nvhost_channel *ch = job->ch;
        struct nvhost_syncpt *sp = &nvhost_get_host(job->ch->dev)->syncpt;
@@ -298,7 +298,7 @@ error:
        return err;
 }
 
-int host1x_channel_read_3d_reg(
+static int host1x_channel_read_3d_reg(
        struct nvhost_channel *channel,
        struct nvhost_hwctx *hwctx,
        u32 offset,
@@ -485,7 +485,7 @@ done:
 }
 
 
-int host1x_drain_read_fifo(struct nvhost_channel *ch,
+static int host1x_drain_read_fifo(struct nvhost_channel *ch,
        u32 *ptr, unsigned int count, unsigned int *pending)
 {
        unsigned int entries = *pending;
@@ -528,7 +528,7 @@ int host1x_drain_read_fifo(struct nvhost_channel *ch,
        return 0;
 }
 
-int host1x_save_context(struct nvhost_channel *ch)
+static int host1x_save_context(struct nvhost_channel *ch)
 {
        struct nvhost_device *dev = ch->dev;
        struct nvhost_hwctx *hwctx_to_save;
@@ -622,3 +622,48 @@ done:
        kfree(wakeup_waiter);
        return err;
 }
+
+static inline void __iomem *host1x_channel_aperture(void __iomem *p, int ndx)
+{
+       p += ndx * NV_HOST1X_CHANNEL_MAP_SIZE_BYTES;
+       return p;
+}
+
+static inline int host1x_hwctx_handler_init(struct nvhost_channel *ch)
+{
+       int err = 0;
+       unsigned long syncpts = ch->dev->syncpts;
+       unsigned long waitbases = ch->dev->waitbases;
+       u32 syncpt = find_first_bit(&syncpts, BITS_PER_LONG);
+       u32 waitbase = find_first_bit(&waitbases, BITS_PER_LONG);
+       struct nvhost_driver *drv = to_nvhost_driver(ch->dev->dev.driver);
+
+       if (drv->alloc_hwctx_handler) {
+               ch->ctxhandler = drv->alloc_hwctx_handler(syncpt,
+                               waitbase, ch);
+               if (!ch->ctxhandler)
+                       err = -ENOMEM;
+       }
+
+       return err;
+}
+
+static int host1x_channel_init(struct nvhost_channel *ch,
+       struct nvhost_master *dev, int index)
+{
+       ch->chid = index;
+       mutex_init(&ch->reflock);
+       mutex_init(&ch->submitlock);
+
+       ch->aperture = host1x_channel_aperture(dev->aperture, index);
+
+       return host1x_hwctx_handler_init(ch);
+}
+
+static const struct nvhost_channel_ops host1x_channel_ops = {
+       .init = host1x_channel_init,
+       .submit = host1x_channel_submit,
+       .read3dreg = host1x_channel_read_3d_reg,
+       .save_context = host1x_save_context,
+       .drain_read_fifo = host1x_drain_read_fifo,
+};
diff --git a/drivers/video/tegra/host/host1x/host1x_channel.h b/drivers/video/tegra/host/host1x/host1x_channel.h
deleted file mode 100644 (file)
index 98a67c7..0000000
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * drivers/video/tegra/host/host1x/host1x_channel.h
- *
- * Tegra Graphics Host Channel
- *
- * Copyright (c) 2011-2012, NVIDIA Corporation.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef __NVHOST_HOST1X_CHANNEL_H
-#define __NVHOST_HOST1X_CHANNEL_H
-
-struct nvhost_job;
-struct nvhost_channel;
-struct nvhost_hwctx;
-struct nvhost_device;
-
-/*  Submit job to a host1x client */
-int host1x_channel_submit(struct nvhost_job *job);
-
-/*  Read 3d register via FIFO */
-int host1x_channel_read_3d_reg(
-       struct nvhost_channel *channel,
-       struct nvhost_hwctx *hwctx,
-       u32 offset,
-       u32 *value);
-
-/* Reads words from FIFO */
-int host1x_drain_read_fifo(struct nvhost_channel *ch,
-               u32 *ptr, unsigned int count, unsigned int *pending);
-
-int host1x_save_context(struct nvhost_channel *ch);
-
-#endif
index ff70acd..1c4ed68 100644 (file)
 
 #include "dev.h"
 #include "debug.h"
-#include "host1x_hardware.h"
 #include "nvhost_cdma.h"
 #include "nvhost_channel.h"
-#include "host1x_cdma.h"
 #include "nvhost_job.h"
 #include "chip_support.h"
 #include "nvhost_memmgr.h"
@@ -229,7 +227,7 @@ static void show_channel_gather(struct output *o, u32 addr,
 #endif
 }
 
-void show_channel_gathers(struct output *o, struct nvhost_cdma *cdma)
+static void show_channel_gathers(struct output *o, struct nvhost_cdma *cdma)
 {
        struct nvhost_job *job;
 
@@ -324,7 +322,7 @@ static void t20_debug_show_channel_cdma(struct nvhost_master *m,
        nvhost_debug_output(o, "\n");
 }
 
-void t20_debug_show_channel_fifo(struct nvhost_master *m,
+static void t20_debug_show_channel_fifo(struct nvhost_master *m,
        struct nvhost_channel *ch, struct output *o, int chid)
 {
        u32 val, rd_ptr, wr_ptr, start, end;
@@ -400,11 +398,8 @@ static void t20_debug_show_mlocks(struct nvhost_master *m, struct output *o)
        nvhost_debug_output(o, "\n");
 }
 
-int nvhost_init_t20_debug_support(struct nvhost_chip_support *op)
-{
-       op->debug.show_channel_cdma = t20_debug_show_channel_cdma;
-       op->debug.show_channel_fifo = t20_debug_show_channel_fifo;
-       op->debug.show_mlocks = t20_debug_show_mlocks;
-
-       return 0;
-}
+static const struct nvhost_debug_ops host1x_debug_ops = {
+       .show_channel_cdma = t20_debug_show_channel_cdma,
+       .show_channel_fifo = t20_debug_show_channel_fifo,
+       .show_mlocks = t20_debug_show_mlocks,
+};
index 6ec6dd3..62fd07c 100644 (file)
@@ -26,8 +26,6 @@
 
 #include "nvhost_intr.h"
 #include "dev.h"
-#include "host1x_hardware.h"
-#include "chip_support.h"
 
 /* Spacing between sync registers */
 #define REGISTER_STRIDE 4
@@ -158,7 +156,7 @@ static void t20_intr_disable_all_syncpt_intrs(struct nvhost_intr *intr)
  * Sync point threshold interrupt service function
  * Handles sync point threshold triggers, in interrupt context
  */
-irqreturn_t t20_intr_syncpt_thresh_isr(int irq, void *dev_id)
+static irqreturn_t t20_intr_syncpt_thresh_isr(int irq, void *dev_id)
 {
        struct nvhost_intr_syncpt *syncpt = dev_id;
        unsigned int id = syncpt->id;
@@ -273,16 +271,13 @@ static int t20_request_syncpt_irq(struct nvhost_intr_syncpt *syncpt)
        return 0;
 }
 
-int nvhost_init_t20_intr_support(struct nvhost_chip_support *op)
-{
-       op->intr.init_host_sync = t20_intr_init_host_sync;
-       op->intr.set_host_clocks_per_usec = t20_intr_set_host_clocks_per_usec;
-       op->intr.set_syncpt_threshold = t20_intr_set_syncpt_threshold;
-       op->intr.enable_syncpt_intr = t20_intr_enable_syncpt_intr;
-       op->intr.disable_all_syncpt_intrs = t20_intr_disable_all_syncpt_intrs;
-       op->intr.request_host_general_irq = t20_intr_request_host_general_irq;
-       op->intr.free_host_general_irq = t20_intr_free_host_general_irq;
-       op->intr.request_syncpt_irq = t20_request_syncpt_irq;
-
-       return 0;
-}
+static const struct nvhost_intr_ops host1x_intr_ops = {
+       .init_host_sync = t20_intr_init_host_sync,
+       .set_host_clocks_per_usec = t20_intr_set_host_clocks_per_usec,
+       .set_syncpt_threshold = t20_intr_set_syncpt_threshold,
+       .enable_syncpt_intr = t20_intr_enable_syncpt_intr,
+       .disable_all_syncpt_intrs = t20_intr_disable_all_syncpt_intrs,
+       .request_host_general_irq = t20_intr_request_host_general_irq,
+       .free_host_general_irq = t20_intr_free_host_general_irq,
+       .request_syncpt_irq = t20_request_syncpt_irq,
+};
index c53733c..8cca9db 100644 (file)
@@ -24,8 +24,6 @@
 #include "nvhost_syncpt.h"
 #include "nvhost_acm.h"
 #include "host1x.h"
-#include "host1x_syncpt.h"
-#include "host1x_hardware.h"
 #include "chip_support.h"
 
 /**
@@ -168,21 +166,15 @@ static void syncpt_mutex_unlock(struct nvhost_syncpt *sp,
        writel(0, sync_regs + (host1x_sync_mlock_0_r() + idx * 4));
 }
 
-int host1x_init_syncpt_support(struct nvhost_master *host,
-       struct nvhost_chip_support *op)
-{
-       host->sync_aperture = host->aperture + HOST1X_CHANNEL_SYNC_REG_BASE;
-
-       op->syncpt.reset = t20_syncpt_reset;
-       op->syncpt.reset_wait_base = t20_syncpt_reset_wait_base;
-       op->syncpt.read_wait_base = t20_syncpt_read_wait_base;
-       op->syncpt.update_min = t20_syncpt_update_min;
-       op->syncpt.cpu_incr = t20_syncpt_cpu_incr;
-       op->syncpt.patch_wait = host1x_syncpt_patch_wait;
-       op->syncpt.debug = t20_syncpt_debug;
-       op->syncpt.name = t20_syncpt_name;
-       op->syncpt.mutex_try_lock = syncpt_mutex_try_lock;
-       op->syncpt.mutex_unlock = syncpt_mutex_unlock;
-
-       return 0;
-}
+static const struct nvhost_syncpt_ops host1x_syncpt_ops = {
+       .reset = t20_syncpt_reset,
+       .reset_wait_base = t20_syncpt_reset_wait_base,
+       .read_wait_base = t20_syncpt_read_wait_base,
+       .update_min = t20_syncpt_update_min,
+       .cpu_incr = t20_syncpt_cpu_incr,
+       .patch_wait = host1x_syncpt_patch_wait,
+       .debug = t20_syncpt_debug,
+       .name = t20_syncpt_name,
+       .mutex_try_lock = syncpt_mutex_try_lock,
+       .mutex_unlock = syncpt_mutex_unlock,
+};
index f624a75..8440ef1 100644 (file)
 #define NVWAITBASE_3D   (3)
 #define NVWAITBASE_MPE  (4)
 
-struct nvhost_master;
-struct nvhost_chip_support;
-
-int host1x_init_syncpt(struct nvhost_master *host);
-int host1x_init_syncpt_support(struct nvhost_master *host,
-       struct nvhost_chip_support *op);
-
 #endif
index 7b76393..e47c102 100644 (file)
@@ -21,9 +21,7 @@
 #include "nvhost_hwctx.h"
 #include "nvhost_channel.h"
 #include "dev.h"
-#include "host1x/host1x_hardware.h"
-#include "host1x/host1x_channel.h"
-#include "host1x/host1x_syncpt.h"
+#include "host1x/host1x01_hardware.h"
 #include "host1x/host1x_hwctx.h"
 #include "t20/t20.h"
 #include "chip_support.h"
index 1f8f143..00c1e28 100644 (file)
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#include <linux/slab.h>
 #include <linux/nvhost_ioctl.h>
 #include <mach/powergate.h>
 #include <mach/iomap.h>
 #include "t20.h"
-#include "host1x/host1x_syncpt.h"
-#include "host1x/host1x_hardware.h"
-#include "gr3d/gr3d.h"
 #include "gr3d/gr3d_t20.h"
 #include "mpe/mpe.h"
 #include "host1x/host1x.h"
-#include "nvhost_hwctx.h"
 #include "nvhost_channel.h"
-#include "host1x/host1x_channel.h"
-#include "host1x/host1x_cdma.h"
-#include "chip_support.h"
-#include "nvmap.h"
 #include "nvhost_memmgr.h"
+#include "host1x/host1x01_hardware.h"
+#include "host1x/host1x_syncpt.h"
+#include "chip_support.h"
 
 #define NVMODMUTEX_2D_FULL     (1)
 #define NVMODMUTEX_2D_SIMPLE   (2)
@@ -251,55 +245,6 @@ int tegra2_register_host1x_devices(void)
        return nvhost_add_devices(t20_devices, ARRAY_SIZE(t20_devices));
 }
 
-static inline void __iomem *t20_channel_aperture(void __iomem *p, int ndx)
-{
-       p += ndx * NV_HOST1X_CHANNEL_MAP_SIZE_BYTES;
-       return p;
-}
-
-static inline int t20_nvhost_hwctx_handler_init(struct nvhost_channel *ch)
-{
-       int err = 0;
-       unsigned long syncpts = ch->dev->syncpts;
-       unsigned long waitbases = ch->dev->waitbases;
-       u32 syncpt = find_first_bit(&syncpts, BITS_PER_LONG);
-       u32 waitbase = find_first_bit(&waitbases, BITS_PER_LONG);
-       struct nvhost_driver *drv = to_nvhost_driver(ch->dev->dev.driver);
-
-       if (drv->alloc_hwctx_handler) {
-               ch->ctxhandler = drv->alloc_hwctx_handler(syncpt,
-                               waitbase, ch);
-               if (!ch->ctxhandler)
-                       err = -ENOMEM;
-       }
-
-       return err;
-}
-
-static int t20_channel_init(struct nvhost_channel *ch,
-       struct nvhost_master *dev, int index)
-{
-       ch->chid = index;
-       mutex_init(&ch->reflock);
-       mutex_init(&ch->submitlock);
-
-       ch->aperture = t20_channel_aperture(dev->aperture, index);
-
-       return t20_nvhost_hwctx_handler_init(ch);
-}
-
-int nvhost_init_t20_channel_support(struct nvhost_master *host,
-       struct nvhost_chip_support *op)
-{
-       op->channel.init = t20_channel_init;
-       op->channel.submit = host1x_channel_submit;
-       op->channel.read3dreg = host1x_channel_read_3d_reg;
-       op->channel.save_context = host1x_save_context;
-       op->channel.drain_read_fifo = host1x_drain_read_fifo;
-
-       return 0;
-}
-
 static void t20_free_nvhost_channel(struct nvhost_channel *ch)
 {
        nvhost_free_channel_internal(ch, &t20_num_alloc_channels);
@@ -313,28 +258,27 @@ static struct nvhost_channel *t20_alloc_nvhost_channel(
                &t20_num_alloc_channels);
 }
 
+#include "host1x/host1x_channel.c"
+#include "host1x/host1x_cdma.c"
+#include "host1x/host1x_debug.c"
+#include "host1x/host1x_syncpt.c"
+#include "host1x/host1x_intr.c"
+
 int nvhost_init_t20_support(struct nvhost_master *host,
        struct nvhost_chip_support *op)
 {
        int err;
 
-       /* don't worry about cleaning up on failure... "remove" does it. */
-       err = nvhost_init_t20_channel_support(host, op);
-       if (err)
-               return err;
-       err = host1x_init_cdma_support(op);
-       if (err)
-               return err;
-       err = nvhost_init_t20_debug_support(op);
-       if (err)
-               return err;
-       err = host1x_init_syncpt_support(host, op);
-       if (err)
-               return err;
-       err = nvhost_init_t20_intr_support(op);
+       op->channel = host1x_channel_ops;
+       op->cdma = host1x_cdma_ops;
+       op->push_buffer = host1x_pushbuffer_ops;
+       op->debug = host1x_debug_ops;
+       host->sync_aperture = host->aperture + HOST1X_CHANNEL_SYNC_REG_BASE;
+       op->syncpt = host1x_syncpt_ops;
+       op->intr = host1x_intr_ops;
+       err = nvhost_memmgr_init(op);
        if (err)
                return err;
-       err = nvhost_memmgr_init(op);
 
        op->nvhost_dev.alloc_nvhost_channel = t20_alloc_nvhost_channel;
        op->nvhost_dev.free_nvhost_channel = t20_free_nvhost_channel;
index 456d3ae..729f9d8 100644 (file)
 #define _NVHOST_T20_H_
 
 struct nvhost_master;
-struct nvhost_module;
 struct nvhost_chip_support;
 
-int nvhost_init_t20_channel_support(struct nvhost_master *,
-       struct nvhost_chip_support *);
-int nvhost_init_t20_debug_support(struct nvhost_chip_support *);
-int nvhost_init_t20_syncpt_support(struct nvhost_master *);
-int nvhost_init_t20_intr_support(struct nvhost_chip_support *);
 int nvhost_init_t20_support(struct nvhost_master *,
        struct nvhost_chip_support *);
-int nvhost_t20_save_context(struct nvhost_module *mod, u32 syncpt_id);
 
 #endif /* _NVHOST_T20_H_ */
index b74c561..88a4892 100644 (file)
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#include <linux/mutex.h>
 #include <linux/nvhost_ioctl.h>
 #include <mach/powergate.h>
 #include <mach/iomap.h>
 #include "t20/t20.h"
 #include "t30.h"
-#include "gr3d/gr3d.h"
 #include "gr3d/gr3d_t30.h"
 #include "gr3d/scale3d.h"
 #include "mpe/mpe.h"
 #include "host1x/host1x.h"
-#include "host1x/host1x_hardware.h"
-#include "host1x/host1x_syncpt.h"
+#include "host1x/host1x01_hardware.h"
 #include "chip_support.h"
 #include "nvhost_channel.h"
-#include "host1x/host1x_cdma.h"
-#include "nvmap.h"
 #include "nvhost_memmgr.h"
+#include "host1x/host1x_syncpt.h"
 
 #define NVMODMUTEX_2D_FULL     (1)
 #define NVMODMUTEX_2D_SIMPLE   (2)
@@ -259,60 +255,6 @@ int tegra3_register_host1x_devices(void)
        return nvhost_add_devices(t30_devices, ARRAY_SIZE(t30_devices));
 }
 
-static inline int t30_nvhost_hwctx_handler_init(struct nvhost_channel *ch)
-{
-       int err = 0;
-       unsigned long syncpts = ch->dev->syncpts;
-       unsigned long waitbases = ch->dev->waitbases;
-       u32 syncpt = find_first_bit(&syncpts, BITS_PER_LONG);
-       u32 waitbase = find_first_bit(&waitbases, BITS_PER_LONG);
-       struct nvhost_driver *drv = to_nvhost_driver(ch->dev->dev.driver);
-
-       if (drv->alloc_hwctx_handler) {
-               ch->ctxhandler = drv->alloc_hwctx_handler(syncpt,
-                               waitbase, ch);
-               if (!ch->ctxhandler)
-                       err = -ENOMEM;
-       }
-
-       return err;
-}
-
-static inline void __iomem *t30_channel_aperture(void __iomem *p, int ndx)
-{
-       p += ndx * NV_HOST1X_CHANNEL_MAP_SIZE_BYTES;
-       return p;
-}
-
-static int t30_channel_init(struct nvhost_channel *ch,
-                           struct nvhost_master *dev, int index)
-{
-       ch->chid = index;
-       mutex_init(&ch->reflock);
-       mutex_init(&ch->submitlock);
-
-       ch->aperture = t30_channel_aperture(dev->aperture, index);
-
-       return t30_nvhost_hwctx_handler_init(ch);
-}
-
-int nvhost_init_t30_channel_support(struct nvhost_master *host,
-       struct nvhost_chip_support *op)
-{
-       int result = nvhost_init_t20_channel_support(host, op);
-       op->channel.init = t30_channel_init;
-
-       return result;
-}
-
-int nvhost_init_t30_debug_support(struct nvhost_chip_support *op)
-{
-       nvhost_init_t20_debug_support(op);
-       op->debug.debug_init = nvhost_scale3d_debug_init;
-
-       return 0;
-}
-
 static void t30_free_nvhost_channel(struct nvhost_channel *ch)
 {
        nvhost_free_channel_internal(ch, &t30_num_alloc_channels);
@@ -326,27 +268,25 @@ static struct nvhost_channel *t30_alloc_nvhost_channel(
                &t30_num_alloc_channels);
 }
 
+#include "host1x/host1x_channel.c"
+#include "host1x/host1x_cdma.c"
+#include "host1x/host1x_debug.c"
+#include "host1x/host1x_syncpt.c"
+#include "host1x/host1x_intr.c"
+
 int nvhost_init_t30_support(struct nvhost_master *host,
        struct nvhost_chip_support *op)
 {
        int err;
 
-       /* don't worry about cleaning up on failure... "remove" does it. */
-       err = nvhost_init_t30_channel_support(host, op);
-       if (err)
-               return err;
-       err = host1x_init_cdma_support(op);
-       if (err)
-               return err;
-       err = nvhost_init_t30_debug_support(op);
-       if (err)
-               return err;
-       err = host1x_init_syncpt_support(host, op);
-       if (err)
-               return err;
-       err = nvhost_init_t20_intr_support(op);
-       if (err)
-               return err;
+       op->channel = host1x_channel_ops;
+       op->cdma = host1x_cdma_ops;
+       op->push_buffer = host1x_pushbuffer_ops;
+       op->debug = host1x_debug_ops;
+       op->debug.debug_init = nvhost_scale3d_debug_init;
+       host->sync_aperture = host->aperture + HOST1X_CHANNEL_SYNC_REG_BASE;
+       op->syncpt = host1x_syncpt_ops;
+       op->intr = host1x_intr_ops;
        err = nvhost_memmgr_init(op);
        if (err)
                return err;
index e4db97b..80838a5 100644 (file)
@@ -23,9 +23,6 @@
 struct nvhost_master;
 struct nvhost_chip_support;
 
-int nvhost_init_t30_channel_support(struct nvhost_master *,
-       struct nvhost_chip_support *);
-int nvhost_init_t30_debug_support(struct nvhost_chip_support *);
 int nvhost_init_t30_support(struct nvhost_master *host,
        struct nvhost_chip_support *);