ARM: tegra11: dvfs: Add CPU rail DFLL mode trip-point
Alex Frid [Thu, 6 Dec 2012 07:41:19 +0000 (23:41 -0800)]
Added CPU rail DFLL mode trip-point necessary to limit minimum CPU
voltage at cold temperature. The respective cooling device is not
implemented, yet.

Bug 1177204

Change-Id: I6abe1bc3ace81935c25968385af1998052455da0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168999
(cherry picked from commit d4f6d935f8e616852cfe83cc19cadf137169b239)
Reviewed-on: http://git-master/r/171628
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

arch/arm/mach-tegra/board-dalmore-sensors.c
arch/arm/mach-tegra/board-pluto-sensors.c
arch/arm/mach-tegra/board-roth-sensors.c
arch/arm/mach-tegra/dvfs.c
arch/arm/mach-tegra/dvfs.h
arch/arm/mach-tegra/tegra11_dvfs.c

index 7e37cd4..151ec94 100644 (file)
@@ -54,6 +54,7 @@
 #include "cpu-tegra.h"
 #include "devices.h"
 #include "tegra-board-id.h"
+#include "dvfs.h"
 
 static struct nvc_gpio_pdata imx091_gpio_pdata[] = {
        {IMX091_GPIO_RESET, CAM_RSTN, true, false},
@@ -603,6 +604,7 @@ static int dalmore_nct1008_init(void)
                }
 #endif
                nct1008_add_cdev_trips(data, tegra_core_edp_get_cdev());
+               nct1008_add_cdev_trips(data, tegra_dvfs_get_cpu_dfll_cdev());
 
                dalmore_i2c4_nct1008_board_info[0].irq = gpio_to_irq(nct1008_port);
                pr_info("%s: dalmore nct1008 irq %d", __func__, dalmore_i2c4_nct1008_board_info[0].irq);
index e566d55..c23e49a 100644 (file)
@@ -44,6 +44,7 @@
 #include "cpu-tegra.h"
 #include "devices.h"
 #include "tegra-board-id.h"
+#include "dvfs.h"
 
 #define NTC_10K_TGAIN   0xE6A2
 #define NTC_10K_TOFF    0x2694
@@ -793,6 +794,7 @@ static int pluto_nct1008_init(void)
                }
 #endif
                nct1008_add_cdev_trips(data, tegra_core_edp_get_cdev());
+               nct1008_add_cdev_trips(data, tegra_dvfs_get_cpu_dfll_cdev());
 
                pluto_i2c4_nct1008_board_info[0].irq =
                                gpio_to_irq(nct1008_port);
index e05b8f9..3de5451 100644 (file)
@@ -47,6 +47,7 @@
 #include "cpu-tegra.h"
 #include "devices.h"
 #include "tegra-board-id.h"
+#include "dvfs.h"
 
 static struct board_info board_info;
 
@@ -245,6 +246,7 @@ static int roth_nct1008_init(void)
 #endif
 
        nct1008_add_cdev_trips(data, tegra_core_edp_get_cdev());
+       nct1008_add_cdev_trips(data, tegra_dvfs_get_cpu_dfll_cdev());
 
        roth_i2c4_nct1008_board_info[0].irq = gpio_to_irq(nct1008_port);
        pr_info("%s: roth nct1008 irq %d", __func__, \
index 03c546d..0f03e38 100644 (file)
@@ -809,6 +809,13 @@ int tegra_dvfs_dfll_mode_clear(struct dvfs *d, unsigned long rate)
        return ret;
 }
 
+struct tegra_cooling_device *tegra_dvfs_get_cpu_dfll_cdev(void)
+{
+       if (tegra_cpu_rail)
+               return tegra_cpu_rail->dfll_mode_cdev;
+       return NULL;
+}
+
 /*
  * Iterate through all the dvfs regulators, finding the regulator exported
  * by the regulator api for each one.  Must be called in late init, after
index a6241d7..4171034 100644 (file)
@@ -22,6 +22,7 @@
 #define _TEGRA_DVFS_H_
 
 #include <linux/of.h>
+#include <mach/thermal.h>
 
 #define MAX_DVFS_FREQS 40
 #define MAX_DVFS_TABLES        80
@@ -61,6 +62,8 @@ struct dvfs_rail {
        int max_millivolts;
        int reg_max_millivolts;
        int nominal_millivolts;
+       int min_millivolts_cold;
+
        int step;
        bool jmp_to_zero;
        bool disabled;
@@ -77,6 +80,8 @@ struct dvfs_rail {
        int offs_millivolts;
        bool suspended;
        bool dfll_mode;
+       struct tegra_cooling_device *pll_mode_cdev;
+       struct tegra_cooling_device *dfll_mode_cdev;
        struct rail_stats stats;
 };
 
@@ -194,6 +199,7 @@ int tegra_cpu_dvfs_alter(int edp_thermal_index, const cpumask_t *cpus,
                         bool before_clk_update, int cpu_event);
 int tegra_dvfs_dfll_mode_set(struct dvfs *d, unsigned long rate);
 int tegra_dvfs_dfll_mode_clear(struct dvfs *d, unsigned long rate);
+struct tegra_cooling_device *tegra_dvfs_get_cpu_dfll_cdev(void);
 
 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
 int tegra_dvfs_rail_disable_prepare(struct dvfs_rail *rail);
index 574574b..61ee46f 100644 (file)
@@ -37,12 +37,22 @@ static bool tegra_dvfs_core_disabled;
 /* FIXME: need tegra11 step */
 #define VDD_SAFE_STEP                  100
 
+static int dvfs_temperatures[] = { 20, };
+
+static struct tegra_cooling_device cpu_dfll_cdev = {
+       .cdev_type = "cpu_dfll",
+       .trip_temperatures = dvfs_temperatures,
+       .trip_temperatures_num = ARRAY_SIZE(dvfs_temperatures),
+};
+
 static struct dvfs_rail tegra11_dvfs_rail_vdd_cpu = {
        .reg_id = "vdd_cpu",
        .max_millivolts = 1400,
        .min_millivolts = 800,
        .step = VDD_SAFE_STEP,
        .jmp_to_zero = true,
+       .min_millivolts_cold = 1000,
+       .dfll_mode_cdev = &cpu_dfll_cdev,
 };
 
 static struct dvfs_rail tegra11_dvfs_rail_vdd_core = {