Asoc: tegra: Update ALSA driver
Vijay Mali [Sat, 21 Jul 2012 11:48:49 +0000 (16:48 +0530)]
Machine driver change for new platforms.
Fixed clocks in I2S driver for validation on FPGA.
List ALSA driver in kconfig.

Change-Id: If8dcefe2502b28eaa9fe9fbbb7af59bd2ab401a0
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/117528
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

sound/soc/tegra/Kconfig
sound/soc/tegra/tegra30_i2s.c
sound/soc/tegra/tegra_wm8903.c

index ab989d8..452bc6c 100644 (file)
@@ -19,16 +19,16 @@ config SND_SOC_TEGRA20_I2S
 
 config SND_SOC_TEGRA30_AHUB
        tristate "Tegra 30 Audio Hub driver"
-       depends on SND_SOC_TEGRA && ARCH_TEGRA_3x_SOC
+       depends on SND_SOC_TEGRA && !ARCH_TEGRA_2x_SOC
 
 config SND_SOC_TEGRA30_DAM
        tristate "Tegra 30 Audio Dam driver"
-       depends on SND_SOC_TEGRA && ARCH_TEGRA_3x_SOC
+       depends on SND_SOC_TEGRA && !ARCH_TEGRA_2x_SOC
        select SND_SOC_TEGRA30_AHUB
 
 config SND_SOC_TEGRA30_I2S
        tristate "Tegra 30 I2S driver"
-       depends on SND_SOC_TEGRA && ARCH_TEGRA_3x_SOC
+       depends on SND_SOC_TEGRA && !ARCH_TEGRA_2x_SOC
        select SND_SOC_TEGRA30_AHUB
        help
          Say Y or M if you want to add support for codecs attached to the
@@ -62,15 +62,15 @@ config MACH_HAS_SND_SOC_TEGRA_WM8903
 
 config SND_SOC_TEGRA_WM8903
        tristate "SoC Audio support for Tegra boards using a WM8903 codec"
-       depends on SND_SOC_TEGRA && I2C && TEGRA_DC
+       depends on SND_SOC_TEGRA && I2C
        depends on MACH_HAS_SND_SOC_TEGRA_WM8903
        select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC
-       select SND_SOC_TEGRA30_I2S if ARCH_TEGRA_3x_SOC
+       select SND_SOC_TEGRA30_I2S if !ARCH_TEGRA_2x_SOC
        select SND_SOC_TEGRA20_SPDIF if ARCH_TEGRA_2x_SOC
        select SND_SOC_TEGRA30_SPDIF if ARCH_TEGRA_3x_SOC
        select SND_SOC_WM8903
        select SND_SOC_SPDIF
-       select SND_SOC_TEGRA30_DAM if ARCH_TEGRA_3x_SOC
+       select SND_SOC_TEGRA30_DAM if !ARCH_TEGRA_2x_SOC
        help
          Say Y or M here if you want to add support for SoC audio on Tegra
          boards using the WM8093 codec. Currently, the supported boards are
index ac66c0b..573fbe7 100644 (file)
@@ -508,7 +508,6 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
                (i2s->dsp_config.slot_width > 2))
                return tegra30_i2s_tdm_hw_params(substream, params, dai);
 
-
        srate = params_rate(params);
 
        if (i2s->reg_ctrl & TEGRA30_I2S_CTRL_MASTER_ENABLE) {
@@ -517,6 +516,18 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
                /* Additional "* 4" is needed for FSYNC mode */
                if (i2s->reg_ctrl & TEGRA30_I2S_CTRL_FRAME_FORMAT_FSYNC)
                        i2sclock *= 4;
+
+#if defined(CONFIG_ARCH_TEGRA_11x_SOC)
+               if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+                       i2sclock = 13000000;
+                       __raw_writel(((0x3 << 30) | (0x1 << 28) | 0x0),
+                               IO_ADDRESS(TEGRA_CLK_RESET_BASE)+0x1d8);
+               } else {
+                       i2sclock = 13000000/2;
+                       __raw_writel(((0x3 << 30) | (0x1 << 28) | 0x1),
+                               IO_ADDRESS(TEGRA_CLK_RESET_BASE)+0x1d8);
+               }
+#else
                ret = clk_set_parent(i2s->clk_i2s, i2s->clk_pll_a_out0);
                if (ret) {
                        dev_err(dev, "Can't set parent of I2S clock\n");
@@ -528,7 +539,7 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
                        dev_err(dev, "Can't set I2S clock rate: %d\n", ret);
                        return ret;
                }
-
+#endif
                if (i2s->reg_ctrl & TEGRA30_I2S_CTRL_FRAME_FORMAT_FSYNC) {
                        bitcnt = (i2sclock / srate) - 1;
                        sym_bitclk = !(i2sclock % srate);
index 64a1515..14f9810 100644 (file)
@@ -130,7 +130,6 @@ static int tegra_wm8903_hw_params(struct snd_pcm_substream *substream,
                     SND_SOC_DAIFMT_CBM_CFM;
 #endif
 
-
        err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
        if (err < 0) {
                if (!(machine->util_data.set_mclk % mclk))
@@ -784,9 +783,13 @@ static struct snd_soc_card snd_soc_tegra_wm8903 = {
        .name = "tegra-wm8903",
        .owner = THIS_MODULE,
        .dai_link = tegra_wm8903_dai,
+
+#if defined(CONFIG_ARCH_TEGRA_11x_SOC)
+       .num_links = 1,
+#else
        .num_links = ARRAY_SIZE(tegra_wm8903_dai),
+#endif
 
-       .fully_routed = true,
        .suspend_post = tegra_wm8903_suspend_post,
        .resume_pre = tegra_wm8903_resume_pre,
        //.set_bias_level = tegra30_soc_set_bias_level,
@@ -844,6 +847,11 @@ static __devinit int tegra_wm8903_driver_probe(struct platform_device *pdev)
                tegra_wm8903_dai[2].cpu_dai_name = "tegra30-i2s.3";
        }
 
+       if (machine_is_curacao() || machine_is_dolak()) {
+               tegra_wm8903_dai[0].codec_name = "wm8903.0-001a";
+               tegra_wm8903_dai[0].cpu_dai_name = "tegra30-i2s.0";
+       }
+
 #ifdef CONFIG_SWITCH
        /* Addd h2w swith class support */
        ret = switch_dev_register(&tegra_wm8903_headset_switch);