ath9k_hw: Initialize 2GHz CTL properly.
Senthil Balasubramanian [Wed, 10 Nov 2010 13:03:08 +0000 (05:03 -0800)]
The last 2GHz CTL was not being initialized, so power was being
set to 0 instead of 30dbm. Initialize to 30 like other CTLs.

Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

drivers/net/wireless/ath/ath9k/ar9003_eeprom.c

index bc3f49c..b33fb5b 100644 (file)
@@ -306,6 +306,7 @@ static const struct ar9300_eeprom ar9300_default = {
 
                 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
                 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
+                { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
         },
        .modalHeader5G = {
                /* 4 idle,t1,t2,b (4 bits per setting) */