DTV: dma: fixed dma burst size issue DTV xmit
Adam Jiang [Fri, 13 Jan 2012 16:16:02 +0000 (01:16 +0900)]
Since dtv interface was designed based on SPI bus, it shares the same
dma configuration with SPI bus. However, it is not proper because DTV
interface has to transmit data in 4 words long constantly. The patch
added an option in tegra_dma_req to set burst size to be fixed 4 words.

fixed Bug 910227

Change-Id: I1436f0c8d108dd39edc57ae4c9cb750d9574b62c
Reviewed-on: http://git-master/r/75509
Reviewed-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Adam Jiang <chaoj@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/76461
Reviewed-by: Automatic_Commit_Validation_User

arch/arm/mach-tegra/dma.c
arch/arm/mach-tegra/include/mach/dma.h
drivers/media/video/tegra/tegra_dtv.c

index 8776e9b..b2744b1 100644 (file)
@@ -570,10 +570,16 @@ static void tegra_dma_update_hw(struct tegra_dma_channel *ch,
        case TEGRA_DMA_REQ_SEL_APBIF_CH3:
 #endif
        case TEGRA_DMA_REQ_SEL_SPI:
+               /* dtv interface has fixed burst size of 4 */
+               if (req->fixed_burst_size) {
+                       ahb_seq |= AHB_SEQ_BURST_4;
+                       break;
+               }
                /* For spi/slink the burst size based on transfer size
-                * i.e. if multiple of 32 bytes then busrt is
-                * 8 word else if multiple of 16 bytes then burst is
-                * 4 word else burst size is 1 word */
+                * i.e. if multiple of 32 bytes then busrt is 8
+                * word(8x32bits) else if multiple of 16 bytes then
+                * burst is 4 word(4x32bits) else burst size is 1
+                * word(1x32bits) */
                if (req->size & 0xF)
                        ahb_seq |= AHB_SEQ_BURST_1;
                else if ((req->size >> 4) & 0x1)
@@ -581,7 +587,6 @@ static void tegra_dma_update_hw(struct tegra_dma_channel *ch,
                else
                        ahb_seq |= AHB_SEQ_BURST_8;
                break;
-
 #if defined(CONFIG_ARCH_TEGRA_2x_SOC)
        case TEGRA_DMA_REQ_SEL_I2S_2:
        case TEGRA_DMA_REQ_SEL_I2S_1:
index 4921387..57770ec 100644 (file)
@@ -135,6 +135,8 @@ struct tegra_dma_req {
        unsigned long req_sel;
        unsigned int size;
 
+       int fixed_burst_size; /* only for dtv */
+
        /* Updated by the DMA driver on the conpletion of the request. */
        int bytes_transferred;
        int status;
index 9001e56..9d5100c 100644 (file)
@@ -761,6 +761,7 @@ static void setup_dma_rx_request(struct tegra_dma_req *req,
        req->source_addr = dtv_ctx->phys + DTV_RX_FIFO;
        req->source_wrap = 4;
        req->source_bus_width = 32;
+       req->fixed_burst_size = 1;
 
        req->dest_wrap = 0;
        req->dest_bus_width = 32;