drm/radeon/kms: add info query for backend map
Alex Deucher [Fri, 15 Jul 2011 19:53:52 +0000 (19:53 +0000)]
The 3D driver need to get the pipe to backend
map to certain things.  Add a query to get the
info.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drivers/gpu/drm/radeon/evergreen.c
drivers/gpu/drm/radeon/ni.c
drivers/gpu/drm/radeon/r600.c
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_drv.c
drivers/gpu/drm/radeon/radeon_kms.c
drivers/gpu/drm/radeon/rv770.c
include/drm/radeon_drm.h

index 660f964..55d04ee 100644 (file)
@@ -2047,6 +2047,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
        rdev->config.evergreen.tile_config |=
                ((gb_addr_config & 0x30000000) >> 28) << 12;
 
+       rdev->config.evergreen.backend_map = gb_backend_map;
        WREG32(GB_BACKEND_MAP, gb_backend_map);
        WREG32(GB_ADDR_CONFIG, gb_addr_config);
        WREG32(DMIF_ADDR_CONFIG, gb_addr_config);
index 559dbd4..44c4750 100644 (file)
@@ -833,6 +833,7 @@ static void cayman_gpu_init(struct radeon_device *rdev)
        rdev->config.cayman.tile_config |=
                ((gb_addr_config & ROW_SIZE_MASK) >> ROW_SIZE_SHIFT) << 12;
 
+       rdev->config.cayman.backend_map = gb_backend_map;
        WREG32(GB_BACKEND_MAP, gb_backend_map);
        WREG32(GB_ADDR_CONFIG, gb_addr_config);
        WREG32(DMIF_ADDR_CONFIG, gb_addr_config);
index bc54b26..9fefce7 100644 (file)
@@ -1662,6 +1662,7 @@ void r600_gpu_init(struct radeon_device *rdev)
                                                                               R6XX_MAX_BACKENDS_MASK) >> 16)),
                                                        (cc_rb_backend_disable >> 16));
        rdev->config.r600.tile_config = tiling_config;
+       rdev->config.r600.backend_map = backend_map;
        tiling_config |= BACKEND_MAP(backend_map);
        WREG32(GB_TILING_CONFIG, tiling_config);
        WREG32(DCP_TILING_CONFIG, tiling_config & 0xffff);
index ef0e0e0..ec534f5 100644 (file)
@@ -1003,6 +1003,7 @@ struct r600_asic {
        unsigned                tiling_npipes;
        unsigned                tiling_group_size;
        unsigned                tile_config;
+       unsigned                backend_map;
        struct r100_gpu_lockup  lockup;
 };
 
@@ -1028,6 +1029,7 @@ struct rv770_asic {
        unsigned                tiling_npipes;
        unsigned                tiling_group_size;
        unsigned                tile_config;
+       unsigned                backend_map;
        struct r100_gpu_lockup  lockup;
 };
 
@@ -1054,6 +1056,7 @@ struct evergreen_asic {
        unsigned tiling_npipes;
        unsigned tiling_group_size;
        unsigned tile_config;
+       unsigned backend_map;
        struct r100_gpu_lockup  lockup;
 };
 
index cbb4584..85f033f 100644 (file)
  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
  *   2.10.0 - fusion 2D tiling, initial compute support for the CS checker
+ *   2.11.0 - backend map
  */
 #define KMS_DRIVER_MAJOR       2
-#define KMS_DRIVER_MINOR       10
+#define KMS_DRIVER_MINOR       11
 #define KMS_DRIVER_PATCHLEVEL  0
 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
 int radeon_driver_unload_kms(struct drm_device *dev);
index 6f80a21..be2c122 100644 (file)
@@ -237,6 +237,19 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
        case RADEON_INFO_FUSION_GART_WORKING:
                value = 1;
                break;
+       case RADEON_INFO_BACKEND_MAP:
+               if (rdev->family >= CHIP_CAYMAN)
+                       value = rdev->config.cayman.backend_map;
+               else if (rdev->family >= CHIP_CEDAR)
+                       value = rdev->config.evergreen.backend_map;
+               else if (rdev->family >= CHIP_RV770)
+                       value = rdev->config.rv770.backend_map;
+               else if (rdev->family >= CHIP_R600)
+                       value = rdev->config.r600.backend_map;
+               else {
+                       return -EINVAL;
+               }
+               break;
        default:
                DRM_DEBUG_KMS("Invalid request %d\n", info->request);
                return -EINVAL;
index 4de5189..4720d00 100644 (file)
@@ -778,6 +778,7 @@ static void rv770_gpu_init(struct radeon_device *rdev)
                                                                (cc_rb_backend_disable >> 16));
 
        rdev->config.rv770.tile_config = gb_tiling_config;
+       rdev->config.rv770.backend_map = backend_map;
        gb_tiling_config |= BACKEND_MAP(backend_map);
 
        WREG32(GB_TILING_CONFIG, gb_tiling_config);
index 787f7b6..b65be60 100644 (file)
@@ -911,6 +911,7 @@ struct drm_radeon_cs {
 #define RADEON_INFO_NUM_BACKENDS       0x0a /* DB/backends for r600+ - need for OQ */
 #define RADEON_INFO_NUM_TILE_PIPES     0x0b /* tile pipes for r600+ */
 #define RADEON_INFO_FUSION_GART_WORKING        0x0c /* fusion writes to GTT were broken before this */
+#define RADEON_INFO_BACKEND_MAP                0x0d /* pipe to backend map, needed by mesa */
 
 struct drm_radeon_info {
        uint32_t                request;