ARM: tegra11: clock: Re-init PLLM when resume from LP0
Renn Wu [Mon, 20 May 2013 06:26:55 +0000 (14:26 +0800)]
PLLM is kept the same as on entry to LP0, need S/W re-init when resume.

Bug 1288643

Change-Id: I211fd758b1fb38c11a3ef901dfd79a698bcc8cfb
Signed-off-by: Renn Wu <rewu@nvidia.com>
Reviewed-on: http://git-master/r/231287
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>

arch/arm/mach-tegra/tegra11_clocks.c

index 6dd8644..5a33571 100644 (file)
@@ -7868,7 +7868,7 @@ static void tegra11_clk_resume(void)
                        p = p->parent;
        }
        tegra_emc_timing_invalidate();
-
+       tegra11_pllm_clk_init(&tegra_pll_m); /* Re-init pll_m */
        tegra11_pll_clk_init(&tegra_pll_u); /* Re-init utmi parameters */
        tegra11_plle_clk_resume(&tegra_pll_e); /* Restore plle parent as pll_re_vco */
        tegra11_pllp_clk_resume(&tegra_pll_p); /* Fire a bug if not restored */