E1853 BRINGUP Linux Snor: Micron Support
Bob Johnston [Thu, 16 Aug 2012 14:52:14 +0000 (10:52 -0400)]
Expanding NOR functionality to work with ADMUX and Burst mode for Micron
Support in E1853.

Bug 989919
Bug 966833
- Adding fields for picking MUX vs NONMUX and picking Async, Paging,
Burst mode for reads
- Added run time decision between them
- 1853 specific settings for Async NOR
- 1852 specific settings for NOR
- 1853 NOR timings changed

Reviewed-on: http://git-master/r/122286
(cherry picked from commit a242e7194c7de559d22fe5b275a8782086f10e50)
Change-Id: I79de1d52d4c7199c83b380c2fa6d8cae6b35f09d
Signed-off-by: Bob Johnston <BJohnston@nvidia.com>
Reviewed-on: http://git-master/r/124946
Tested-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

arch/arm/mach-tegra/board-e1853.c
arch/arm/mach-tegra/board-p1852.c
drivers/mtd/maps/tegra_nor.c
include/linux/platform_data/tegra_nor.h

index cec5667..3b6d2bf 100644 (file)
@@ -355,6 +355,35 @@ static void e1853_usb_init(void)
        platform_device_register(&tegra_ehci3_device);
 }
 
+static struct tegra_nor_platform_data e1853_nor_data = {
+       .flash = {
+               .map_name = "cfi_probe",
+               .width = 2,
+       },
+       .chip_parms = {
+               .MuxMode = NorMuxMode_ADMux,
+               .BurstLength = NorBurstLength_CntBurst,
+               .ReadMode = NorReadMode_Async,
+               .ReadyActive = NorReadyActive_BeforeData,
+               /* FIXME: Need to use characterized value */
+               .timing_default = {
+                       .timing0 = 0xA0A05585,
+                       .timing1 = 0x200A0406,
+               },
+               .timing_read = {
+                       .timing0 = 0xA0A05585,
+                       .timing1 = 0x00050406,
+               },
+       },
+};
+
+static void e1853_nor_init(void)
+{
+       tegra_nor_device.resource[2].end = TEGRA_NOR_FLASH_BASE + SZ_64M - 1;
+       tegra_nor_device.dev.platform_data = &e1853_nor_data;
+       platform_device_register(&tegra_nor_device);
+}
+
 static void __init tegra_e1853_init(void)
 {
        tegra_init_board_info();
@@ -368,6 +397,7 @@ static void __init tegra_e1853_init(void)
        e1853_spi_init();
        platform_add_devices(e1853_devices, ARRAY_SIZE(e1853_devices));
        e1853_panel_init();
+       e1853_nor_init();
        e1853_pcie_init();
 }
 
index aefc217..4ff3eaf 100644 (file)
@@ -1,6 +1,4 @@
 /*
- * arch/arm/mach-tegra/board-p1852.c
- *
  * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
@@ -15,6 +13,8 @@
  * You should have received a copy of the GNU General Public License
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  *
+ * arch/arm/mach-tegra/board-p1852.c
+ *
  */
 
 #include <linux/kernel.h>
@@ -606,6 +606,10 @@ static struct tegra_nor_platform_data p1852_nor_data = {
                .width = 2,
        },
        .chip_parms = {
+               .MuxMode = NorMuxMode_ADNonMux,
+               .ReadMode = NorReadMode_Page,
+               .PageLength = NorPageLength_8Word,
+               .ReadyActive = NorReadyActive_WithData,
                /* FIXME: Need to use characterized value */
                .timing_default = {
                        .timing0 = 0x30300263,
index 5e66daf..41adb1e 100644 (file)
@@ -1,9 +1,5 @@
 /*
- * drivers/mtd/maps/tegra_nor.c
- *
- * MTD mapping driver for the internal SNOR controller in Tegra SoCs
- *
- * Copyright (C) 2009 - 2012 NVIDIA Corporation
+ * Copyright (C) 2009-2012, NVIDIA Corporation.  All rights reserved.
  *
  * Author:
  *     Raghavendra VK <rvk@nvidia.com>
  * You should have received a copy of the GNU General Public License along
  * with this program; if not, write to the Free Software Foundation, Inc.,
  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * drivers/mtd/maps/tegra_nor.c
+ *
+ * MTD mapping driver for the internal SNOR controller in Tegra SoCs
+ *
  */
 
 #include <linux/platform_device.h>
@@ -160,6 +161,7 @@ static void tegra_flash_dma(struct map_info *map,
        u32 copy_to = (u32)to;
        struct tegra_nor_info *c =
            container_of(map, struct tegra_nor_info, map);
+       struct tegra_nor_chip_parms *chip_parm = &c->plat->chip_parms;
        unsigned int bytes_remaining = len;
 
        snor_config = c->init_config;
@@ -174,9 +176,52 @@ static void tegra_flash_dma(struct map_info *map,
                 * controller register only after all parameters are set.
                 */
                /* SNOR CONFIGURATION SETUP */
-               snor_config |= TEGRA_SNOR_CONFIG_DEVICE_MODE(1);
-               /* 8 word page */
-               snor_config |= TEGRA_SNOR_CONFIG_PAGE_SZ(2);
+               switch(chip_parm->ReadMode)
+               {
+                       case NorReadMode_Async:
+                               snor_config |= TEGRA_SNOR_CONFIG_DEVICE_MODE(0);
+                               break;
+
+                       case NorReadMode_Page:
+                               switch(chip_parm->PageLength)
+                               {
+                                       case NorPageLength_Unsupported :
+                                               snor_config |= TEGRA_SNOR_CONFIG_DEVICE_MODE(0);
+                                               break;
+
+                                       case NorPageLength_4Word :
+                                               snor_config |= TEGRA_SNOR_CONFIG_DEVICE_MODE(1);
+                                               snor_config |= TEGRA_SNOR_CONFIG_PAGE_SZ(1);
+                                               break;
+
+                                       case NorPageLength_8Word :
+                                               snor_config |= TEGRA_SNOR_CONFIG_DEVICE_MODE(1);
+                                               snor_config |= TEGRA_SNOR_CONFIG_PAGE_SZ(2);
+                                               break;
+                               }
+                               break;
+
+                       case NorReadMode_Burst:
+                               snor_config |= TEGRA_SNOR_CONFIG_DEVICE_MODE(2);
+                               switch(chip_parm->BurstLength)
+                               {
+                                       case NorBurstLength_CntBurst :
+                                               snor_config |= TEGRA_SNOR_CONFIG_BURST_LEN(0);
+                                               break;
+                                       case NorBurstLength_8Word :
+                                               snor_config |= TEGRA_SNOR_CONFIG_BURST_LEN(1);
+                                               break;
+
+                                       case NorBurstLength_16Word :
+                                               snor_config |= TEGRA_SNOR_CONFIG_BURST_LEN(2);
+                                               break;
+
+                                       case NorBurstLength_32Word :
+                                               snor_config |= TEGRA_SNOR_CONFIG_BURST_LEN(3);
+                                               break;
+                               }
+                               break;
+               }
                snor_config |= TEGRA_SNOR_CONFIG_MST_ENB;
                /* SNOR DMA CONFIGURATION SETUP */
                /* NOR -> AHB */
@@ -273,8 +318,28 @@ static int tegra_snor_controller_init(struct tegra_nor_info *info)
        default:
                return -EINVAL;
        }
-       config |= TEGRA_SNOR_CONFIG_BURST_LEN(0);
-       config &= ~TEGRA_SNOR_CONFIG_MUX_MODE;
+       switch (chip_parm->MuxMode)
+       {
+               case NorMuxMode_ADNonMux:
+                       config &= ~TEGRA_SNOR_CONFIG_MUX_MODE;
+                       break;
+               case NorMuxMode_ADMux:
+                       config |= TEGRA_SNOR_CONFIG_MUX_MODE;
+                       break;
+               default:
+                       return -EINVAL;
+       }
+       switch (chip_parm->ReadyActive)
+       {
+               case NorReadyActive_WithData:
+                       config &= ~TEGRA_SNOR_CONFIG_RDY_ACTIVE;
+                       break;
+               case NorReadyActive_BeforeData:
+                       config |= TEGRA_SNOR_CONFIG_RDY_ACTIVE;
+                       break;
+               default:
+                       return -EINVAL;
+       }
        snor_tegra_writel(info, config, TEGRA_SNOR_CONFIG_REG);
        info->init_config = config;
 
index cd8faff..4bd980d 100644 (file)
@@ -1,10 +1,5 @@
 /*
- * include/linux/platform_data/tegra_nor.h
- *
- * Copyright (C) 2010 - 2011 NVIDIA Corporation.
- *
- * Author:
- *     Raghavendra V K <rvk@nvidia.com>
+ * Copyright (C) 2010-2012, NVIDIA Corporation. All rights reserved.
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  *
+ * include/linux/platform_data/tegra_nor.h
+ *
+ * Author:
+ *     Raghavendra V K <rvk@nvidia.com>
+ *
  */
 
 #ifndef __MACH_TEGRA_NOR_PDATA_H
 
 #include <asm/mach/flash.h>
 
+typedef enum {
+       NorMuxMode_ADNonMux,
+       NorMuxMode_ADMux,
+}NorMuxMode;
+
+typedef enum {
+       NorPageLength_Unsupported,
+       NorPageLength_4Word,
+       NorPageLength_8Word,
+}NorPageLength;
+
+typedef enum {
+       NorBurstLength_CntBurst,
+       NorBurstLength_8Word,
+       NorBurstLength_16Word,
+       NorBurstLength_32Word,
+}NorBurstLength;
+
+typedef enum {
+       NorReadMode_Async,
+       NorReadMode_Page,
+       NorReadMode_Burst,
+}NorReadMode;
+
+typedef enum {
+       NorReadyActive_WithData,
+       NorReadyActive_BeforeData,
+}NorReadyActive;
+
 struct tegra_nor_chip_parms {
        struct {
                uint32_t timing0;
                uint32_t timing1;
        } timing_default, timing_read;
+       NorMuxMode MuxMode;
+       NorReadMode ReadMode;
+       NorPageLength PageLength;
+       NorBurstLength BurstLength;
+       NorReadyActive ReadyActive;
 };
 
 struct tegra_nor_platform_data {