ASoC: Tegra: Softreset RXCIF when it is disabled
Lei Fan [Wed, 25 Dec 2013 06:03:01 +0000 (14:03 +0800)]
Sometime the rxcif of AHUB will have some residual bits, because the
rxcif is in incorrect state, it may cause that capture app cannot
get any data form DAP.The issue can be solved by resetting the rxcif
when it is disabled.

Bug 1389711
Bug 1429860

Change-Id: I10aa37de6ea0c78d85ce30e6b5538e06ff77d5b5
Signed-off-by: Lei Fan <leif@nvidia.com>
Reviewed-on: http://git-master/r/351105
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vijay Mali <vmali@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Danny Song <dsong@nvidia.com>

sound/soc/tegra/tegra30_ahub.c

index 519ee7e..3ee49dc 100644 (file)
@@ -2,8 +2,8 @@
  * tegra30_ahub.c - Tegra 30 AHUB driver
  *
  * Author: Stephen Warren <swarren@nvidia.com>
- * Copyright (C) 2011 - NVIDIA, Inc.
- * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (C) 2011 -2013, NVIDIA, Inc.
+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -30,6 +30,7 @@
 #include <linux/slab.h>
 #include <linux/io.h>
 #include <mach/dma.h>
+#include <linux/delay.h>
 #include <mach/iomap.h>
 #include <sound/soc.h>
 #include "tegra30_ahub.h"
@@ -464,6 +465,12 @@ int tegra30_ahub_disable_rx_fifo(enum tegra30_ahub_rxcif rxcif)
        int channel = rxcif - TEGRA30_AHUB_RXCIF_APBIF_RX0;
        int reg, val;
 
+       reg = TEGRA30_AHUB_CHANNEL_CLEAR  +
+             (channel * TEGRA30_AHUB_CHANNEL_CLEAR_STRIDE);
+       val = tegra30_apbif_read(reg);
+       val |= TEGRA30_AHUB_CHANNEL_CLEAR_RX_SOFT_RESET;
+       tegra30_apbif_write(reg, val);
+       udelay(100);
        reg = TEGRA30_AHUB_CHANNEL_CTRL +
              (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
        val = tegra30_apbif_read(reg);