nvhost: Enable 3D powergating
Terje Bergstrom [Tue, 14 Jun 2011 08:04:56 +0000 (11:04 +0300)]
Enables 3D power gating on chips that support it.

Bug 793861

Original-Change-Id: Iadc40b65ac4897550d3b0d2076cc7efe98c95dfa
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/37821
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Tested-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R048361474a54026c221124bbae479c2424ca903d

arch/arm/mach-tegra/fuse.h

index 8ccb085..4c6b74b 100644 (file)
@@ -28,8 +28,6 @@ int tegra_sku_id(void);
 void tegra_init_fuse(void);
 u32 tegra_fuse_readl(unsigned long offset);
 void tegra_fuse_writel(u32 value, unsigned long offset);
-enum tegra_chipid tegra_get_chipid(void);
-enum tegra_revision tegra_get_revision(void);
 const char *tegra_get_revision_name(void);
 
 #ifdef CONFIG_TEGRA_SILICON_PLATFORM