video: tegra: dc: Add rated refresh rate for one-shot mode.
Kevin Huang [Tue, 13 Mar 2012 22:01:00 +0000 (15:01 -0700)]
We add this variable for two purposes. First, it would remind developer
to make sure actual refresh rate is larger than rated refresh rate.
Second, gralloc would read rated refresh rate for one-shot mode since
actual refresh rates of most devices are expected running at rated
refresh rate.

Bug 946370
Bug 934977

Change-Id: Ib4121337df1a388b40440b22687c39f373f08890
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/89871
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

arch/arm/mach-tegra/include/mach/dc.h
drivers/video/tegra/dc/dsi.c
drivers/video/tegra/fb.c

index 3734bc7..a5f7210 100644 (file)
@@ -132,6 +132,7 @@ struct tegra_dsi_out {
        u8              n_data_lanes;                   /* required */
        u8              pixel_format;                   /* required */
        u8              refresh_rate;                   /* required */
+       u8              rated_refresh_rate;
        u8              panel_reset;                    /* required */
        u8              virtual_channel;                /* required */
        u8              dsi_instance;
@@ -197,6 +198,7 @@ struct tegra_stereo_out {
 
 struct tegra_dc_mode {
        int     pclk;
+       int     rated_pclk;
        int     h_ref_to_sync;
        int     v_ref_to_sync;
        int     h_sync_width;
index 8b64ea6..ba9bb37 100644 (file)
@@ -459,6 +459,13 @@ static void tegra_dsi_init_sw(struct tegra_dc *dc,
 
        /* Calculate minimum required pixel rate. */
        pixel_clk_hz = h_width_pixels * v_width_lines * dsi->info.refresh_rate;
+       if (dc->out->flags & TEGRA_DC_OUT_ONE_SHOT_MODE) {
+               if (dsi->info.rated_refresh_rate >= dsi->info.refresh_rate)
+                       dev_info(&dc->ndev->dev, "DSI: measured refresh rate "
+                               "should be larger than rated refresh rate.\n");
+               dc->mode.rated_pclk = h_width_pixels * v_width_lines *
+                                               dsi->info.rated_refresh_rate;
+       }
 
        /* Calculate minimum byte rate on DSI interface. */
        byte_clk_hz = (pixel_clk_hz * dsi->pixel_scaler_mul) /
index 350cede..a3654d7 100644 (file)
@@ -589,7 +589,10 @@ struct tegra_fb_info *tegra_fb_register(struct nvhost_device *ndev,
        if (dc->mode.pclk > 1000) {
                struct tegra_dc_mode *mode = &dc->mode;
 
-               info->var.pixclock = KHZ2PICOS(mode->pclk / 1000);
+               if (dc->out->flags & TEGRA_DC_OUT_ONE_SHOT_MODE)
+                       info->var.pixclock = KHZ2PICOS(mode->rated_pclk / 1000);
+               else
+                       info->var.pixclock = KHZ2PICOS(mode->pclk / 1000);
                info->var.left_margin = mode->h_back_porch;
                info->var.right_margin = mode->h_front_porch;
                info->var.upper_margin = mode->v_back_porch;