arm : tegra: clocks: Add PERIPH_ON_APB flag for apbif clock
Sumit Bhattacharya [Sun, 18 Mar 2012 08:57:21 +0000 (13:57 +0530)]
Bug 953357

Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/90845
(cherry picked from commit 24b715551882d387b82a89e0213012863e46bb95)

Change-Id: Ia8632fccab0708dacd9ef4b9360f8ef499b47818
Reviewed-on: http://git-master/r/92280
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

arch/arm/mach-tegra/tegra3_clocks.c

index 43d8ed9..0b2d4f4 100644 (file)
@@ -4199,7 +4199,7 @@ struct clk tegra_list_clks[] = {
        PERIPH_CLK("kfuse",     "kfuse-tegra",          NULL,   40,     0,      26000000,  mux_clk_m,                   0),
        PERIPH_CLK("fuse",      "fuse-tegra",           "fuse", 39,     0,      26000000,  mux_clk_m,                   PERIPH_ON_APB),
        PERIPH_CLK("fuse_burn", "fuse-tegra",           "fuse_burn",    39,     0,      26000000,  mux_clk_m,           PERIPH_ON_APB),
-       PERIPH_CLK("apbif",     "tegra30-ahub",         "apbif", 107,   0,      26000000,  mux_clk_m,                   0),
+       PERIPH_CLK("apbif",     "tegra30-ahub",         "apbif", 107,   0,      26000000,  mux_clk_m,                   PERIPH_ON_APB),
        PERIPH_CLK("i2s0",      "tegra30-i2s.0",        "i2s",  30,     0x1d8,  26000000,  mux_pllaout0_audio0_2x_pllp_clkm,    MUX | DIV_U71 | PERIPH_ON_APB),
        PERIPH_CLK("i2s1",      "tegra30-i2s.1",        "i2s",  11,     0x100,  26000000,  mux_pllaout0_audio1_2x_pllp_clkm,    MUX | DIV_U71 | PERIPH_ON_APB),
        PERIPH_CLK("i2s2",      "tegra30-i2s.2",        "i2s",  18,     0x104,  26000000,  mux_pllaout0_audio2_2x_pllp_clkm,    MUX | DIV_U71 | PERIPH_ON_APB),
@@ -4208,7 +4208,7 @@ struct clk tegra_list_clks[] = {
        PERIPH_CLK("spdif_out", "tegra30-spdif",        "spdif_out",    10,     0x108,  26000000, mux_pllaout0_audio_2x_pllp_clkm,      MUX | DIV_U71 | PERIPH_ON_APB),
        PERIPH_CLK("spdif_in",  "tegra30-spdif",        "spdif_in",     10,     0x10c,  100000000, mux_pllp_pllc_pllm,          MUX | DIV_U71 | PERIPH_ON_APB),
        PERIPH_CLK("pwm",       "pwm",                  NULL,   17,     0x110,  408000000, mux_pllp_pllc_clk32_clkm,    MUX | MUX_PWM | DIV_U71 | PERIPH_ON_APB),
-       PERIPH_CLK("d_audio",   "tegra30-ahub",         "d_audio", 106, 0x3d0,  48000000,  mux_plla_pllc_pllp_clkm,     MUX | DIV_U71),
+       PERIPH_CLK("d_audio",   "tegra30-ahub",         "d_audio", 106, 0x3d0,  48000000,  mux_plla_pllc_pllp_clkm,     MUX | DIV_U71 | PERIPH_ON_APB),
        PERIPH_CLK("dam0",      "tegra30-dam.0",        NULL,   108,    0x3d8,  48000000,  mux_plla_pllc_pllp_clkm,     MUX | DIV_U71),
        PERIPH_CLK("dam1",      "tegra30-dam.1",        NULL,   109,    0x3dc,  48000000,  mux_plla_pllc_pllp_clkm,     MUX | DIV_U71),
        PERIPH_CLK("dam2",      "tegra30-dam.2",        NULL,   110,    0x3e0,  48000000,  mux_plla_pllc_pllp_clkm,     MUX | DIV_U71),