usb: gadget: enable the clocks during resume
Suresh Mangipudi [Thu, 4 Aug 2011 12:33:20 +0000 (17:33 +0530)]
Need to enable the clock before checking the vbus status during resume

Bug 858490

Original-Change-Id: Id2ce4894c377b2ce878eed16b822877c3f28ae85
Reviewed-on: http://git-master/r/44996
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Tested-by: Bala Murali Krishna <balam@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>

Rebase-Id: Re3853a8dc628ad7349b721b6070df396797a01ac

drivers/usb/gadget/fsl_tegra_udc.c
drivers/usb/gadget/fsl_udc_core.c
drivers/usb/gadget/fsl_usb2_udc.h

index c691a1b..01375d3 100644 (file)
@@ -138,3 +138,13 @@ void fsl_udc_clk_resume(bool is_dpd)
        clk_enable(udc_clk);
        tegra_usb_phy_power_on(phy,  is_dpd);
 }
+
+void fsl_udc_clk_enable()
+{
+       clk_enable(udc_clk);
+}
+
+void fsl_udc_clk_disable()
+{
+       clk_disable(udc_clk);
+}
index 44a253e..8830c91 100644 (file)
@@ -3140,27 +3140,26 @@ static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state)
 static int fsl_udc_resume(struct platform_device *pdev)
 {
        if (udc_controller->transceiver) {
-
+               fsl_udc_clk_enable();
                if (!(fsl_readl(&usb_sys_regs->vbus_wakeup) & USB_SYS_ID_PIN_STATUS)) {
                        /* If ID status is low means host is connected, return */
+                       fsl_udc_clk_disable();
                        return 0;
                }
                /* check for VBUS */
                if (!(fsl_readl(&usb_sys_regs->vbus_wakeup) & USB_SYS_VBUS_STATUS)) {
                        /* if there is no VBUS then power down the clocks and return */
+                       fsl_udc_clk_disable();
                        return 0;
                } else {
+                       fsl_udc_clk_disable();
                        if (udc_controller->transceiver->state == OTG_STATE_A_HOST)
                                return 0;
-                       fsl_udc_clk_resume(true);
                        /* Detected VBUS set the transceiver state to device mode */
                        udc_controller->transceiver->state = OTG_STATE_B_PERIPHERAL;
                }
-       } else {
-               /* enable the clocks to the controller */
-               fsl_udc_clk_resume(true);
        }
-
+       fsl_udc_clk_resume(true);
 #if defined(CONFIG_ARCH_TEGRA)
        fsl_udc_restart(udc_controller);
 #else
index a605e11..b74c8cf 100644 (file)
@@ -719,6 +719,8 @@ void fsl_udc_clk_finalize(struct platform_device *pdev);
 void fsl_udc_clk_release(void);
 void fsl_udc_clk_suspend(bool is_dpd);
 void fsl_udc_clk_resume(bool is_dpd);
+void fsl_udc_clk_enable(void);
+void fsl_udc_clk_disable(void);
 #else
 static inline int fsl_udc_clk_init(struct platform_device *pdev)
 {
@@ -736,6 +738,12 @@ static inline void fsl_udc_clk_suspend(bool is_dpd)
 static inline void fsl_udc_clk_resume(bool is_dpd)
 {
 }
+void fsl_udc_clk_enable(void)
+{
+}
+void fsl_udc_clk_disable(void)
+{
+}
 #endif
 
 #endif