ARM: tegra: Disable PL310 double line fill feature
Scott Williams [Thu, 4 Aug 2011 04:56:02 +0000 (21:56 -0700)]
Bug 854424

Original-Change-Id: I53a86b023920978cee0e6804985dd35d1f286de5
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/44930
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

Rebase-Id: R0c3899291fd85be56c6e93c02d072fd9cd6dd116

arch/arm/mach-tegra/common.c

index f864e99..6a0e178 100644 (file)
@@ -198,9 +198,6 @@ void tegra_init_cache(void)
        writel(0x770, p + L2X0_TAG_LATENCY_CTRL);
        writel(0x770, p + L2X0_DATA_LATENCY_CTRL);
 #endif
-
-       /* Enable PL310 double line fill feature. */
-       writel(((1<<30) | 0), p + L2X0_PREFETCH_CTRL);
 #endif
        aux_ctrl = readl(p + L2X0_CACHE_TYPE);
        aux_ctrl = (aux_ctrl & 0x700) << (17-8);