Merge tag 'to-linus' of git://github.com/rustyrussell/linux
Linus Torvalds [Thu, 12 Jan 2012 20:37:27 +0000 (12:37 -0800)]
* tag 'to-linus' of git://github.com/rustyrussell/linux: (24 commits)
  lguest: Make sure interrupt is allocated ok by lguest_setup_irq
  lguest: move the lguest tool to the tools directory
  lguest: switch segment-voodoo-numbers to readable symbols
  virtio: balloon: Add freeze, restore handlers to support S4
  virtio: balloon: Move vq initialization into separate function
  virtio: net: Add freeze, restore handlers to support S4
  virtio: net: Move vq and vq buf removal into separate function
  virtio: net: Move vq initialization into separate function
  virtio: blk: Add freeze, restore handlers to support S4
  virtio: blk: Move vq initialization to separate function
  virtio: console: Disable callbacks for virtqueues at start of S4 freeze
  virtio: console: Add freeze and restore handlers to support S4
  virtio: console: Move vq and vq buf removal into separate functions
  virtio: pci: add PM notification handlers for restore, freeze, thaw, poweroff
  virtio: pci: switch to new PM API
  virtio_blk: fix config handler race
  virtio: add debugging if driver doesn't kick.
  virtio: expose added descriptors immediately.
  virtio: avoid modulus operation.
  virtio: support unlocked queue kick
  ...

921 files changed:
Documentation/DocBook/writing-an-alsa-driver.tmpl
Documentation/devicetree/bindings/power_supply/olpc_battery.txt [new file with mode: 0644]
Documentation/devicetree/bindings/power_supply/sbs_sbs-battery.txt [new file with mode: 0644]
Documentation/devicetree/bindings/sound/tegra-audio-wm8903.txt [new file with mode: 0644]
Documentation/devicetree/bindings/sound/tegra20-das.txt [new file with mode: 0644]
Documentation/devicetree/bindings/sound/tegra20-i2s.txt [new file with mode: 0644]
Documentation/devicetree/bindings/sound/wm8903.txt [new file with mode: 0644]
Documentation/devicetree/bindings/sound/wm8994.txt [new file with mode: 0644]
Documentation/devicetree/bindings/vendor-prefixes.txt
Documentation/digsig.txt [new file with mode: 0644]
Documentation/feature-removal-schedule.txt
Documentation/kernel-parameters.txt
Documentation/power/charger-manager.txt [new file with mode: 0644]
Documentation/security/00-INDEX
Documentation/security/LSM.txt [new file with mode: 0644]
Documentation/security/credentials.txt
Documentation/sound/alsa/HD-Audio-Models.txt
Documentation/sound/alsa/compress_offload.txt [new file with mode: 0644]
Documentation/sysctl/kernel.txt
Documentation/vm/slub.txt
MAINTAINERS
arch/alpha/kernel/pci.c
arch/arm/common/it8152.c
arch/arm/common/via82c505.c
arch/arm/configs/bonito_defconfig [new file with mode: 0644]
arch/arm/configs/kota2_defconfig [new file with mode: 0644]
arch/arm/configs/marzen_defconfig [new file with mode: 0644]
arch/arm/include/asm/mach/pci.h
arch/arm/include/asm/pci.h
arch/arm/kernel/bios32.c
arch/arm/mach-cns3xxx/pcie.c
arch/arm/mach-dove/pcie.c
arch/arm/mach-exynos/include/mach/cpufreq.h [new file with mode: 0644]
arch/arm/mach-footbridge/dc21285.c
arch/arm/mach-integrator/pci_v3.c
arch/arm/mach-iop13xx/pci.c
arch/arm/mach-ixp2000/enp2611.c
arch/arm/mach-ixp2000/pci.c
arch/arm/mach-ixp23xx/pci.c
arch/arm/mach-ixp4xx/common-pci.c
arch/arm/mach-kirkwood/pcie.c
arch/arm/mach-ks8695/pci.c
arch/arm/mach-mv78xx0/pcie.c
arch/arm/mach-omap2/board-rx51-peripherals.c
arch/arm/mach-omap2/mcbsp.c
arch/arm/mach-orion5x/pci.c
arch/arm/mach-pxa/corgi.c
arch/arm/mach-pxa/eseries.c
arch/arm/mach-pxa/poodle.c
arch/arm/mach-pxa/stargate2.c
arch/arm/mach-pxa/tosa.c
arch/arm/mach-s3c64xx/mach-crag6410.c
arch/arm/mach-sa1100/pci-nanoengine.c
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/Makefile
arch/arm/mach-shmobile/board-ap4evb.c
arch/arm/mach-shmobile/board-bonito.c [new file with mode: 0644]
arch/arm/mach-shmobile/board-mackerel.c
arch/arm/mach-shmobile/board-marzen.c [new file with mode: 0644]
arch/arm/mach-shmobile/clock-r8a7740.c [new file with mode: 0644]
arch/arm/mach-shmobile/clock-r8a7779.c [new file with mode: 0644]
arch/arm/mach-shmobile/clock-sh7372.c
arch/arm/mach-shmobile/clock-sh73a0.c
arch/arm/mach-shmobile/headsmp.S
arch/arm/mach-shmobile/hotplug.c
arch/arm/mach-shmobile/include/mach/common.h
arch/arm/mach-shmobile/include/mach/r8a7740.h [new file with mode: 0644]
arch/arm/mach-shmobile/include/mach/r8a7779.h [new file with mode: 0644]
arch/arm/mach-shmobile/intc-r8a7740.c [new file with mode: 0644]
arch/arm/mach-shmobile/intc-r8a7779.c [new file with mode: 0644]
arch/arm/mach-shmobile/pfc-r8a7740.c [new file with mode: 0644]
arch/arm/mach-shmobile/pfc-r8a7779.c [new file with mode: 0644]
arch/arm/mach-shmobile/platsmp.c
arch/arm/mach-shmobile/pm-r8a7779.c [new file with mode: 0644]
arch/arm/mach-shmobile/setup-r8a7740.c [new file with mode: 0644]
arch/arm/mach-shmobile/setup-r8a7779.c [new file with mode: 0644]
arch/arm/mach-shmobile/setup-sh7372.c
arch/arm/mach-shmobile/setup-sh73a0.c
arch/arm/mach-shmobile/smp-r8a7779.c [new file with mode: 0644]
arch/arm/mach-tegra/board-harmony.c
arch/arm/mach-tegra/board-seaboard.c
arch/arm/mach-tegra/pcie.c
arch/arm/mach-versatile/pci.c
arch/arm/plat-iop/pci.c
arch/arm/plat-omap/cpu-omap.c [deleted file]
arch/blackfin/include/asm/pci.h
arch/frv/Kconfig
arch/frv/mb93090-mb00/pci-frv.c
arch/frv/mb93090-mb00/pci-frv.h
arch/frv/mb93090-mb00/pci-vdk.c
arch/h8300/Kconfig
arch/h8300/include/asm/pci.h
arch/ia64/include/asm/pci.h
arch/ia64/pci/pci.c
arch/m68k/Kconfig
arch/microblaze/Kconfig
arch/microblaze/include/asm/pci-bridge.h
arch/microblaze/include/asm/pci.h
arch/microblaze/pci/pci-common.c
arch/mips/pci/pci.c
arch/mn10300/unit-asb2305/pci-asb2305.c
arch/mn10300/unit-asb2305/pci-asb2305.h
arch/mn10300/unit-asb2305/pci.c
arch/openrisc/Kconfig
arch/powerpc/include/asm/pci-bridge.h
arch/powerpc/include/asm/pci.h
arch/powerpc/kernel/pci-common.c
arch/powerpc/kernel/pci_64.c
arch/score/Kconfig
arch/sh/boards/board-magicpanelr2.c
arch/sh/boards/board-sh7757lcr.c
arch/sh/boards/mach-ap325rxa/setup.c
arch/sh/boards/mach-ecovec24/setup.c
arch/sh/boards/mach-kfr2r09/setup.c
arch/sh/boards/mach-migor/setup.c
arch/sh/boards/mach-rsk/setup.c
arch/sh/boards/mach-se/7722/setup.c
arch/sh/boards/mach-se/7724/setup.c
arch/sh/drivers/pci/pci.c
arch/sh/include/asm/device.h
arch/sh/include/asm/hwblk.h [deleted file]
arch/sh/include/cpu-sh4/cpu/sh7722.h
arch/sh/include/cpu-sh4/cpu/sh7723.h
arch/sh/include/cpu-sh4/cpu/sh7724.h
arch/sh/kernel/cpu/Makefile
arch/sh/kernel/cpu/hwblk.c [deleted file]
arch/sh/kernel/cpu/sh4/sq.c
arch/sh/kernel/cpu/sh4a/Makefile
arch/sh/kernel/cpu/sh4a/clock-sh7722.c
arch/sh/kernel/cpu/sh4a/clock-sh7723.c
arch/sh/kernel/cpu/sh4a/clock-sh7724.c
arch/sh/kernel/cpu/sh4a/clock-sh7757.c
arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c [deleted file]
arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c [deleted file]
arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c [deleted file]
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
arch/sh/kernel/cpu/shmobile/Makefile
arch/sh/kernel/cpu/shmobile/cpuidle.c
arch/sh/kernel/cpu/shmobile/pm_runtime.c [deleted file]
arch/sh/kernel/entry-common.S
arch/sh/kernel/signal_32.c
arch/sh/kernel/signal_64.c
arch/sh/kernel/time.c
arch/sh/mm/cache-sh2a.c
arch/sparc/include/asm/pci_32.h
arch/sparc/include/asm/pci_64.h
arch/sparc/kernel/leon_pci.c
arch/sparc/kernel/pci.c
arch/tile/include/asm/pci.h
arch/tile/kernel/pci.c
arch/um/Kconfig.common
arch/unicore32/include/asm/pci.h
arch/unicore32/kernel/pci.c
arch/x86/Kconfig
arch/x86/Kconfig.debug
arch/x86/boot/compressed/Makefile
arch/x86/boot/compressed/eboot.c [new file with mode: 0644]
arch/x86/boot/compressed/eboot.h [new file with mode: 0644]
arch/x86/boot/compressed/efi_stub_32.S [new file with mode: 0644]
arch/x86/boot/compressed/efi_stub_64.S [new file with mode: 0644]
arch/x86/boot/compressed/head_32.S
arch/x86/boot/compressed/head_64.S
arch/x86/boot/compressed/string.c
arch/x86/boot/header.S
arch/x86/boot/string.c
arch/x86/boot/tools/build.c
arch/x86/crypto/Makefile
arch/x86/crypto/serpent-sse2-i586-asm_32.S [new file with mode: 0644]
arch/x86/crypto/serpent-sse2-x86_64-asm_64.S [new file with mode: 0644]
arch/x86/crypto/serpent_sse2_glue.c [new file with mode: 0644]
arch/x86/crypto/twofish_glue_3way.c
arch/x86/include/asm/amd_nb.h
arch/x86/include/asm/bootparam.h
arch/x86/include/asm/efi.h
arch/x86/include/asm/fixmap.h
arch/x86/include/asm/init.h
arch/x86/include/asm/pci.h
arch/x86/include/asm/pci_x86.h
arch/x86/include/asm/serpent.h [new file with mode: 0644]
arch/x86/include/asm/setup.h
arch/x86/include/asm/smp.h
arch/x86/include/asm/thread_info.h
arch/x86/include/asm/topology.h
arch/x86/include/asm/x86_init.h
arch/x86/kernel/Makefile
arch/x86/kernel/amd_nb.c
arch/x86/kernel/asm-offsets.c
arch/x86/kernel/e820.c
arch/x86/kernel/early_printk.c
arch/x86/kernel/irq_32.c
arch/x86/kernel/irq_64.c
arch/x86/kernel/nmi_selftest.c [new file with mode: 0644]
arch/x86/kernel/setup.c
arch/x86/kernel/smp.c
arch/x86/kernel/smpboot.c
arch/x86/kernel/tsc.c
arch/x86/kernel/x86_init.c
arch/x86/mm/init.c
arch/x86/mm/init_32.c
arch/x86/mm/init_64.c
arch/x86/mm/mmap.c
arch/x86/mm/numa.c
arch/x86/mm/pageattr.c
arch/x86/pci/Makefile
arch/x86/pci/acpi.c
arch/x86/pci/amd_bus.c
arch/x86/pci/broadcom_bus.c
arch/x86/pci/bus_numa.c
arch/x86/pci/common.c
arch/x86/pci/i386.c
arch/x86/pci/legacy.c
arch/x86/pci/numaq_32.c
arch/x86/platform/mrst/Makefile
arch/x86/platform/mrst/mrst.c
arch/xtensa/Kconfig
arch/xtensa/include/asm/pci.h
arch/xtensa/kernel/pci.c
crypto/Kconfig
crypto/Makefile
crypto/algapi.c
crypto/ansi_cprng.c
crypto/crypto_user.c
crypto/lrw.c
crypto/serpent.c [deleted file]
crypto/serpent_generic.c [new file with mode: 0644]
crypto/tcrypt.c
crypto/tcrypt.h
crypto/testmgr.c
crypto/testmgr.h
crypto/twofish_common.c
crypto/xts.c
drivers/acpi/pci_irq.c
drivers/base/Kconfig
drivers/base/base.h
drivers/base/cpu.c
drivers/char/hw_random/atmel-rng.c
drivers/char/hw_random/n2-drv.c
drivers/char/hw_random/octeon-rng.c
drivers/char/hw_random/pasemi-rng.c
drivers/char/hw_random/picoxcell-rng.c
drivers/char/hw_random/ppc4xx-rng.c
drivers/char/hw_random/timeriomem-rng.c
drivers/char/tpm/Kconfig
drivers/char/tpm/tpm.c
drivers/char/tpm/tpm.h
drivers/char/tpm/tpm_tis.c
drivers/cpufreq/Kconfig.arm
drivers/cpufreq/Makefile
drivers/cpufreq/cpufreq.c
drivers/cpufreq/cpufreq_ondemand.c
drivers/cpufreq/cpufreq_userspace.c
drivers/cpufreq/exynos-cpufreq.c [new file with mode: 0644]
drivers/cpufreq/exynos4210-cpufreq.c
drivers/cpufreq/omap-cpufreq.c [new file with mode: 0644]
drivers/cpufreq/powernow-k8.c
drivers/cpufreq/s3c64xx-cpufreq.c
drivers/crypto/amcc/crypto4xx_core.c
drivers/crypto/caam/caamalg.c
drivers/crypto/caam/compat.h
drivers/crypto/caam/ctrl.c
drivers/crypto/caam/desc.h
drivers/crypto/caam/desc_constr.h
drivers/crypto/caam/regs.h
drivers/crypto/mv_cesa.c
drivers/crypto/picoxcell_crypto.c
drivers/crypto/s5p-sss.c
drivers/crypto/talitos.c
drivers/crypto/talitos.h
drivers/firmware/Kconfig
drivers/firmware/Makefile
drivers/firmware/sigma.c [deleted file]
drivers/hid/hid-wacom.c
drivers/hid/hid-wiimote-core.c
drivers/md/md.c
drivers/md/raid1.c
drivers/mfd/Kconfig
drivers/mfd/Makefile
drivers/mfd/max8925-core.c
drivers/mfd/wm8994-core.c
drivers/mfd/wm8994-irq.c
drivers/mfd/wm8994-regmap.c [new file with mode: 0644]
drivers/mfd/wm8994.h [new file with mode: 0644]
drivers/net/wireless/brcm80211/brcmsmac/srom.c
drivers/parisc/dino.c
drivers/parisc/lba_pci.c
drivers/pci/access.c
drivers/pci/ats.c
drivers/pci/bus.c
drivers/pci/iov.c
drivers/pci/msi.c
drivers/pci/pci-driver.c
drivers/pci/pci.c
drivers/pci/pci.h
drivers/pci/pcie/Kconfig
drivers/pci/probe.c
drivers/pci/remove.c
drivers/pci/setup-res.c
drivers/platform/x86/Kconfig
drivers/pnp/quirks.c
drivers/power/Kconfig
drivers/power/Makefile
drivers/power/bq27x00_battery.c
drivers/power/charger-manager.c [new file with mode: 0644]
drivers/power/collie_battery.c
drivers/power/da9030_battery.c
drivers/power/da9052-battery.c [new file with mode: 0644]
drivers/power/ds2760_battery.c
drivers/power/ds2780_battery.c
drivers/power/gpio-charger.c
drivers/power/intel_mid_battery.c
drivers/power/isp1704_charger.c
drivers/power/jz4740-battery.c
drivers/power/lp8727_charger.c [new file with mode: 0644]
drivers/power/max17042_battery.c
drivers/power/max8903_charger.c
drivers/power/max8925_power.c
drivers/power/max8997_charger.c
drivers/power/max8998_charger.c
drivers/power/olpc_battery.c
drivers/power/pcf50633-charger.c
drivers/power/pda_power.c
drivers/power/power_supply_core.c
drivers/power/power_supply_sysfs.c
drivers/power/s3c_adc_battery.c
drivers/power/sbs-battery.c [moved from drivers/power/bq20z75.c with 52% similarity]
drivers/power/tosa_battery.c
drivers/power/wm831x_backup.c
drivers/power/wm831x_power.c
drivers/power/wm8350_power.c
drivers/power/wm97xx_battery.c
drivers/power/z2_battery.c
drivers/rtc/Kconfig
drivers/scsi/ipr.c
drivers/scsi/ipr.h
drivers/sh/Makefile
drivers/sh/clk/core.c
drivers/sh/clk/cpg.c
drivers/sh/pfc.c
drivers/tty/serial/sh-sci.c
drivers/tty/serial/sh-sci.h
drivers/uio/uio_pci_generic.c
fs/autofs4/autofs_i.h
fs/autofs4/inode.c
fs/autofs4/waitq.c
fs/block_dev.c
fs/coda/cnode.c
fs/coda/coda_fs_i.h
fs/coda/dir.c
fs/coda/inode.c
fs/dcache.c
fs/hfsplus/super.c
include/crypto/algapi.h
include/crypto/lrw.h [new file with mode: 0644]
include/crypto/serpent.h [new file with mode: 0644]
include/crypto/twofish.h
include/crypto/xts.h [new file with mode: 0644]
include/linux/dcache.h
include/linux/digsig.h [new file with mode: 0644]
include/linux/efi.h
include/linux/kernel.h
include/linux/key-type.h
include/linux/lp8727.h [new file with mode: 0755]
include/linux/mfd/max8925.h
include/linux/mfd/wm8994/core.h
include/linux/mfd/wm8994/pdata.h
include/linux/mfd/wm8994/registers.h
include/linux/mm.h
include/linux/mpi.h [new file with mode: 0644]
include/linux/pci.h
include/linux/pci_ids.h
include/linux/pci_regs.h
include/linux/pda_power.h
include/linux/power/charger-manager.h [new file with mode: 0644]
include/linux/power/sbs-battery.h [moved from include/linux/power/bq20z75.h with 85% similarity]
include/linux/power_supply.h
include/linux/s3c_adc_battery.h
include/linux/security.h
include/linux/serial_sci.h
include/linux/sh_clk.h
include/linux/sh_pfc.h
include/linux/sigma.h [deleted file]
include/sound/Kbuild
include/sound/compress_driver.h [new file with mode: 0644]
include/sound/compress_offload.h [new file with mode: 0644]
include/sound/compress_params.h [new file with mode: 0644]
include/sound/control.h
include/sound/core.h
include/sound/minors.h
include/sound/sh_fsi.h
include/sound/soc-dapm.h
include/sound/soc.h
include/sound/sta32x.h [new file with mode: 0644]
include/sound/wm8903.h
init/Kconfig
init/calibrate.c
init/main.c
kernel/sched/core.c
kernel/sched/fair.c
kernel/sysctl.c
lib/Kconfig
lib/Makefile
lib/devres.c
lib/digsig.c [new file with mode: 0644]
lib/mpi/Makefile [new file with mode: 0644]
lib/mpi/generic_mpi-asm-defs.h [new file with mode: 0644]
lib/mpi/generic_mpih-add1.c [new file with mode: 0644]
lib/mpi/generic_mpih-lshift.c [new file with mode: 0644]
lib/mpi/generic_mpih-mul1.c [new file with mode: 0644]
lib/mpi/generic_mpih-mul2.c [new file with mode: 0644]
lib/mpi/generic_mpih-mul3.c [new file with mode: 0644]
lib/mpi/generic_mpih-rshift.c [new file with mode: 0644]
lib/mpi/generic_mpih-sub1.c [new file with mode: 0644]
lib/mpi/longlong.h [new file with mode: 0644]
lib/mpi/mpi-add.c [new file with mode: 0644]
lib/mpi/mpi-bit.c [new file with mode: 0644]
lib/mpi/mpi-cmp.c [new file with mode: 0644]
lib/mpi/mpi-div.c [new file with mode: 0644]
lib/mpi/mpi-gcd.c [new file with mode: 0644]
lib/mpi/mpi-inline.c [new file with mode: 0644]
lib/mpi/mpi-inline.h [new file with mode: 0644]
lib/mpi/mpi-internal.h [new file with mode: 0644]
lib/mpi/mpi-inv.c [new file with mode: 0644]
lib/mpi/mpi-mpow.c [new file with mode: 0644]
lib/mpi/mpi-mul.c [new file with mode: 0644]
lib/mpi/mpi-pow.c [new file with mode: 0644]
lib/mpi/mpi-scan.c [new file with mode: 0644]
lib/mpi/mpicoder.c [new file with mode: 0644]
lib/mpi/mpih-cmp.c [new file with mode: 0644]
lib/mpi/mpih-div.c [new file with mode: 0644]
lib/mpi/mpih-mul.c [new file with mode: 0644]
lib/mpi/mpiutil.c [new file with mode: 0644]
mm/debug-pagealloc.c
mm/slab.c
mm/slub.c
security/apparmor/audit.c
security/apparmor/lsm.c
security/inode.c
security/integrity/Kconfig
security/integrity/Makefile
security/integrity/digsig.c [new file with mode: 0644]
security/integrity/evm/evm.h
security/integrity/evm/evm_crypto.c
security/integrity/evm/evm_main.c
security/integrity/ima/ima_api.c
security/integrity/ima/ima_queue.c
security/integrity/integrity.h
security/keys/key.c
security/selinux/selinuxfs.c
security/selinux/ss/conditional.c
security/tomoyo/.gitignore [new file with mode: 0644]
security/tomoyo/common.h
sound/arm/pxa2xx-ac97.c
sound/core/Kconfig
sound/core/Makefile
sound/core/compress_offload.c [new file with mode: 0644]
sound/core/ctljack.c [new file with mode: 0644]
sound/core/oss/pcm_oss.c
sound/core/seq/seq_dummy.c
sound/core/sound.c
sound/drivers/aloop.c
sound/drivers/dummy.c
sound/drivers/ml403-ac97cr.c
sound/drivers/mpu401/mpu401.c
sound/drivers/mts64.c
sound/drivers/opl3/opl3_midi.c
sound/drivers/opl3/opl3_seq.c
sound/drivers/pcsp/pcsp.c
sound/drivers/pcsp/pcsp_lib.c
sound/drivers/portman2x4.c
sound/drivers/serial-u16550.c
sound/drivers/virmidi.c
sound/isa/ad1816a/ad1816a.c
sound/isa/ad1848/ad1848.c
sound/isa/adlib.c
sound/isa/als100.c
sound/isa/azt2320.c
sound/isa/cmi8330.c
sound/isa/cs423x/cs4231.c
sound/isa/cs423x/cs4236.c
sound/isa/es1688/es1688.c
sound/isa/es18xx.c
sound/isa/galaxy/galaxy.c
sound/isa/gus/gusclassic.c
sound/isa/gus/gusextreme.c
sound/isa/gus/gusmax.c
sound/isa/gus/interwave.c
sound/isa/msnd/msnd_pinnacle.c
sound/isa/opl3sa2.c
sound/isa/opti9xx/miro.c
sound/isa/opti9xx/opti92x-ad1848.c
sound/isa/sb/jazz16.c
sound/isa/sb/sb16.c
sound/isa/sb/sb8.c
sound/isa/sc6000.c
sound/isa/wavefront/wavefront.c
sound/mips/hal2.c
sound/mips/sgio2audio.c
sound/oss/ad1848.c
sound/oss/msnd_pinnacle.c
sound/oss/pas2_card.c
sound/oss/pss.c
sound/oss/trix.c
sound/pci/ac97/ac97_codec.c
sound/pci/ad1889.c
sound/pci/ali5451/ali5451.c
sound/pci/als300.c
sound/pci/als4000.c
sound/pci/asihpi/asihpi.c
sound/pci/asihpi/hpi.h
sound/pci/asihpi/hpi6000.c
sound/pci/asihpi/hpi6000.h
sound/pci/asihpi/hpi6205.c
sound/pci/asihpi/hpi_internal.h
sound/pci/asihpi/hpi_version.h [new file with mode: 0644]
sound/pci/asihpi/hpicmn.c
sound/pci/asihpi/hpicmn.h
sound/pci/asihpi/hpidebug.c
sound/pci/asihpi/hpidebug.h
sound/pci/asihpi/hpidspcd.c
sound/pci/asihpi/hpidspcd.h
sound/pci/asihpi/hpifunc.c
sound/pci/asihpi/hpimsginit.c
sound/pci/asihpi/hpimsginit.h
sound/pci/asihpi/hpimsgx.c
sound/pci/asihpi/hpimsgx.h
sound/pci/asihpi/hpioctl.c
sound/pci/asihpi/hpioctl.h
sound/pci/asihpi/hpios.c
sound/pci/asihpi/hpios.h
sound/pci/asihpi/hpipcida.h
sound/pci/atiixp.c
sound/pci/atiixp_modem.c
sound/pci/au88x0/au88x0.c
sound/pci/au88x0/au88x0_core.c
sound/pci/au88x0/au88x0_pcm.c
sound/pci/au88x0/au88x0_xtalk.c
sound/pci/aw2/aw2-alsa.c
sound/pci/azt3328.c
sound/pci/bt87x.c
sound/pci/ca0106/ca0106_main.c
sound/pci/cmipci.c
sound/pci/cs4281.c
sound/pci/cs46xx/cs46xx.c
sound/pci/cs5530.c
sound/pci/cs5535audio/cs5535audio.c
sound/pci/ctxfi/ctsrc.c
sound/pci/ctxfi/cttimer.c
sound/pci/ctxfi/xfi.c
sound/pci/echoaudio/echoaudio.c
sound/pci/emu10k1/emu10k1.c
sound/pci/emu10k1/emu10k1_main.c
sound/pci/emu10k1/emu10k1x.c
sound/pci/ens1370.c
sound/pci/es1938.c
sound/pci/es1968.c
sound/pci/fm801.c
sound/pci/hda/Kconfig
sound/pci/hda/Makefile
sound/pci/hda/alc262_quirks.c [deleted file]
sound/pci/hda/alc880_quirks.c
sound/pci/hda/alc882_quirks.c
sound/pci/hda/hda_codec.c
sound/pci/hda/hda_codec.h
sound/pci/hda/hda_intel.c
sound/pci/hda/hda_jack.c [new file with mode: 0644]
sound/pci/hda/hda_jack.h [new file with mode: 0644]
sound/pci/hda/hda_local.h
sound/pci/hda/hda_proc.c
sound/pci/hda/patch_analog.c
sound/pci/hda/patch_ca0110.c
sound/pci/hda/patch_cirrus.c
sound/pci/hda/patch_conexant.c
sound/pci/hda/patch_hdmi.c
sound/pci/hda/patch_realtek.c
sound/pci/hda/patch_sigmatel.c
sound/pci/hda/patch_via.c
sound/pci/ice1712/amp.c
sound/pci/ice1712/envy24ht.h
sound/pci/ice1712/ice1712.c
sound/pci/ice1712/ice1724.c
sound/pci/intel8x0.c
sound/pci/intel8x0m.c
sound/pci/korg1212/korg1212.c
sound/pci/lola/lola.c
sound/pci/lx6464es/lx6464es.c
sound/pci/maestro3.c
sound/pci/mixart/mixart.c
sound/pci/nm256/nm256.c
sound/pci/oxygen/oxygen.c
sound/pci/oxygen/virtuoso.c
sound/pci/oxygen/xonar_cs43xx.c
sound/pci/oxygen/xonar_dg.c
sound/pci/oxygen/xonar_wm87x6.c
sound/pci/pcxhr/pcxhr.c
sound/pci/riptide/riptide.c
sound/pci/rme32.c
sound/pci/rme96.c
sound/pci/rme9652/hdsp.c
sound/pci/rme9652/hdspm.c
sound/pci/rme9652/rme9652.c
sound/pci/sis7019.c
sound/pci/sonicvibes.c
sound/pci/trident/trident.c
sound/pci/via82xx.c
sound/pci/via82xx_modem.c
sound/pci/vx222/vx222.c
sound/pci/ymfpci/ymfpci.c
sound/pcmcia/pdaudiocf/pdaudiocf.c
sound/pcmcia/vx/vxpocket.c
sound/ppc/powermac.c
sound/sh/aica.c
sound/sh/sh_dac_audio.c
sound/soc/Kconfig
sound/soc/atmel/Kconfig
sound/soc/atmel/atmel-pcm.c
sound/soc/atmel/atmel_ssc_dai.c
sound/soc/atmel/sam9g20_wm8731.c
sound/soc/atmel/snd-soc-afeb9260.c
sound/soc/au1x/ac97c.c
sound/soc/au1x/db1000.c
sound/soc/au1x/db1200.c
sound/soc/au1x/dbdma2.c
sound/soc/au1x/dma.c
sound/soc/au1x/i2sc.c
sound/soc/au1x/psc-ac97.c
sound/soc/au1x/psc-i2s.c
sound/soc/blackfin/bf5xx-ac97-pcm.c
sound/soc/blackfin/bf5xx-ac97.c
sound/soc/blackfin/bf5xx-ad1836.c
sound/soc/blackfin/bf5xx-ad193x.c
sound/soc/blackfin/bf5xx-ad1980.c
sound/soc/blackfin/bf5xx-ad73311.c
sound/soc/blackfin/bf5xx-i2s-pcm.c
sound/soc/blackfin/bf5xx-i2s.c
sound/soc/blackfin/bf5xx-ssm2602.c
sound/soc/blackfin/bf5xx-tdm-pcm.c
sound/soc/blackfin/bf5xx-tdm.c
sound/soc/blackfin/bfin-eval-adau1373.c
sound/soc/blackfin/bfin-eval-adau1701.c
sound/soc/blackfin/bfin-eval-adav80x.c
sound/soc/codecs/88pm860x-codec.c
sound/soc/codecs/Kconfig
sound/soc/codecs/Makefile
sound/soc/codecs/ac97.c
sound/soc/codecs/ad1836.c
sound/soc/codecs/ad193x.c
sound/soc/codecs/ad193x.h
sound/soc/codecs/ad1980.c
sound/soc/codecs/ad73311.c
sound/soc/codecs/adau1373.c
sound/soc/codecs/adau1701.c
sound/soc/codecs/adav80x.c
sound/soc/codecs/ads117x.c
sound/soc/codecs/ak4104.c
sound/soc/codecs/ak4535.c
sound/soc/codecs/ak4641.c
sound/soc/codecs/ak4642.c
sound/soc/codecs/ak4671.c
sound/soc/codecs/alc5623.c
sound/soc/codecs/alc5632.c [new file with mode: 0644]
sound/soc/codecs/alc5632.h [new file with mode: 0644]
sound/soc/codecs/cq93vc.c
sound/soc/codecs/cs4270.c
sound/soc/codecs/cs4271.c
sound/soc/codecs/cs42l51.c
sound/soc/codecs/cs42l73.c [new file with mode: 0644]
sound/soc/codecs/cs42l73.h [new file with mode: 0644]
sound/soc/codecs/cx20442.c
sound/soc/codecs/da7210.c
sound/soc/codecs/dfbmcs320.c
sound/soc/codecs/dmic.c
sound/soc/codecs/jz4740.c
sound/soc/codecs/lm4857.c
sound/soc/codecs/max98088.c
sound/soc/codecs/max98095.c
sound/soc/codecs/max9850.c
sound/soc/codecs/pcm3008.c
sound/soc/codecs/rt5631.c
sound/soc/codecs/sgtl5000.c
sound/soc/codecs/sigmadsp.c [new file with mode: 0644]
sound/soc/codecs/sigmadsp.h [new file with mode: 0644]
sound/soc/codecs/sn95031.c
sound/soc/codecs/spdif_transciever.c
sound/soc/codecs/ssm2602.c
sound/soc/codecs/sta32x.c
sound/soc/codecs/stac9766.c
sound/soc/codecs/tlv320aic23.c
sound/soc/codecs/tlv320aic26.c
sound/soc/codecs/tlv320aic32x4.c
sound/soc/codecs/tlv320aic3x.c
sound/soc/codecs/tlv320dac33.c
sound/soc/codecs/tpa6130a2.c
sound/soc/codecs/twl4030.c
sound/soc/codecs/twl6040.c
sound/soc/codecs/twl6040.h
sound/soc/codecs/uda134x.c
sound/soc/codecs/uda1380.c
sound/soc/codecs/wl1273.c
sound/soc/codecs/wm1250-ev1.c
sound/soc/codecs/wm2000.c
sound/soc/codecs/wm2000.h
sound/soc/codecs/wm5100-tables.c
sound/soc/codecs/wm5100.c
sound/soc/codecs/wm5100.h
sound/soc/codecs/wm8350.c
sound/soc/codecs/wm8400.c
sound/soc/codecs/wm8510.c
sound/soc/codecs/wm8523.c
sound/soc/codecs/wm8580.c
sound/soc/codecs/wm8711.c
sound/soc/codecs/wm8727.c
sound/soc/codecs/wm8728.c
sound/soc/codecs/wm8731.c
sound/soc/codecs/wm8737.c
sound/soc/codecs/wm8741.c
sound/soc/codecs/wm8750.c
sound/soc/codecs/wm8753.c
sound/soc/codecs/wm8770.c
sound/soc/codecs/wm8776.c
sound/soc/codecs/wm8782.c
sound/soc/codecs/wm8804.c
sound/soc/codecs/wm8900.c
sound/soc/codecs/wm8903.c
sound/soc/codecs/wm8904.c
sound/soc/codecs/wm8940.c
sound/soc/codecs/wm8955.c
sound/soc/codecs/wm8958-dsp2.c
sound/soc/codecs/wm8960.c
sound/soc/codecs/wm8961.c
sound/soc/codecs/wm8962.c
sound/soc/codecs/wm8971.c
sound/soc/codecs/wm8974.c
sound/soc/codecs/wm8978.c
sound/soc/codecs/wm8983.c
sound/soc/codecs/wm8985.c
sound/soc/codecs/wm8988.c
sound/soc/codecs/wm8990.c
sound/soc/codecs/wm8991.c
sound/soc/codecs/wm8993.c
sound/soc/codecs/wm8994-tables.c [deleted file]
sound/soc/codecs/wm8994.c
sound/soc/codecs/wm8994.h
sound/soc/codecs/wm8995.c
sound/soc/codecs/wm8996.c
sound/soc/codecs/wm9081.c
sound/soc/codecs/wm9090.c
sound/soc/codecs/wm9705.c
sound/soc/codecs/wm9712.c
sound/soc/codecs/wm9713.c
sound/soc/codecs/wm_hubs.c
sound/soc/davinci/davinci-evm.c
sound/soc/davinci/davinci-i2s.c
sound/soc/davinci/davinci-mcasp.c
sound/soc/davinci/davinci-pcm.c
sound/soc/davinci/davinci-sffsdr.c
sound/soc/davinci/davinci-vcif.c
sound/soc/ep93xx/edb93xx.c
sound/soc/ep93xx/ep93xx-ac97.c
sound/soc/ep93xx/ep93xx-i2s.c
sound/soc/ep93xx/ep93xx-pcm.c
sound/soc/ep93xx/simone.c
sound/soc/ep93xx/snappercl15.c
sound/soc/fsl/efika-audio-fabric.c
sound/soc/fsl/fsl_dma.c
sound/soc/fsl/fsl_ssi.c
sound/soc/fsl/mpc5200_dma.c
sound/soc/fsl/mpc5200_psc_ac97.c
sound/soc/fsl/mpc5200_psc_i2s.c
sound/soc/fsl/mpc8610_hpcd.c
sound/soc/fsl/p1022_ds.c
sound/soc/fsl/pcm030-audio-fabric.c
sound/soc/imx/eukrea-tlv320.c
sound/soc/imx/imx-pcm-dma-mx2.c
sound/soc/imx/imx-pcm-fiq.c
sound/soc/imx/imx-ssi.c
sound/soc/imx/mx27vis-aic32x4.c
sound/soc/imx/phycore-ac97.c
sound/soc/imx/wm1133-ev1.c
sound/soc/jz4740/jz4740-i2s.c
sound/soc/jz4740/jz4740-pcm.c
sound/soc/jz4740/qi_lb60.c
sound/soc/kirkwood/kirkwood-dma.c
sound/soc/kirkwood/kirkwood-i2s.c
sound/soc/kirkwood/kirkwood-openrd.c
sound/soc/kirkwood/kirkwood-t5325.c
sound/soc/kirkwood/kirkwood.h
sound/soc/mid-x86/Kconfig
sound/soc/mid-x86/mfld_machine.c
sound/soc/mid-x86/sst_platform.c
sound/soc/mid-x86/sst_platform.h
sound/soc/mxs/mxs-pcm.c
sound/soc/mxs/mxs-saif.c
sound/soc/mxs/mxs-sgtl5000.c
sound/soc/nuc900/nuc900-ac97.c
sound/soc/nuc900/nuc900-audio.c
sound/soc/nuc900/nuc900-pcm.c
sound/soc/omap/Kconfig
sound/soc/omap/Makefile
sound/soc/omap/am3517evm.c
sound/soc/omap/ams-delta.c
sound/soc/omap/igep0020.c
sound/soc/omap/n810.c
sound/soc/omap/omap-dmic.c [new file with mode: 0644]
sound/soc/omap/omap-dmic.h [new file with mode: 0644]
sound/soc/omap/omap-hdmi.c
sound/soc/omap/omap-mcbsp.c
sound/soc/omap/omap-mcpdm.c
sound/soc/omap/omap-pcm.c
sound/soc/omap/omap3evm.c
sound/soc/omap/omap3pandora.c
sound/soc/omap/omap4-hdmi-card.c
sound/soc/omap/osk5912.c
sound/soc/omap/overo.c
sound/soc/omap/rx51.c
sound/soc/omap/sdp3430.c
sound/soc/omap/sdp4430.c
sound/soc/omap/zoom2.c
sound/soc/pxa/corgi.c
sound/soc/pxa/e740_wm9705.c
sound/soc/pxa/e750_wm9705.c
sound/soc/pxa/e800_wm9712.c
sound/soc/pxa/em-x270.c
sound/soc/pxa/hx4700.c
sound/soc/pxa/imote2.c
sound/soc/pxa/magician.c
sound/soc/pxa/mioa701_wm9713.c
sound/soc/pxa/palm27x.c
sound/soc/pxa/poodle.c
sound/soc/pxa/pxa-ssp.c
sound/soc/pxa/pxa2xx-ac97.c
sound/soc/pxa/pxa2xx-i2s.c
sound/soc/pxa/pxa2xx-pcm.c
sound/soc/pxa/raumfeld.c
sound/soc/pxa/saarb.c
sound/soc/pxa/spitz.c
sound/soc/pxa/tavorevb3.c
sound/soc/pxa/tosa.c
sound/soc/pxa/z2.c
sound/soc/pxa/zylonite.c
sound/soc/s6000/s6000-i2s.c
sound/soc/s6000/s6000-pcm.c
sound/soc/s6000/s6105-ipcam.c
sound/soc/samsung/Kconfig
sound/soc/samsung/Makefile
sound/soc/samsung/ac97.c
sound/soc/samsung/dma.c
sound/soc/samsung/goni_wm8994.c
sound/soc/samsung/h1940_uda1380.c
sound/soc/samsung/i2s.c
sound/soc/samsung/idma.c
sound/soc/samsung/idma.h
sound/soc/samsung/jive_wm8750.c
sound/soc/samsung/littlemill.c [new file with mode: 0644]
sound/soc/samsung/ln2440sbc_alc650.c
sound/soc/samsung/lowland.c [new file with mode: 0644]
sound/soc/samsung/neo1973_wm8753.c
sound/soc/samsung/pcm.c
sound/soc/samsung/rx1950_uda1380.c
sound/soc/samsung/s3c2412-i2s.c
sound/soc/samsung/s3c24xx-i2s.c
sound/soc/samsung/s3c24xx_simtec_hermes.c
sound/soc/samsung/s3c24xx_simtec_tlv320aic23.c
sound/soc/samsung/s3c24xx_uda134x.c
sound/soc/samsung/smartq_wm8987.c
sound/soc/samsung/smdk2443_wm9710.c
sound/soc/samsung/smdk_spdif.c
sound/soc/samsung/smdk_wm8580.c
sound/soc/samsung/smdk_wm8580pcm.c
sound/soc/samsung/smdk_wm8994.c
sound/soc/samsung/smdk_wm8994pcm.c
sound/soc/samsung/smdk_wm9713.c
sound/soc/samsung/spdif.c
sound/soc/samsung/speyside.c
sound/soc/samsung/tobermory.c [moved from sound/soc/samsung/speyside_wm8962.c with 69% similarity]
sound/soc/sh/dma-sh7760.c
sound/soc/sh/fsi-ak4642.c
sound/soc/sh/fsi-da7210.c
sound/soc/sh/fsi-hdmi.c
sound/soc/sh/fsi.c
sound/soc/sh/hac.c
sound/soc/sh/migor.c
sound/soc/sh/sh7760-ac97.c
sound/soc/sh/siu_dai.c
sound/soc/sh/ssi.c
sound/soc/soc-cache.c
sound/soc/soc-core.c
sound/soc/soc-dapm.c
sound/soc/soc-jack.c
sound/soc/soc-pcm.c
sound/soc/tegra/Kconfig
sound/soc/tegra/Makefile
sound/soc/tegra/tegra_alc5632.c [new file with mode: 0644]
sound/soc/tegra/tegra_das.c
sound/soc/tegra/tegra_i2s.c
sound/soc/tegra/tegra_i2s.h
sound/soc/tegra/tegra_pcm.c
sound/soc/tegra/tegra_spdif.c
sound/soc/tegra/tegra_wm8903.c
sound/soc/tegra/trimslice.c
sound/soc/txx9/txx9aclc-ac97.c
sound/soc/txx9/txx9aclc-generic.c
sound/soc/txx9/txx9aclc.c
sound/sparc/amd7930.c
sound/sparc/cs4231.c
sound/sparc/dbri.c
sound/usb/6fire/chip.c
sound/usb/caiaq/device.c
sound/usb/card.c
sound/usb/endpoint.c
sound/usb/format.c
sound/usb/misc/ua101.c
sound/usb/quirks-table.h
sound/usb/usx2y/us122l.c
sound/usb/usx2y/usb_stream.c
sound/usb/usx2y/usbusx2y.c

index 5de23c0..cab4ec5 100644 (file)
   /* SNDRV_CARDS: maximum number of cards supported by this module */
   static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
   static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
-  static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
+  static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
 
   /* definition of the chip-specific record */
   struct mychip {
diff --git a/Documentation/devicetree/bindings/power_supply/olpc_battery.txt b/Documentation/devicetree/bindings/power_supply/olpc_battery.txt
new file mode 100644 (file)
index 0000000..c8901b3
--- /dev/null
@@ -0,0 +1,5 @@
+OLPC battery
+~~~~~~~~~~~~
+
+Required properties:
+  - compatible : "olpc,xo1-battery"
diff --git a/Documentation/devicetree/bindings/power_supply/sbs_sbs-battery.txt b/Documentation/devicetree/bindings/power_supply/sbs_sbs-battery.txt
new file mode 100644 (file)
index 0000000..c40e892
--- /dev/null
@@ -0,0 +1,23 @@
+SBS sbs-battery
+~~~~~~~~~~
+
+Required properties :
+ - compatible : "sbs,sbs-battery"
+
+Optional properties :
+ - sbs,i2c-retry-count : The number of times to retry i2c transactions on i2c
+   IO failure.
+ - sbs,poll-retry-count : The number of times to try looking for new status
+   after an external change notification.
+ - sbs,battery-detect-gpios : The gpio which signals battery detection and
+   a flag specifying its polarity.
+
+Example:
+
+       bq20z75@b {
+               compatible = "sbs,sbs-battery";
+               reg = < 0xb >;
+               sbs,i2c-retry-count = <2>;
+               sbs,poll-retry-count = <10>;
+               sbs,battery-detect-gpios = <&gpio-controller 122 1>;
+       }
diff --git a/Documentation/devicetree/bindings/sound/tegra-audio-wm8903.txt b/Documentation/devicetree/bindings/sound/tegra-audio-wm8903.txt
new file mode 100644 (file)
index 0000000..d5b0da8
--- /dev/null
@@ -0,0 +1,71 @@
+NVIDIA Tegra audio complex
+
+Required properties:
+- compatible : "nvidia,tegra-audio-wm8903"
+- nvidia,model : The user-visible name of this sound complex.
+- nvidia,audio-routing : A list of the connections between audio components.
+  Each entry is a pair of strings, the first being the connection's sink,
+  the second being the connection's source. Valid names for sources and
+  sinks are the WM8903's pins, and the jacks on the board:
+
+  WM8903 pins:
+
+  * IN1L
+  * IN1R
+  * IN2L
+  * IN2R
+  * IN3L
+  * IN3R
+  * DMICDAT
+  * HPOUTL
+  * HPOUTR
+  * LINEOUTL
+  * LINEOUTR
+  * LOP
+  * LON
+  * ROP
+  * RON
+  * MICBIAS
+
+  Board connectors:
+
+  * Headphone Jack
+  * Int Spk
+  * Mic Jack
+
+- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller
+- nvidia,audio-codec : The phandle of the WM8903 audio codec
+
+Optional properties:
+- nvidia,spkr-en-gpios : The GPIO that enables the speakers
+- nvidia,hp-mute-gpios : The GPIO that mutes the headphones
+- nvidia,hp-det-gpios : The GPIO that detect headphones are plugged in
+- nvidia,int-mic-en-gpios : The GPIO that enables the internal microphone
+- nvidia,ext-mic-en-gpios : The GPIO that enables the external microphone
+
+Example:
+
+sound {
+       compatible = "nvidia,tegra-audio-wm8903-harmony",
+                    "nvidia,tegra-audio-wm8903"
+       nvidia,model = "tegra-wm8903-harmony";
+
+       nvidia,audio-routing =
+               "Headphone Jack", "HPOUTR",
+               "Headphone Jack", "HPOUTL",
+               "Int Spk", "ROP",
+               "Int Spk", "RON",
+               "Int Spk", "LOP",
+               "Int Spk", "LON",
+               "Mic Jack", "MICBIAS",
+               "IN1L", "Mic Jack";
+
+       nvidia,i2s-controller = <&i2s1>;
+       nvidia,audio-codec = <&wm8903>;
+
+       nvidia,spkr-en-gpios = <&codec 2 0>;
+       nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
+       nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
+       nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
+};
+
diff --git a/Documentation/devicetree/bindings/sound/tegra20-das.txt b/Documentation/devicetree/bindings/sound/tegra20-das.txt
new file mode 100644 (file)
index 0000000..6de3a7e
--- /dev/null
@@ -0,0 +1,12 @@
+NVIDIA Tegra 20 DAS (Digital Audio Switch) controller
+
+Required properties:
+- compatible : "nvidia,tegra20-das"
+- reg : Should contain DAS registers location and length
+
+Example:
+
+das@70000c00 {
+       compatible = "nvidia,tegra20-das";
+       reg = <0x70000c00 0x80>;
+};
diff --git a/Documentation/devicetree/bindings/sound/tegra20-i2s.txt b/Documentation/devicetree/bindings/sound/tegra20-i2s.txt
new file mode 100644 (file)
index 0000000..0df2b5c
--- /dev/null
@@ -0,0 +1,17 @@
+NVIDIA Tegra 20 I2S controller
+
+Required properties:
+- compatible : "nvidia,tegra20-i2s"
+- reg : Should contain I2S registers location and length
+- interrupts : Should contain I2S interrupt
+- nvidia,dma-request-selector : The Tegra DMA controller's phandle and
+  request selector for this I2S controller
+
+Example:
+
+i2s@70002800 {
+       compatible = "nvidia,tegra20-i2s";
+       reg = <0x70002800 0x200>;
+       interrupts = < 45 >;
+       nvidia,dma-request-selector = < &apbdma 2 >;
+};
diff --git a/Documentation/devicetree/bindings/sound/wm8903.txt b/Documentation/devicetree/bindings/sound/wm8903.txt
new file mode 100644 (file)
index 0000000..f102cbc
--- /dev/null
@@ -0,0 +1,50 @@
+WM8903 audio CODEC
+
+This device supports I2C only.
+
+Required properties:
+
+  - compatible : "wlf,wm8903"
+
+  - reg : the I2C address of the device.
+
+  - gpio-controller : Indicates this device is a GPIO controller.
+
+  - #gpio-cells : Should be two. The first cell is the pin number and the
+    second cell is used to specify optional parameters (currently unused).
+
+Optional properties:
+
+  - interrupts : The interrupt line the codec is connected to.
+
+  - micdet-cfg : Default register value for R6 (Mic Bias). If absent, the
+    default is 0.
+
+  - micdet-delay : The debounce delay for microphone detection in mS. If
+    absent, the default is 100.
+
+  - gpio-cfg : A list of GPIO configuration register values. The list must
+    be 5 entries long. If absent, no configuration of these registers is
+    performed. If any entry has the value 0xffffffff, that GPIO's
+    configuration will not be modified.
+
+Example:
+
+codec: wm8903@1a {
+       compatible = "wlf,wm8903";
+       reg = <0x1a>;
+       interrupts = < 347 >;
+
+       gpio-controller;
+       #gpio-cells = <2>;
+
+       micdet-cfg = <0>;
+       micdet-delay = <100>;
+       gpio-cfg = <
+               0x0600 /* DMIC_LR, output */
+               0x0680 /* DMIC_DAT, input */
+               0x0000 /* GPIO, output, low */
+               0x0200 /* Interrupt, output */
+               0x01a0 /* BCLK, input, active high */
+       >;
+};
diff --git a/Documentation/devicetree/bindings/sound/wm8994.txt b/Documentation/devicetree/bindings/sound/wm8994.txt
new file mode 100644 (file)
index 0000000..7a7eb1e
--- /dev/null
@@ -0,0 +1,18 @@
+WM1811/WM8994/WM8958 audio CODEC
+
+These devices support both I2C and SPI (configured with pin strapping
+on the board).
+
+Required properties:
+
+  - compatible : "wlf,wm1811", "wlf,wm8994", "wlf,wm8958"
+
+  - reg : the I2C address of the device for I2C, the chip select
+          number for SPI.
+
+Example:
+
+codec: wm8994@1a {
+       compatible = "wlf,wm8994";
+       reg = <0x1a>;
+};
index 1862696..ecc6a6c 100644 (file)
@@ -34,6 +34,7 @@ powervr       Imagination Technologies
 qcom   Qualcomm, Inc.
 ramtron        Ramtron International
 samsung        Samsung Semiconductor
+sbs    Smart Battery System
 schindler      Schindler
 sil    Silicon Image
 simtek
@@ -41,4 +42,5 @@ sirf  SiRF Technology, Inc.
 st     STMicroelectronics
 stericsson     ST-Ericsson
 ti     Texas Instruments
+wlf    Wolfson Microelectronics
 xlnx   Xilinx
diff --git a/Documentation/digsig.txt b/Documentation/digsig.txt
new file mode 100644 (file)
index 0000000..3f68288
--- /dev/null
@@ -0,0 +1,96 @@
+Digital Signature Verification API
+
+CONTENTS
+
+1. Introduction
+2. API
+3. User-space utilities
+
+
+1. Introduction
+
+Digital signature verification API provides a method to verify digital signature.
+Currently digital signatures are used by the IMA/EVM integrity protection subsystem.
+
+Digital signature verification is implemented using cut-down kernel port of
+GnuPG multi-precision integers (MPI) library. The kernel port provides
+memory allocation errors handling, has been refactored according to kernel
+coding style, and checkpatch.pl reported errors and warnings have been fixed.
+
+Public key and signature consist of header and MPIs.
+
+struct pubkey_hdr {
+       uint8_t         version;        /* key format version */
+       time_t          timestamp;      /* key made, always 0 for now */
+       uint8_t         algo;
+       uint8_t         nmpi;
+       char            mpi[0];
+} __packed;
+
+struct signature_hdr {
+       uint8_t         version;        /* signature format version */
+       time_t          timestamp;      /* signature made */
+       uint8_t         algo;
+       uint8_t         hash;
+       uint8_t         keyid[8];
+       uint8_t         nmpi;
+       char            mpi[0];
+} __packed;
+
+keyid equals to SHA1[12-19] over the total key content.
+Signature header is used as an input to generate a signature.
+Such approach insures that key or signature header could not be changed.
+It protects timestamp from been changed and can be used for rollback
+protection.
+
+2. API
+
+API currently includes only 1 function:
+
+       digsig_verify() - digital signature verification with public key
+
+
+/**
+ * digsig_verify() - digital signature verification with public key
+ * @keyring:   keyring to search key in
+ * @sig:       digital signature
+ * @sigen:     length of the signature
+ * @data:      data
+ * @datalen:   length of the data
+ * @return:    0 on success, -EINVAL otherwise
+ *
+ * Verifies data integrity against digital signature.
+ * Currently only RSA is supported.
+ * Normally hash of the content is used as a data for this function.
+ *
+ */
+int digsig_verify(struct key *keyring, const char *sig, int siglen,
+                                               const char *data, int datalen);
+
+3. User-space utilities
+
+The signing and key management utilities evm-utils provide functionality
+to generate signatures, to load keys into the kernel keyring.
+Keys can be in PEM or converted to the kernel format.
+When the key is added to the kernel keyring, the keyid defines the name
+of the key: 5D2B05FC633EE3E8 in the example bellow.
+
+Here is example output of the keyctl utility.
+
+$ keyctl show
+Session Keyring
+       -3 --alswrv      0     0  keyring: _ses
+603976250 --alswrv      0    -1   \_ keyring: _uid.0
+817777377 --alswrv      0     0       \_ user: kmk
+891974900 --alswrv      0     0       \_ encrypted: evm-key
+170323636 --alswrv      0     0       \_ keyring: _module
+548221616 --alswrv      0     0       \_ keyring: _ima
+128198054 --alswrv      0     0       \_ keyring: _evm
+
+$ keyctl list 128198054
+1 key in keyring:
+620789745: --alswrv     0     0 user: 5D2B05FC633EE3E8
+
+
+Dmitry Kasatkin
+06.10.2011
index 5575759..d49c2ec 100644 (file)
@@ -544,3 +544,15 @@ When:      3.5
 Why:   The iwlagn module has been renamed iwlwifi.  The alias will be around
        for backward compatibility for several cycles and then dropped.
 Who:   Don Fry <donald.h.fry@intel.com>
+
+----------------------------
+
+What:  pci_scan_bus_parented()
+When:  3.5
+Why:   The pci_scan_bus_parented() interface creates a new root bus.  The
+       bus is created with default resources (ioport_resource and
+       iomem_resource) that are always wrong, so we rely on arch code to
+       correct them later.  Callers of pci_scan_bus_parented() should
+       convert to using pci_scan_root_bus() so they can supply a list of
+       bus resources when the bus is created.
+Who:   Bjorn Helgaas <bhelgaas@google.com>
index c92b153..eb93fd0 100644 (file)
@@ -1824,6 +1824,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
        nomfgpt         [X86-32] Disable Multi-Function General Purpose
                        Timer usage (for AMD Geode machines).
 
+       nonmi_ipi       [X86] Disable using NMI IPIs during panic/reboot to
+                       shutdown the other cpus.  Instead use the REBOOT_VECTOR
+                       irq.
+
        nopat           [X86] Disable PAT (page attribute table extension of
                        pagetables) support.
 
@@ -2395,6 +2399,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
 
        slram=          [HW,MTD]
 
+       slab_max_order= [MM, SLAB]
+                       Determines the maximum allowed order for slabs.
+                       A high setting may cause OOMs due to memory
+                       fragmentation.  Defaults to 1 for systems with
+                       more than 32MB of RAM, 0 otherwise.
+
        slub_debug[=options[,slabs]]    [MM, SLUB]
                        Enabling slub_debug allows one to determine the
                        culprit if slab objects become corrupted. Enabling
diff --git a/Documentation/power/charger-manager.txt b/Documentation/power/charger-manager.txt
new file mode 100644 (file)
index 0000000..fdcca99
--- /dev/null
@@ -0,0 +1,163 @@
+Charger Manager
+       (C) 2011 MyungJoo Ham <myungjoo.ham@samsung.com>, GPL
+
+Charger Manager provides in-kernel battery charger management that
+requires temperature monitoring during suspend-to-RAM state
+and where each battery may have multiple chargers attached and the userland
+wants to look at the aggregated information of the multiple chargers.
+
+Charger Manager is a platform_driver with power-supply-class entries.
+An instance of Charger Manager (a platform-device created with Charger-Manager)
+represents an independent battery with chargers. If there are multiple
+batteries with their own chargers acting independently in a system,
+the system may need multiple instances of Charger Manager.
+
+1. Introduction
+===============
+
+Charger Manager supports the following:
+
+* Support for multiple chargers (e.g., a device with USB, AC, and solar panels)
+       A system may have multiple chargers (or power sources) and some of
+       they may be activated at the same time. Each charger may have its
+       own power-supply-class and each power-supply-class can provide
+       different information about the battery status. This framework
+       aggregates charger-related information from multiple sources and
+       shows combined information as a single power-supply-class.
+
+* Support for in suspend-to-RAM polling (with suspend_again callback)
+       While the battery is being charged and the system is in suspend-to-RAM,
+       we may need to monitor the battery health by looking at the ambient or
+       battery temperature. We can accomplish this by waking up the system
+       periodically. However, such a method wakes up devices unncessary for
+       monitoring the battery health and tasks, and user processes that are
+       supposed to be kept suspended. That, in turn, incurs unnecessary power
+       consumption and slow down charging process. Or even, such peak power
+       consumption can stop chargers in the middle of charging
+       (external power input < device power consumption), which not
+       only affects the charging time, but the lifespan of the battery.
+
+       Charger Manager provides a function "cm_suspend_again" that can be
+       used as suspend_again callback of platform_suspend_ops. If the platform
+       requires tasks other than cm_suspend_again, it may implement its own
+       suspend_again callback that calls cm_suspend_again in the middle.
+       Normally, the platform will need to resume and suspend some devices
+       that are used by Charger Manager.
+
+2. Global Charger-Manager Data related with suspend_again
+========================================================
+In order to setup Charger Manager with suspend-again feature
+(in-suspend monitoring), the user should provide charger_global_desc
+with setup_charger_manager(struct charger_global_desc *).
+This charger_global_desc data for in-suspend monitoring is global
+as the name suggests. Thus, the user needs to provide only once even
+if there are multiple batteries. If there are multiple batteries, the
+multiple instances of Charger Manager share the same charger_global_desc
+and it will manage in-suspend monitoring for all instances of Charger Manager.
+
+The user needs to provide all the two entries properly in order to activate
+in-suspend monitoring:
+
+struct charger_global_desc {
+
+char *rtc_name;
+       : The name of rtc (e.g., "rtc0") used to wakeup the system from
+       suspend for Charger Manager. The alarm interrupt (AIE) of the rtc
+       should be able to wake up the system from suspend. Charger Manager
+       saves and restores the alarm value and use the previously-defined
+       alarm if it is going to go off earlier than Charger Manager so that
+       Charger Manager does not interfere with previously-defined alarms.
+
+bool (*rtc_only_wakeup)(void);
+       : This callback should let CM know whether
+       the wakeup-from-suspend is caused only by the alarm of "rtc" in the
+       same struct. If there is any other wakeup source triggered the
+       wakeup, it should return false. If the "rtc" is the only wakeup
+       reason, it should return true.
+};
+
+3. How to setup suspend_again
+=============================
+Charger Manager provides a function "extern bool cm_suspend_again(void)".
+When cm_suspend_again is called, it monitors every battery. The suspend_ops
+callback of the system's platform_suspend_ops can call cm_suspend_again
+function to know whether Charger Manager wants to suspend again or not.
+If there are no other devices or tasks that want to use suspend_again
+feature, the platform_suspend_ops may directly refer to cm_suspend_again
+for its suspend_again callback.
+
+The cm_suspend_again() returns true (meaning "I want to suspend again")
+if the system was woken up by Charger Manager and the polling
+(in-suspend monitoring) results in "normal".
+
+4. Charger-Manager Data (struct charger_desc)
+=============================================
+For each battery charged independently from other batteries (if a series of
+batteries are charged by a single charger, they are counted as one independent
+battery), an instance of Charger Manager is attached to it.
+
+struct charger_desc {
+
+char *psy_name;
+       : The power-supply-class name of the battery. Default is
+       "battery" if psy_name is NULL. Users can access the psy entries
+       at "/sys/class/power_supply/[psy_name]/".
+
+enum polling_modes polling_mode;
+       : CM_POLL_DISABLE: do not poll this battery.
+         CM_POLL_ALWAYS: always poll this battery.
+         CM_POLL_EXTERNAL_POWER_ONLY: poll this battery if and only if
+                                      an external power source is attached.
+         CM_POLL_CHARGING_ONLY: poll this battery if and only if the
+                                battery is being charged.
+
+unsigned int fullbatt_uV;
+       : If specified with a non-zero value, Charger Manager assumes
+       that the battery is full (capacity = 100) if the battery is not being
+       charged and the battery voltage is equal to or greater than
+       fullbatt_uV.
+
+unsigned int polling_interval_ms;
+       : Required polling interval in ms. Charger Manager will poll
+       this battery every polling_interval_ms or more frequently.
+
+enum data_source battery_present;
+       CM_FUEL_GAUGE: get battery presence information from fuel gauge.
+       CM_CHARGER_STAT: get battery presence from chargers.
+
+char **psy_charger_stat;
+       : An array ending with NULL that has power-supply-class names of
+       chargers. Each power-supply-class should provide "PRESENT" (if
+       battery_present is "CM_CHARGER_STAT"), "ONLINE" (shows whether an
+       external power source is attached or not), and "STATUS" (shows whether
+       the battery is {"FULL" or not FULL} or {"FULL", "Charging",
+       "Discharging", "NotCharging"}).
+
+int num_charger_regulators;
+struct regulator_bulk_data *charger_regulators;
+       : Regulators representing the chargers in the form for
+       regulator framework's bulk functions.
+
+char *psy_fuel_gauge;
+       : Power-supply-class name of the fuel gauge.
+
+int (*temperature_out_of_range)(int *mC);
+bool measure_battery_temp;
+       : This callback returns 0 if the temperature is safe for charging,
+       a positive number if it is too hot to charge, and a negative number
+       if it is too cold to charge. With the variable mC, the callback returns
+       the temperature in 1/1000 of centigrade.
+       The source of temperature can be battery or ambient one according to
+       the value of measure_battery_temp.
+};
+
+5. Other Considerations
+=======================
+
+At the charger/battery-related events such as battery-pulled-out,
+charger-pulled-out, charger-inserted, DCIN-over/under-voltage, charger-stopped,
+and others critical to chargers, the system should be configured to wake up.
+At least the following should wake up the system from a suspend:
+a) charger-on/off b) external-power-in/out c) battery-in/out (while charging)
+
+It is usually accomplished by configuring the PMIC as a wakeup source.
index 19bc494..99b85d3 100644 (file)
@@ -1,5 +1,7 @@
 00-INDEX
        - this file.
+LSM.txt
+       - description of the Linux Security Module framework.
 SELinux.txt
        - how to get started with the SELinux security enhancement.
 Smack.txt
diff --git a/Documentation/security/LSM.txt b/Documentation/security/LSM.txt
new file mode 100644 (file)
index 0000000..c335a76
--- /dev/null
@@ -0,0 +1,34 @@
+Linux Security Module framework
+-------------------------------
+
+The Linux Security Module (LSM) framework provides a mechanism for
+various security checks to be hooked by new kernel extensions. The name
+"module" is a bit of a misnomer since these extensions are not actually
+loadable kernel modules. Instead, they are selectable at build-time via
+CONFIG_DEFAULT_SECURITY and can be overridden at boot-time via the
+"security=..." kernel command line argument, in the case where multiple
+LSMs were built into a given kernel.
+
+The primary users of the LSM interface are Mandatory Access Control
+(MAC) extensions which provide a comprehensive security policy. Examples
+include SELinux, Smack, Tomoyo, and AppArmor. In addition to the larger
+MAC extensions, other extensions can be built using the LSM to provide
+specific changes to system operation when these tweaks are not available
+in the core functionality of Linux itself.
+
+Without a specific LSM built into the kernel, the default LSM will be the
+Linux capabilities system. Most LSMs choose to extend the capabilities
+system, building their checks on top of the defined capability hooks.
+For more details on capabilities, see capabilities(7) in the Linux
+man-pages project.
+
+Based on http://kerneltrap.org/Linux/Documenting_Security_Module_Intent,
+a new LSM is accepted into the kernel when its intent (a description of
+what it tries to protect against and in what cases one would expect to
+use it) has been appropriately documented in Documentation/security/.
+This allows an LSM's code to be easily compared to its goals, and so
+that end users and distros can make a more informed decision about which
+LSMs suit their requirements.
+
+For extensive documentation on the available LSM hook interfaces, please
+see include/linux/security.h.
index fc0366c..8625705 100644 (file)
@@ -221,10 +221,10 @@ The Linux kernel supports the following types of credentials:
  (5) LSM
 
      The Linux Security Module allows extra controls to be placed over the
-     operations that a task may do.  Currently Linux supports two main
-     alternate LSM options: SELinux and Smack.
+     operations that a task may do.  Currently Linux supports several LSM
+     options.
 
-     Both work by labelling the objects in a system and then applying sets of
+     Some work by labelling the objects in a system and then applying sets of
      rules (policies) that say what operations a task with one label may do to
      an object with another label.
 
index edad99a..c8c5454 100644 (file)
@@ -42,19 +42,7 @@ ALC260
 
 ALC262
 ======
-  fujitsu      Fujitsu Laptop
-  benq         Benq ED8
-  benq-t31     Benq T31
-  hippo                Hippo (ATI) with jack detection, Sony UX-90s
-  hippo_1      Hippo (Benq) with jack detection
-  toshiba-s06  Toshiba S06
-  toshiba-rx1  Toshiba RX1
-  tyan         Tyan Thunder n6650W (S2915-E)
-  ultra                Samsung Q1 Ultra Vista model
-  lenovo-3000  Lenovo 3000 y410
-  nec          NEC Versa S9100
-  basic                fixed pin assignment w/o SPDIF
-  auto         auto-config reading BIOS (default)
+  N/A
 
 ALC267/268
 ==========
@@ -350,7 +338,6 @@ STAC92HD83*
   mic-ref      Reference board with power management for ports
   dell-s14     Dell laptop
   dell-vostro-3500     Dell Vostro 3500 laptop
-  hp           HP laptops with (inverted) mute-LED
   hp-dv7-4000  HP dv-7 4000
   auto         BIOS setup (default)
 
diff --git a/Documentation/sound/alsa/compress_offload.txt b/Documentation/sound/alsa/compress_offload.txt
new file mode 100644 (file)
index 0000000..c83a835
--- /dev/null
@@ -0,0 +1,188 @@
+               compress_offload.txt
+               =====================
+       Pierre-Louis.Bossart <pierre-louis.bossart@linux.intel.com>
+               Vinod Koul <vinod.koul@linux.intel.com>
+
+Overview
+
+Since its early days, the ALSA API was defined with PCM support or
+constant bitrates payloads such as IEC61937 in mind. Arguments and
+returned values in frames are the norm, making it a challenge to
+extend the existing API to compressed data streams.
+
+In recent years, audio digital signal processors (DSP) were integrated
+in system-on-chip designs, and DSPs are also integrated in audio
+codecs. Processing compressed data on such DSPs results in a dramatic
+reduction of power consumption compared to host-based
+processing. Support for such hardware has not been very good in Linux,
+mostly because of a lack of a generic API available in the mainline
+kernel.
+
+Rather than requiring a compability break with an API change of the
+ALSA PCM interface, a new 'Compressed Data' API is introduced to
+provide a control and data-streaming interface for audio DSPs.
+
+The design of this API was inspired by the 2-year experience with the
+Intel Moorestown SOC, with many corrections required to upstream the
+API in the mainline kernel instead of the staging tree and make it
+usable by others.
+
+Requirements
+
+The main requirements are:
+
+- separation between byte counts and time. Compressed formats may have
+  a header per file, per frame, or no header at all. The payload size
+  may vary from frame-to-frame. As a result, it is not possible to
+  estimate reliably the duration of audio buffers when handling
+  compressed data. Dedicated mechanisms are required to allow for
+  reliable audio-video synchronization, which requires precise
+  reporting of the number of samples rendered at any given time.
+
+- Handling of multiple formats. PCM data only requires a specification
+  of the sampling rate, number of channels and bits per sample. In
+  contrast, compressed data comes in a variety of formats. Audio DSPs
+  may also provide support for a limited number of audio encoders and
+  decoders embedded in firmware, or may support more choices through
+  dynamic download of libraries.
+
+- Focus on main formats. This API provides support for the most
+  popular formats used for audio and video capture and playback. It is
+  likely that as audio compression technology advances, new formats
+  will be added.
+
+- Handling of multiple configurations. Even for a given format like
+  AAC, some implementations may support AAC multichannel but HE-AAC
+  stereo. Likewise WMA10 level M3 may require too much memory and cpu
+  cycles. The new API needs to provide a generic way of listing these
+  formats.
+
+- Rendering/Grabbing only. This API does not provide any means of
+  hardware acceleration, where PCM samples are provided back to
+  user-space for additional processing. This API focuses instead on
+  streaming compressed data to a DSP, with the assumption that the
+  decoded samples are routed to a physical output or logical back-end.
+
+ - Complexity hiding. Existing user-space multimedia frameworks all
+  have existing enums/structures for each compressed format. This new
+  API assumes the existence of a platform-specific compatibility layer
+  to expose, translate and make use of the capabilities of the audio
+  DSP, eg. Android HAL or PulseAudio sinks. By construction, regular
+  applications are not supposed to make use of this API.
+
+
+Design
+
+The new API shares a number of concepts with with the PCM API for flow
+control. Start, pause, resume, drain and stop commands have the same
+semantics no matter what the content is.
+
+The concept of memory ring buffer divided in a set of fragments is
+borrowed from the ALSA PCM API. However, only sizes in bytes can be
+specified.
+
+Seeks/trick modes are assumed to be handled by the host.
+
+The notion of rewinds/forwards is not supported. Data committed to the
+ring buffer cannot be invalidated, except when dropping all buffers.
+
+The Compressed Data API does not make any assumptions on how the data
+is transmitted to the audio DSP. DMA transfers from main memory to an
+embedded audio cluster or to a SPI interface for external DSPs are
+possible. As in the ALSA PCM case, a core set of routines is exposed;
+each driver implementer will have to write support for a set of
+mandatory routines and possibly make use of optional ones.
+
+The main additions are
+
+- get_caps
+This routine returns the list of audio formats supported. Querying the
+codecs on a capture stream will return encoders, decoders will be
+listed for playback streams.
+
+- get_codec_caps For each codec, this routine returns a list of
+capabilities. The intent is to make sure all the capabilities
+correspond to valid settings, and to minimize the risks of
+configuration failures. For example, for a complex codec such as AAC,
+the number of channels supported may depend on a specific profile. If
+the capabilities were exposed with a single descriptor, it may happen
+that a specific combination of profiles/channels/formats may not be
+supported. Likewise, embedded DSPs have limited memory and cpu cycles,
+it is likely that some implementations make the list of capabilities
+dynamic and dependent on existing workloads. In addition to codec
+settings, this routine returns the minimum buffer size handled by the
+implementation. This information can be a function of the DMA buffer
+sizes, the number of bytes required to synchronize, etc, and can be
+used by userspace to define how much needs to be written in the ring
+buffer before playback can start.
+
+- set_params
+This routine sets the configuration chosen for a specific codec. The
+most important field in the parameters is the codec type; in most
+cases decoders will ignore other fields, while encoders will strictly
+comply to the settings
+
+- get_params
+This routines returns the actual settings used by the DSP. Changes to
+the settings should remain the exception.
+
+- get_timestamp
+The timestamp becomes a multiple field structure. It lists the number
+of bytes transferred, the number of samples processed and the number
+of samples rendered/grabbed. All these values can be used to determine
+the avarage bitrate, figure out if the ring buffer needs to be
+refilled or the delay due to decoding/encoding/io on the DSP.
+
+Note that the list of codecs/profiles/modes was derived from the
+OpenMAX AL specification instead of reinventing the wheel.
+Modifications include:
+- Addition of FLAC and IEC formats
+- Merge of encoder/decoder capabilities
+- Profiles/modes listed as bitmasks to make descriptors more compact
+- Addition of set_params for decoders (missing in OpenMAX AL)
+- Addition of AMR/AMR-WB encoding modes (missing in OpenMAX AL)
+- Addition of format information for WMA
+- Addition of encoding options when required (derived from OpenMAX IL)
+- Addition of rateControlSupported (missing in OpenMAX AL)
+
+Not supported:
+
+- Support for VoIP/circuit-switched calls is not the target of this
+  API. Support for dynamic bit-rate changes would require a tight
+  coupling between the DSP and the host stack, limiting power savings.
+
+- Packet-loss concealment is not supported. This would require an
+  additional interface to let the decoder synthesize data when frames
+  are lost during transmission. This may be added in the future.
+
+- Volume control/routing is not handled by this API. Devices exposing a
+  compressed data interface will be considered as regular ALSA devices;
+  volume changes and routing information will be provided with regular
+  ALSA kcontrols.
+
+- Embedded audio effects. Such effects should be enabled in the same
+  manner, no matter if the input was PCM or compressed.
+
+- multichannel IEC encoding. Unclear if this is required.
+
+- Encoding/decoding acceleration is not supported as mentioned
+  above. It is possible to route the output of a decoder to a capture
+  stream, or even implement transcoding capabilities. This routing
+  would be enabled with ALSA kcontrols.
+
+- Audio policy/resource management. This API does not provide any
+  hooks to query the utilization of the audio DSP, nor any premption
+  mechanisms.
+
+- No notion of underun/overrun. Since the bytes written are compressed
+  in nature and data written/read doesn't translate directly to
+  rendered output in time, this does not deal with underrun/overun and
+  maybe dealt in user-library
+
+Credits:
+- Mark Brown and Liam Girdwood for discussions on the need for this API
+- Harsha Priya for her work on intel_sst compressed API
+- Rakesh Ughreja for valuable feedback
+- Sing Nallasellan, Sikkandar Madar and Prasanna Samaga for
+  demonstrating and quantifying the benefits of audio offload on a
+  real platform.
index 1f24636..6d8cd8b 100644 (file)
@@ -49,6 +49,7 @@ show up in /proc/sys/kernel:
 - panic
 - panic_on_oops
 - panic_on_unrecovered_nmi
+- panic_on_stackoverflow
 - pid_max
 - powersave-nap               [ PPC only ]
 - printk
@@ -393,6 +394,19 @@ Controls the kernel's behaviour when an oops or BUG is encountered.
 
 ==============================================================
 
+panic_on_stackoverflow:
+
+Controls the kernel's behavior when detecting the overflows of
+kernel, IRQ and exception stacks except a user stack.
+This file shows up if CONFIG_DEBUG_STACKOVERFLOW is enabled.
+
+0: try to continue operation.
+
+1: panic immediately.
+
+==============================================================
+
+
 pid_max:
 
 PID allocation wrap value.  When the kernel's next PID value
index f464f47..2acdda9 100644 (file)
@@ -117,7 +117,7 @@ can be influenced by kernel parameters:
 
 slub_min_objects=x             (default 4)
 slub_min_order=x               (default 0)
-slub_max_order=x               (default 1)
+slub_max_order=x               (default 3 (PAGE_ALLOC_COSTLY_ORDER))
 
 slub_min_objects allows to specify how many objects must at least fit
 into one slab in order for the allocation order to be acceptable.
index 311b0c4..1094edf 100644 (file)
@@ -537,6 +537,7 @@ F:  sound/soc/codecs/adau*
 F:     sound/soc/codecs/adav*
 F:     sound/soc/codecs/ad1*
 F:     sound/soc/codecs/ssm*
+F:     sound/soc/codecs/sigmadsp.*
 
 ANALOG DEVICES INC ASOC DRIVERS
 L:     uclinux-dist-devel@blackfin.uclinux.org
index f3cae27..8c723c1 100644 (file)
@@ -281,27 +281,9 @@ pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus)
 void __devinit
 pcibios_fixup_bus(struct pci_bus *bus)
 {
-       /* Propagate hose info into the subordinate devices.  */
-
-       struct pci_controller *hose = bus->sysdata;
        struct pci_dev *dev = bus->self;
 
-       if (!dev) {
-               /* Root bus. */
-               u32 pci_mem_end;
-               u32 sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0;
-               unsigned long end;
-
-               bus->resource[0] = hose->io_space;
-               bus->resource[1] = hose->mem_space;
-
-               /* Adjust hose mem_space limit to prevent PCI allocations
-                  in the iommu windows. */
-               pci_mem_end = min((u32)__direct_map_base, sg_base) - 1;
-               end = hose->mem_space->start + pci_mem_end;
-               if (hose->mem_space->end > end)
-                       hose->mem_space->end = end;
-       } else if (pci_probe_only &&
+       if (pci_probe_only && dev &&
                   (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
                pci_read_bridge_bases(bus);
                pcibios_fixup_device_resources(dev, bus);
@@ -414,13 +396,31 @@ void __init
 common_init_pci(void)
 {
        struct pci_controller *hose;
+       struct list_head resources;
        struct pci_bus *bus;
        int next_busno;
        int need_domain_info = 0;
+       u32 pci_mem_end;
+       u32 sg_base;
+       unsigned long end;
 
        /* Scan all of the recorded PCI controllers.  */
        for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
-               bus = pci_scan_bus(next_busno, alpha_mv.pci_ops, hose);
+               sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0;
+
+               /* Adjust hose mem_space limit to prevent PCI allocations
+                  in the iommu windows. */
+               pci_mem_end = min((u32)__direct_map_base, sg_base) - 1;
+               end = hose->mem_space->start + pci_mem_end;
+               if (hose->mem_space->end > end)
+                       hose->mem_space->end = end;
+
+               INIT_LIST_HEAD(&resources);
+               pci_add_resource(&resources, hose->io_space);
+               pci_add_resource(&resources, hose->mem_space);
+
+               bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops,
+                                       hose, &resources);
                hose->bus = bus;
                hose->need_domain_info = need_domain_info;
                next_busno = bus->subordinate + 1;
index b539ec8..d1bcd7b 100644 (file)
@@ -299,8 +299,8 @@ int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
                goto err1;
        }
 
-       sys->resource[0] = &it8152_io;
-       sys->resource[1] = &it8152_mem;
+       pci_add_resource(&sys->resources, &it8152_io);
+       pci_add_resource(&sys->resources, &it8152_mem);
 
        if (platform_notify || platform_notify_remove) {
                printk(KERN_ERR "PCI: Can't use platform_notify\n");
@@ -327,6 +327,9 @@ err0:
  */
 unsigned int pcibios_max_latency = 255;
 
+/* ITE bridge requires setting latency timer to avoid early bus access
+   termination by PCI bus master devices
+*/
 void pcibios_set_master(struct pci_dev *dev)
 {
        u8 lat;
@@ -352,7 +355,7 @@ void pcibios_set_master(struct pci_dev *dev)
 
 struct pci_bus * __init it8152_pci_scan_bus(int nr, struct pci_sys_data *sys)
 {
-       return pci_scan_bus(nr, &it8152_ops, sys);
+       return pci_scan_root_bus(NULL, nr, &it8152_ops, sys, &sys->resources);
 }
 
 EXPORT_SYMBOL(dma_set_coherent_mask);
index 8421d39..67dd2af 100644 (file)
@@ -86,7 +86,8 @@ int __init via82c505_setup(int nr, struct pci_sys_data *sys)
 struct pci_bus * __init via82c505_scan_bus(int nr, struct pci_sys_data *sysdata)
 {
        if (nr == 0)
-               return pci_scan_bus(0, &via82c505_ops, sysdata);
+               return pci_scan_root_bus(NULL, 0, &via82c505_ops, sysdata,
+                                        &sysdata->resources);
 
        return NULL;
 }
diff --git a/arch/arm/configs/bonito_defconfig b/arch/arm/configs/bonito_defconfig
new file mode 100644 (file)
index 0000000..5457108
--- /dev/null
@@ -0,0 +1,72 @@
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_R8A7740=y
+CONFIG_MACH_BONITO=y
+# CONFIG_SH_TIMER_TMU is not set
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_FORCE_MAX_ZONEORDER=12
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttySC5,115200 earlyprintk=sh-sci.5,115200 ignore_loglevel"
+CONFIG_KEXEC=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_SUSPEND is not set
+CONFIG_PM_RUNTIME=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_MTD=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_ARM_INTEGRATOR=y
+CONFIG_MTD_BLOCK2MTD=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=9
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_SH_MOBILE=y
+CONFIG_GPIO_SYSFS=y
+# CONFIG_HWMON is not set
+# CONFIG_MFD_SUPPORT is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_UIO=y
+CONFIG_UIO_PDRV=y
+CONFIG_UIO_PDRV_GENIRQ=y
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+CONFIG_TMPFS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+# CONFIG_ARM_UNWIND is not set
diff --git a/arch/arm/configs/kota2_defconfig b/arch/arm/configs/kota2_defconfig
new file mode 100644 (file)
index 0000000..b7735d6
--- /dev/null
@@ -0,0 +1,122 @@
+# CONFIG_ARM_PATCH_PHYS_VIRT is not set
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_CGROUPS=y
+CONFIG_CPUSETS=y
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_EMBEDDED=y
+CONFIG_SLAB=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_SHMOBILE=y
+CONFIG_KEYBOARD_GPIO_POLLED=y
+CONFIG_ARCH_SH73A0=y
+CONFIG_MACH_KOTA2=y
+CONFIG_MEMORY_SIZE=0x1e0000000
+# CONFIG_SH_TIMER_TMU is not set
+# CONFIG_SWP_EMULATE is not set
+CONFIG_CPU_BPREDICT_DISABLE=y
+CONFIG_ARM_ERRATA_460075=y
+CONFIG_ARM_ERRATA_742230=y
+CONFIG_ARM_ERRATA_742231=y
+CONFIG_PL310_ERRATA_588369=y
+CONFIG_ARM_ERRATA_720789=y
+CONFIG_PL310_ERRATA_727915=y
+CONFIG_ARM_ERRATA_743622=y
+CONFIG_ARM_ERRATA_751472=y
+CONFIG_PL310_ERRATA_753970=y
+CONFIG_ARM_ERRATA_754322=y
+CONFIG_PL310_ERRATA_769419=y
+CONFIG_NO_HZ=y
+CONFIG_SMP=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_HIGHMEM=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel"
+CONFIG_CMDLINE_FORCE=y
+CONFIG_KEXEC=y
+CONFIG_CPU_IDLE=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_PM_RUNTIME=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+CONFIG_CFG80211=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_MAC80211=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_BLK_DEV is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CHELSIO is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+CONFIG_SMSC911X=y
+# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_B43=y
+CONFIG_B43_PHY_N=y
+CONFIG_B43_DEBUG=y
+CONFIG_INPUT_SPARSEKMAP=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_SH_KEYSC=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=9
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C_SH_MOBILE=y
+# CONFIG_HWMON is not set
+CONFIG_BCMA=y
+CONFIG_BCMA_DEBUG=y
+CONFIG_FB=y
+CONFIG_FB_SH_MOBILE_LCDC=y
+CONFIG_LCD_PLATFORM=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+CONFIG_MMC_SDHI=y
+CONFIG_MMC_SH_MMCIF=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_RENESAS_TPU=y
+CONFIG_LEDS_TRIGGERS=y
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+CONFIG_TMPFS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_INFO_REDUCED=y
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
new file mode 100644 (file)
index 0000000..864f9a5
--- /dev/null
@@ -0,0 +1,87 @@
+# CONFIG_ARM_PATCH_PHYS_VIRT is not set
+CONFIG_EXPERIMENTAL=y
+CONFIG_KERNEL_LZMA=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_EMBEDDED=y
+CONFIG_SLAB=y
+# CONFIG_BLOCK is not set
+CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_R8A7779=y
+CONFIG_MACH_MARZEN=y
+CONFIG_MEMORY_START=0x60000000
+CONFIG_MEMORY_SIZE=0x10000000
+CONFIG_SHMOBILE_TIMER_HZ=1024
+# CONFIG_SH_TIMER_CMT is not set
+# CONFIG_SWP_EMULATE is not set
+CONFIG_ARM_ERRATA_430973=y
+CONFIG_ARM_ERRATA_458693=y
+CONFIG_ARM_ERRATA_460075=y
+CONFIG_ARM_ERRATA_743622=y
+CONFIG_ARM_ERRATA_754322=y
+CONFIG_NO_HZ=y
+CONFIG_SMP=y
+# CONFIG_ARM_CPU_TOPOLOGY is not set
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_HIGHMEM=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel"
+CONFIG_CMDLINE_FORCE=y
+CONFIG_KEXEC=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_PM_RUNTIME=y
+CONFIG_NET=y
+CONFIG_INET=y
+# CONFIG_IPV6 is not set
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+# CONFIG_FW_LOADER is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+CONFIG_SMC911X=y
+CONFIG_SMSC911X=y
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_WLAN is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=6
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_GPIO_SYSFS=y
+# CONFIG_HWMON is not set
+CONFIG_SSB=y
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_UIO=y
+CONFIG_UIO_PDRV_GENIRQ=y
+# CONFIG_IOMMU_SUPPORT is not set
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+CONFIG_TMPFS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_INFO_REDUCED=y
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_USER=y
+CONFIG_AVERAGE=y
index 186efd4..d943b7d 100644 (file)
@@ -40,7 +40,7 @@ struct pci_sys_data {
        u64             mem_offset;     /* bus->cpu memory mapping offset       */
        unsigned long   io_offset;      /* bus->cpu IO mapping offset           */
        struct pci_bus  *bus;           /* PCI bus                              */
-       struct resource *resource[3];   /* Primary PCI bus resources            */
+       struct list_head resources;     /* root bus resources (apertures)       */
                                        /* Bridge swizzling                     */
        u8              (*swizzle)(struct pci_dev *, u8 *);
                                        /* IRQ mapping                          */
index 2b1f245..da337ba 100644 (file)
@@ -31,18 +31,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
 }
 #endif /* CONFIG_PCI_DOMAINS */
 
-#ifdef CONFIG_PCI_HOST_ITE8152
-/* ITE bridge requires setting latency timer to avoid early bus access
-   termination by PIC bus mater devices
-*/
-extern void pcibios_set_master(struct pci_dev *dev);
-#else
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-       /* No special bus mastering setup handling */
-}
-#endif
-
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
        /* We don't do dynamic PCI IRQ allocation */
index b530e91..f58ba35 100644 (file)
@@ -316,21 +316,6 @@ pdev_fixup_device_resources(struct pci_sys_data *root, struct pci_dev *dev)
        }
 }
 
-static void __devinit
-pbus_assign_bus_resources(struct pci_bus *bus, struct pci_sys_data *root)
-{
-       struct pci_dev *dev = bus->self;
-       int i;
-
-       if (!dev) {
-               /*
-                * Assign root bus resources.
-                */
-               for (i = 0; i < 3; i++)
-                       bus->resource[i] = root->resource[i];
-       }
-}
-
 /*
  * pcibios_fixup_bus - Called after each bus is probed,
  * but before its children are examined.
@@ -341,8 +326,6 @@ void pcibios_fixup_bus(struct pci_bus *bus)
        struct pci_dev *dev;
        u16 features = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_FAST_BACK;
 
-       pbus_assign_bus_resources(bus, root);
-
        /*
         * Walk the devices on this bus, working out what we can
         * and can't support.
@@ -508,12 +491,18 @@ static void __init pcibios_init_hw(struct hw_pci *hw)
                sys->busnr   = busnr;
                sys->swizzle = hw->swizzle;
                sys->map_irq = hw->map_irq;
-               sys->resource[0] = &ioport_resource;
-               sys->resource[1] = &iomem_resource;
+               INIT_LIST_HEAD(&sys->resources);
 
                ret = hw->setup(nr, sys);
 
                if (ret > 0) {
+                       if (list_empty(&sys->resources)) {
+                               pci_add_resource(&sys->resources,
+                                                &ioport_resource);
+                               pci_add_resource(&sys->resources,
+                                                &iomem_resource);
+                       }
+
                        sys->bus = hw->scan(nr, sys);
 
                        if (!sys->bus)
@@ -571,6 +560,13 @@ void __init pci_common_init(struct hw_pci *hw)
        }
 }
 
+#ifndef CONFIG_PCI_HOST_ITE8152
+void pcibios_set_master(struct pci_dev *dev)
+{
+       /* No special bus mastering setup handling */
+}
+#endif
+
 char * __init pcibios_setup(char *str)
 {
        if (!strcmp(str, "debug")) {
index 0f8fca4..e159d69 100644 (file)
@@ -151,13 +151,12 @@ static int cns3xxx_pci_setup(int nr, struct pci_sys_data *sys)
        struct cns3xxx_pcie *cnspci = sysdata_to_cnspci(sys);
        struct resource *res_io = &cnspci->res_io;
        struct resource *res_mem = &cnspci->res_mem;
-       struct resource **sysres = sys->resource;
 
        BUG_ON(request_resource(&iomem_resource, res_io) ||
               request_resource(&iomem_resource, res_mem));
 
-       sysres[0] = res_io;
-       sysres[1] = res_mem;
+       pci_add_resource(&sys->resources, res_io);
+       pci_add_resource(&sys->resources, res_mem);
 
        return 1;
 }
@@ -169,7 +168,8 @@ static struct pci_ops cns3xxx_pcie_ops = {
 
 static struct pci_bus *cns3xxx_pci_scan_bus(int nr, struct pci_sys_data *sys)
 {
-       return pci_scan_bus(sys->busnr, &cns3xxx_pcie_ops, sys);
+       return pci_scan_root_bus(NULL, sys->busnr, &cns3xxx_pcie_ops, sys,
+                                &sys->resources);
 }
 
 static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
index 6c11a4d..52e96d3 100644 (file)
@@ -69,7 +69,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
        pp->res[0].flags = IORESOURCE_IO;
        if (request_resource(&ioport_resource, &pp->res[0]))
                panic("Request PCIe IO resource failed\n");
-       sys->resource[0] = &pp->res[0];
+       pci_add_resource(&sys->resources, &pp->res[0]);
 
        /*
         * IORESOURCE_MEM
@@ -88,9 +88,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
        pp->res[1].flags = IORESOURCE_MEM;
        if (request_resource(&iomem_resource, &pp->res[1]))
                panic("Request PCIe Memory resource failed\n");
-       sys->resource[1] = &pp->res[1];
-
-       sys->resource[2] = NULL;
+       pci_add_resource(&sys->resources, &pp->res[1]);
 
        return 1;
 }
@@ -184,7 +182,8 @@ dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
        struct pci_bus *bus;
 
        if (nr < num_pcie_ports) {
-               bus = pci_scan_bus(sys->busnr, &pcie_ops, sys);
+               bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
+                                       &sys->resources);
        } else {
                bus = NULL;
                BUG();
diff --git a/arch/arm/mach-exynos/include/mach/cpufreq.h b/arch/arm/mach-exynos/include/mach/cpufreq.h
new file mode 100644 (file)
index 0000000..3df27f2
--- /dev/null
@@ -0,0 +1,34 @@
+/* linux/arch/arm/mach-exynos/include/mach/cpufreq.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com
+ *
+ * EXYNOS - CPUFreq support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+enum cpufreq_level_index {
+       L0, L1, L2, L3, L4,
+       L5, L6, L7, L8, L9,
+       L10, L11, L12, L13, L14,
+       L15, L16, L17, L18, L19,
+       L20,
+};
+
+struct exynos_dvfs_info {
+       unsigned long   mpll_freq_khz;
+       unsigned int    pll_safe_idx;
+       unsigned int    pm_lock_idx;
+       unsigned int    max_support_idx;
+       unsigned int    min_support_idx;
+       struct clk      *cpu_clk;
+       unsigned int    *volt_table;
+       struct cpufreq_frequency_table  *freq_table;
+       void (*set_freq)(unsigned int, unsigned int);
+       bool (*need_apll_change)(unsigned int, unsigned int);
+};
+
+extern int exynos4210_cpufreq_init(struct exynos_dvfs_info *);
index 18c32a5..f685650 100644 (file)
@@ -275,9 +275,9 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
        allocate_resource(&iomem_resource, &res[0], 0x40000000,
                          0x80000000, 0xffffffff, 0x40000000, NULL, NULL);
 
-       sys->resource[0] = &ioport_resource;
-       sys->resource[1] = &res[0];
-       sys->resource[2] = &res[1];
+       pci_add_resource(&sys->resources, &ioport_resource);
+       pci_add_resource(&sys->resources, &res[0]);
+       pci_add_resource(&sys->resources, &res[1]);
        sys->mem_offset  = DC21285_PCI_MEM;
 
        return 1;
@@ -285,7 +285,7 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
 
 struct pci_bus * __init dc21285_scan_bus(int nr, struct pci_sys_data *sys)
 {
-       return pci_scan_bus(0, &dc21285_ops, sys);
+       return pci_scan_root_bus(NULL, 0, &dc21285_ops, sys, &sys->resources);
 }
 
 #define dc21285_request_irq(_a, _b, _c, _d, _e) \
index b4d8f8b..3c82566 100644 (file)
@@ -359,7 +359,7 @@ static struct resource pre_mem = {
        .flags  = IORESOURCE_MEM | IORESOURCE_PREFETCH,
 };
 
-static int __init pci_v3_setup_resources(struct resource **resource)
+static int __init pci_v3_setup_resources(struct pci_sys_data *sys)
 {
        if (request_resource(&iomem_resource, &non_mem)) {
                printk(KERN_ERR "PCI: unable to allocate non-prefetchable "
@@ -374,13 +374,13 @@ static int __init pci_v3_setup_resources(struct resource **resource)
        }
 
        /*
-        * bus->resource[0] is the IO resource for this bus
-        * bus->resource[1] is the mem resource for this bus
-        * bus->resource[2] is the prefetch mem resource for this bus
+        * the IO resource for this bus
+        * the mem resource for this bus
+        * the prefetch mem resource for this bus
         */
-       resource[0] = &ioport_resource;
-       resource[1] = &non_mem;
-       resource[2] = &pre_mem;
+       pci_add_resource(&sys->resources, &ioport_resource);
+       pci_add_resource(&sys->resources, &non_mem);
+       pci_add_resource(&sys->resources, &pre_mem);
 
        return 1;
 }
@@ -481,7 +481,7 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys)
 
        if (nr == 0) {
                sys->mem_offset = PHYS_PCI_MEM_BASE;
-               ret = pci_v3_setup_resources(sys->resource);
+               ret = pci_v3_setup_resources(sys);
        }
 
        return ret;
@@ -489,7 +489,8 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys)
 
 struct pci_bus * __init pci_v3_scan_bus(int nr, struct pci_sys_data *sys)
 {
-       return pci_scan_bus(sys->busnr, &pci_v3_ops, sys);
+       return pci_scan_root_bus(NULL, sys->busnr, &pci_v3_ops, sys,
+                                &sys->resources);
 }
 
 /*
index db012fa..b8f5a87 100644 (file)
@@ -537,14 +537,14 @@ struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
                        while(time_before(jiffies, atux_trhfa_timeout))
                                udelay(100);
 
-               bus = pci_bus_atux = pci_scan_bus(sys->busnr,
-                                                 &iop13xx_atux_ops,
-                                                 sys);
+               bus = pci_bus_atux = pci_scan_root_bus(NULL, sys->busnr,
+                                                      &iop13xx_atux_ops,
+                                                      sys, &sys->resources);
                break;
        case IOP13XX_INIT_ATU_ATUE:
-               bus = pci_bus_atue = pci_scan_bus(sys->busnr,
-                                                 &iop13xx_atue_ops,
-                                                 sys);
+               bus = pci_bus_atue = pci_scan_root_bus(NULL, sys->busnr,
+                                                      &iop13xx_atue_ops,
+                                                      sys, &sys->resources);
                break;
        }
 
@@ -1084,9 +1084,8 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
        request_resource(&ioport_resource, &res[0]);
        request_resource(&iomem_resource, &res[1]);
 
-       sys->resource[0] = &res[0];
-       sys->resource[1] = &res[1];
-       sys->resource[2] = NULL;
+       pci_add_resource(&sys->resources, &res[0]);
+       pci_add_resource(&sys->resources, &res[1]);
 
        return 1;
 }
index ee52541..e872d23 100644 (file)
@@ -145,7 +145,8 @@ static struct pci_ops enp2611_pci_ops = {
 static struct pci_bus * __init enp2611_pci_scan_bus(int nr,
                                                struct pci_sys_data *sys)
 {
-       return pci_scan_bus(sys->busnr, &enp2611_pci_ops, sys);
+       return pci_scan_root_bus(NULL, sys->busnr, &enp2611_pci_ops, sys,
+                                &sys->resources);
 }
 
 static int __init enp2611_pci_map_irq(const struct pci_dev *dev, u8 slot,
index f5098b3..626fda4 100644 (file)
@@ -132,7 +132,8 @@ static struct pci_ops ixp2000_pci_ops = {
 
 struct pci_bus *ixp2000_pci_scan_bus(int nr, struct pci_sys_data *sysdata)
 {
-       return pci_scan_bus(sysdata->busnr, &ixp2000_pci_ops, sysdata);
+       return pci_scan_root_bus(NULL, sysdata->busnr, &ixp2000_pci_ops,
+                                sysdata, &sysdata->resources);
 }
 
 
@@ -242,9 +243,8 @@ int ixp2000_pci_setup(int nr, struct pci_sys_data *sys)
        if (nr >= 1)
                return 0;
 
-       sys->resource[0] = &ixp2000_pci_io_space;
-       sys->resource[1] = &ixp2000_pci_mem_space;
-       sys->resource[2] = NULL;
+       pci_add_resource(&sys->resources, &ixp2000_pci_io_space);
+       pci_add_resource(&sys->resources, &ixp2000_pci_mem_space);
 
        return 1;
 }
index e6be571..25b5c46 100644 (file)
@@ -143,7 +143,8 @@ struct pci_ops ixp23xx_pci_ops = {
 
 struct pci_bus *ixp23xx_pci_scan_bus(int nr, struct pci_sys_data *sysdata)
 {
-       return pci_scan_bus(sysdata->busnr, &ixp23xx_pci_ops, sysdata);
+       return pci_scan_root_bus(NULL, sysdata->busnr, &ixp23xx_pci_ops,
+                                sysdata, &sysdata->resources);
 }
 
 int ixp23xx_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
@@ -280,9 +281,8 @@ int ixp23xx_pci_setup(int nr, struct pci_sys_data *sys)
        if (nr >= 1)
                return 0;
 
-       sys->resource[0] = &ixp23xx_pci_io_space;
-       sys->resource[1] = &ixp23xx_pci_mem_space;
-       sys->resource[2] = NULL;
+       pci_add_resource(&sys->resources, &ixp23xx_pci_io_space);
+       pci_add_resource(&sys->resources, &ixp23xx_pci_mem_space);
 
        return 1;
 }
index 8325058..5eff15f 100644 (file)
@@ -472,9 +472,8 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
        request_resource(&ioport_resource, &res[0]);
        request_resource(&iomem_resource, &res[1]);
 
-       sys->resource[0] = &res[0];
-       sys->resource[1] = &res[1];
-       sys->resource[2] = NULL;
+       pci_add_resource(&sys->resources, &res[0]);
+       pci_add_resource(&sys->resources, &res[1]);
 
        platform_notify = ixp4xx_pci_platform_notify;
        platform_notify_remove = ixp4xx_pci_platform_notify_remove;
@@ -484,7 +483,8 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
 
 struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys)
 {
-       return pci_scan_bus(sys->busnr, &ixp4xx_ops, sys);
+       return pci_scan_root_bus(NULL, sys->busnr, &ixp4xx_ops, sys,
+                                &sys->resources);
 }
 
 int dma_set_coherent_mask(struct device *dev, u64 mask)
index fb451bf..a066a6d 100644 (file)
@@ -198,9 +198,8 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
        if (request_resource(&iomem_resource, &pp->res[1]))
                panic("Request PCIe%d Memory resource failed\n", index);
 
-       sys->resource[0] = &pp->res[0];
-       sys->resource[1] = &pp->res[1];
-       sys->resource[2] = NULL;
+       pci_add_resource(&sys->resources, &pp->res[0]);
+       pci_add_resource(&sys->resources, &pp->res[1]);
        sys->io_offset = 0;
 
        /*
@@ -236,7 +235,8 @@ kirkwood_pcie_scan_bus(int nr, struct pci_sys_data *sys)
        struct pci_bus *bus;
 
        if (nr < num_pcie_ports) {
-               bus = pci_scan_bus(sys->busnr, &pcie_ops, sys);
+               bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
+                                       &sys->resources);
        } else {
                bus = NULL;
                BUG();
index c7c9a18..b26f992 100644 (file)
@@ -143,7 +143,8 @@ static struct pci_ops ks8695_pci_ops = {
 
 static struct pci_bus* __init ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys)
 {
-       return pci_scan_bus(sys->busnr, &ks8695_pci_ops, sys);
+       return pci_scan_root_bus(NULL, sys->busnr, &ks8695_pci_ops, sys,
+                                &sys->resources);
 }
 
 static struct resource pci_mem = {
@@ -168,9 +169,8 @@ static int __init ks8695_pci_setup(int nr, struct pci_sys_data *sys)
        request_resource(&iomem_resource, &pci_mem);
        request_resource(&ioport_resource, &pci_io);
 
-       sys->resource[0] = &pci_io;
-       sys->resource[1] = &pci_mem;
-       sys->resource[2] = NULL;
+       pci_add_resource(&sys->resources, &pci_io);
+       pci_add_resource(&sys->resources, &pci_mem);
 
        /* Assign and enable processor bridge */
        ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA);
index 12fcb10..8459f6d 100644 (file)
@@ -155,9 +155,8 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)
        orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
        orion_pcie_setup(pp->base);
 
-       sys->resource[0] = &pp->res[0];
-       sys->resource[1] = &pp->res[1];
-       sys->resource[2] = NULL;
+       pci_add_resource(&sys->resources, &pp->res[0]);
+       pci_add_resource(&sys->resources, &pp->res[1]);
 
        return 1;
 }
@@ -251,7 +250,8 @@ mv78xx0_pcie_scan_bus(int nr, struct pci_sys_data *sys)
        struct pci_bus *bus;
 
        if (nr < num_pcie_ports) {
-               bus = pci_scan_bus(sys->busnr, &pcie_ops, sys);
+               bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
+                                       &sys->resources);
        } else {
                bus = NULL;
                BUG();
index d67bcdf..acb4e77 100644 (file)
@@ -945,6 +945,9 @@ static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
        },
 #endif
        {
+               I2C_BOARD_INFO("bq27200", 0x55),
+       },
+       {
                I2C_BOARD_INFO("tpa6130a2", 0x60),
                .platform_data = &rx51_tpa6130a2_data,
        }
index 28fcb27..fb4bcf8 100644 (file)
@@ -156,6 +156,9 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
                else
                        /* The FIFO has 128 locations */
                        pdata->buffer_size = 0x80;
+       } else if (oh->class->rev == MCBSP_CONFIG_TYPE4) {
+               /* The FIFO has 128 locations for all instances */
+               pdata->buffer_size = 0x80;
        }
 
        if (oh->class->rev >= MCBSP_CONFIG_TYPE3)
index a494c47..09a045f 100644 (file)
@@ -177,7 +177,7 @@ static int __init pcie_setup(struct pci_sys_data *sys)
        res[0].end = res[0].start + ORION5X_PCIE_IO_SIZE - 1;
        if (request_resource(&ioport_resource, &res[0]))
                panic("Request PCIe IO resource failed\n");
-       sys->resource[0] = &res[0];
+       pci_add_resource(&sys->resources, &res[0]);
 
        /*
         * IORESOURCE_MEM
@@ -188,9 +188,8 @@ static int __init pcie_setup(struct pci_sys_data *sys)
        res[1].end = res[1].start + ORION5X_PCIE_MEM_SIZE - 1;
        if (request_resource(&iomem_resource, &res[1]))
                panic("Request PCIe Memory resource failed\n");
-       sys->resource[1] = &res[1];
+       pci_add_resource(&sys->resources, &res[1]);
 
-       sys->resource[2] = NULL;
        sys->io_offset = 0;
 
        return 1;
@@ -506,7 +505,7 @@ static int __init pci_setup(struct pci_sys_data *sys)
        res[0].end = res[0].start + ORION5X_PCI_IO_SIZE - 1;
        if (request_resource(&ioport_resource, &res[0]))
                panic("Request PCI IO resource failed\n");
-       sys->resource[0] = &res[0];
+       pci_add_resource(&sys->resources, &res[0]);
 
        /*
         * IORESOURCE_MEM
@@ -517,9 +516,8 @@ static int __init pci_setup(struct pci_sys_data *sys)
        res[1].end = res[1].start + ORION5X_PCI_MEM_SIZE - 1;
        if (request_resource(&iomem_resource, &res[1]))
                panic("Request PCI Memory resource failed\n");
-       sys->resource[1] = &res[1];
+       pci_add_resource(&sys->resources, &res[1]);
 
-       sys->resource[2] = NULL;
        sys->io_offset = 0;
 
        return 1;
@@ -580,9 +578,11 @@ struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys
        struct pci_bus *bus;
 
        if (nr == 0) {
-               bus = pci_scan_bus(sys->busnr, &pcie_ops, sys);
+               bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
+                                       &sys->resources);
        } else if (nr == 1 && !orion5x_pci_disabled) {
-               bus = pci_scan_bus(sys->busnr, &pci_ops, sys);
+               bus = pci_scan_root_bus(NULL, sys->busnr, &pci_ops, sys,
+                                       &sys->resources);
        } else {
                bus = NULL;
                BUG();
index 66600f0..11f1e73 100644 (file)
@@ -436,6 +436,14 @@ static struct platform_device corgiled_device = {
 };
 
 /*
+ * Corgi Audio
+ */
+static struct platform_device corgi_audio_device = {
+       .name   = "corgi-audio",
+       .id     = -1,
+};
+
+/*
  * MMC/SD Device
  *
  * The card detect interrupt isn't debounced so we delay it by 250ms
@@ -641,6 +649,7 @@ static struct platform_device *devices[] __initdata = {
        &corgifb_device,
        &corgikbd_device,
        &corgiled_device,
+       &corgi_audio_device,
        &sharpsl_nand_device,
        &sharpsl_rom_device,
 };
index f79a610..4cb2391 100644 (file)
@@ -528,12 +528,18 @@ static struct platform_device e740_t7l66xb_device = {
        .resource      = eseries_tmio_resources,
 };
 
+static struct platform_device e740_audio_device = {
+       .name           = "e740-audio",
+       .id             = -1,
+};
+
 /* ----------------------------------------------------------------------- */
 
 static struct platform_device *e740_devices[] __initdata = {
        &e740_fb_device,
        &e740_t7l66xb_device,
        &e7xx_gpio_vbus,
+       &e740_audio_device,
 };
 
 static void __init e740_init(void)
@@ -722,12 +728,18 @@ static struct platform_device e750_tc6393xb_device = {
        .resource      = eseries_tmio_resources,
 };
 
+static struct platform_device e750_audio_device = {
+       .name           = "e750-audio",
+       .id             = -1,
+};
+
 /* ------------------------------------------------------------- */
 
 static struct platform_device *e750_devices[] __initdata = {
        &e750_fb_device,
        &e750_tc6393xb_device,
        &e7xx_gpio_vbus,
+       &e750_audio_device,
 };
 
 static void __init e750_init(void)
@@ -929,12 +941,18 @@ static struct platform_device e800_tc6393xb_device = {
        .resource      = eseries_tmio_resources,
 };
 
+static struct platform_device e800_audio_device = {
+       .name           = "e800-audio",
+       .id             = -1,
+};
+
 /* ----------------------------------------------------------------------- */
 
 static struct platform_device *e800_devices[] __initdata = {
        &e800_fb_device,
        &e800_tc6393xb_device,
        &e800_gpio_vbus,
+       &e800_audio_device,
 };
 
 static void __init e800_init(void)
index 69036e4..744baee 100644 (file)
@@ -158,6 +158,11 @@ static struct scoop_pcmcia_config poodle_pcmcia_config = {
 EXPORT_SYMBOL(poodle_scoop_device);
 
 
+static struct platform_device poodle_audio_device = {
+       .name   = "poodle-audio",
+       .id     = -1,
+};
+
 /* LoCoMo device */
 static struct resource locomo_resources[] = {
        [0] = {
@@ -407,6 +412,7 @@ static struct platform_device sharpsl_rom_device = {
 static struct platform_device *devices[] __initdata = {
        &poodle_locomo_device,
        &poodle_scoop_device,
+       &poodle_audio_device,
        &sharpsl_nand_device,
        &sharpsl_rom_device,
 };
index d8a2467..b0656e1 100644 (file)
@@ -593,10 +593,16 @@ static struct pxa2xx_udc_mach_info imote2_udc_info __initdata = {
        .udc_command            = sg2_udc_command,
 };
 
+static struct platform_device imote2_audio_device = {
+       .name = "imote2-audio",
+       .id   = -1,
+};
+
 static struct platform_device *imote2_devices[] = {
        &stargate2_flash_device,
        &imote2_leds,
        &sht15,
+       &imote2_audio_device,
 };
 
 static void __init imote2_init(void)
index 7ce5c43..4d4eb60 100644 (file)
@@ -889,6 +889,11 @@ static struct platform_device wm9712_device = {
        .id     = -1,
 };
 
+static struct platform_device tosa_audio_device = {
+       .name   = "tosa-audio",
+       .id     = -1,
+};
+
 static struct platform_device *devices[] __initdata = {
        &tosascoop_device,
        &tosascoop_jc_device,
@@ -901,6 +906,7 @@ static struct platform_device *devices[] __initdata = {
        &sharpsl_rom_device,
        &wm9712_device,
        &tosa_gpio_vbus,
+       &tosa_audio_device,
 };
 
 static void tosa_poweroff(void)
index 680fd75..1cc91d7 100644 (file)
@@ -286,8 +286,8 @@ static struct platform_device lowland_device = {
        .id             = -1,
 };
 
-static struct platform_device speyside_wm8962_device = {
-       .name           = "speyside-wm8962",
+static struct platform_device tobermory_device = {
+       .name           = "tobermory",
        .id             = -1,
 };
 
@@ -347,7 +347,7 @@ static struct platform_device *crag6410_devices[] __initdata = {
        &crag6410_lcd_powerdev,
        &crag6410_backlight_device,
        &speyside_device,
-       &speyside_wm8962_device,
+       &tobermory_device,
        &littlemill_device,
        &lowland_device,
        &wallvdd_device,
index dd39fee..0d01ca7 100644 (file)
@@ -131,7 +131,8 @@ static int __init pci_nanoengine_map_irq(const struct pci_dev *dev, u8 slot,
 
 struct pci_bus * __init pci_nanoengine_scan_bus(int nr, struct pci_sys_data *sys)
 {
-       return pci_scan_bus(sys->busnr, &pci_nano_ops, sys);
+       return pci_scan_root_bus(NULL, sys->busnr, &pci_nano_ops, sys,
+                                &sys->resources);
 }
 
 static struct resource pci_io_ports = {
@@ -226,7 +227,7 @@ static struct resource pci_prefetchable_memory = {
        .flags  = IORESOURCE_MEM  | IORESOURCE_PREFETCH,
 };
 
-static int __init pci_nanoengine_setup_resources(struct resource **resource)
+static int __init pci_nanoengine_setup_resources(struct pci_sys_data *sys)
 {
        if (request_resource(&ioport_resource, &pci_io_ports)) {
                printk(KERN_ERR "PCI: unable to allocate io port region\n");
@@ -243,9 +244,9 @@ static int __init pci_nanoengine_setup_resources(struct resource **resource)
                printk(KERN_ERR "PCI: unable to allocate prefetchable\n");
                return -EBUSY;
        }
-       resource[0] = &pci_io_ports;
-       resource[1] = &pci_non_prefetchable_memory;
-       resource[2] = &pci_prefetchable_memory;
+       pci_add_resource(&sys->resources, &pci_io_ports);
+       pci_add_resource(&sys->resources, &pci_non_prefetchable_memory);
+       pci_add_resource(&sys->resources, &pci_prefetchable_memory);
 
        return 1;
 }
@@ -260,7 +261,7 @@ int __init pci_nanoengine_setup(int nr, struct pci_sys_data *sys)
        if (nr == 0) {
                sys->mem_offset = NANO_PCI_MEM_RW_PHYS;
                sys->io_offset = 0x400;
-               ret = pci_nanoengine_setup_resources(sys->resource);
+               ret = pci_nanoengine_setup_resources(sys);
                /* Enable alternate memory bus master mode, see
                 * "Intel StrongARM SA1110 Developer's Manual",
                 * section 10.8, "Alternate Memory Bus Master Mode". */
index 0828fab..060e564 100644 (file)
@@ -28,6 +28,19 @@ config ARCH_SH73A0
        select ARM_GIC
        select I2C
 
+config ARCH_R8A7740
+       bool "R-Mobile A1 (R8A77400)"
+       select CPU_V7
+       select SH_CLK_CPG
+       select ARCH_WANT_OPTIONAL_GPIOLIB
+
+config ARCH_R8A7779
+       bool "R-Car H1 (R8A77790)"
+       select CPU_V7
+       select SH_CLK_CPG
+       select ARM_GIC
+       select ARCH_WANT_OPTIONAL_GPIOLIB
+
 comment "SH-Mobile Board Type"
 
 config MACH_G3EVM
@@ -75,6 +88,16 @@ config MACH_KOTA2
        select ARCH_REQUIRE_GPIOLIB
        depends on ARCH_SH73A0
 
+config MACH_BONITO
+       bool "bonito board"
+       select ARCH_REQUIRE_GPIOLIB
+       depends on ARCH_R8A7740
+
+config MACH_MARZEN
+       bool "MARZEN board"
+       depends on ARCH_R8A7779
+       select ARCH_REQUIRE_GPIOLIB
+
 comment "SH-Mobile System Configuration"
 
 menu "Memory configuration"
@@ -83,7 +106,7 @@ config MEMORY_START
        hex "Physical memory start address"
        default "0x50000000" if MACH_G3EVM
        default "0x40000000" if MACH_G4EVM || MACH_AP4EVB || MACH_AG5EVM || \
-                               MACH_MACKEREL
+                               MACH_MACKEREL || MACH_BONITO
        default "0x41000000" if MACH_KOTA2
        default "0x00000000"
        ---help---
@@ -95,7 +118,7 @@ config MEMORY_SIZE
        hex "Physical memory size"
        default "0x08000000" if MACH_G3EVM
        default "0x08000000" if MACH_G4EVM
-       default "0x20000000" if MACH_AG5EVM
+       default "0x20000000" if MACH_AG5EVM || MACH_BONITO
        default "0x1e000000" if MACH_KOTA2
        default "0x10000000" if MACH_AP4EVB || MACH_MACKEREL
        default "0x04000000"
index 5ca1f9d..7ad6954 100644 (file)
@@ -10,12 +10,15 @@ obj-$(CONFIG_ARCH_SH7367)   += setup-sh7367.o clock-sh7367.o intc-sh7367.o
 obj-$(CONFIG_ARCH_SH7377)      += setup-sh7377.o clock-sh7377.o intc-sh7377.o
 obj-$(CONFIG_ARCH_SH7372)      += setup-sh7372.o clock-sh7372.o intc-sh7372.o
 obj-$(CONFIG_ARCH_SH73A0)      += setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o
+obj-$(CONFIG_ARCH_R8A7740)     += setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o
+obj-$(CONFIG_ARCH_R8A7779)     += setup-r8a7779.o clock-r8a7779.o intc-r8a7779.o
 
 # SMP objects
 smp-y                          := platsmp.o headsmp.o
 smp-$(CONFIG_HOTPLUG_CPU)      += hotplug.o
 smp-$(CONFIG_LOCAL_TIMERS)     += localtimer.o
 smp-$(CONFIG_ARCH_SH73A0)      += smp-sh73a0.o
+smp-$(CONFIG_ARCH_R8A7779)     += smp-r8a7779.o
 
 # Pinmux setup
 pfc-y                          :=
@@ -23,16 +26,20 @@ pfc-$(CONFIG_ARCH_SH7367)   += pfc-sh7367.o
 pfc-$(CONFIG_ARCH_SH7377)      += pfc-sh7377.o
 pfc-$(CONFIG_ARCH_SH7372)      += pfc-sh7372.o
 pfc-$(CONFIG_ARCH_SH73A0)      += pfc-sh73a0.o
+pfc-$(CONFIG_ARCH_R8A7740)     += pfc-r8a7740.o
+pfc-$(CONFIG_ARCH_R8A7779)     += pfc-r8a7779.o
 
 # IRQ objects
 obj-$(CONFIG_ARCH_SH7367)      += entry-intc.o
 obj-$(CONFIG_ARCH_SH7377)      += entry-intc.o
 obj-$(CONFIG_ARCH_SH7372)      += entry-intc.o
+obj-$(CONFIG_ARCH_R8A7740)     += entry-intc.o
 
 # PM objects
 obj-$(CONFIG_SUSPEND)          += suspend.o
 obj-$(CONFIG_CPU_IDLE)         += cpuidle.o
 obj-$(CONFIG_ARCH_SH7372)      += pm-sh7372.o sleep-sh7372.o
+obj-$(CONFIG_ARCH_R8A7779)     += pm-r8a7779.o
 
 # Board objects
 obj-$(CONFIG_MACH_G3EVM)       += board-g3evm.o
@@ -41,6 +48,8 @@ obj-$(CONFIG_MACH_AP4EVB)     += board-ap4evb.o
 obj-$(CONFIG_MACH_AG5EVM)      += board-ag5evm.o
 obj-$(CONFIG_MACH_MACKEREL)    += board-mackerel.o
 obj-$(CONFIG_MACH_KOTA2)       += board-kota2.o
+obj-$(CONFIG_MACH_BONITO)      += board-bonito.o
+obj-$(CONFIG_MACH_MARZEN)      += board-marzen.o
 
 # Framework support
 obj-$(CONFIG_SMP)              += $(smp-y)
index 6a6f9f7..d2e7b73 100644 (file)
@@ -762,9 +762,22 @@ static struct platform_device fsi_device = {
        },
 };
 
+static struct fsi_ak4642_info fsi2_ak4643_info = {
+       .name           = "AK4643",
+       .card           = "FSI2A-AK4643",
+       .cpu_dai        = "fsia-dai",
+       .codec          = "ak4642-codec.0-0013",
+       .platform       = "sh_fsi2",
+       .id             = FSI_PORT_A,
+};
+
 static struct platform_device fsi_ak4643_device = {
-       .name           = "sh_fsi2_a_ak4643",
+       .name   = "fsi-ak4642-audio",
+       .dev    = {
+               .platform_data  = &fsi_info,
+       },
 };
+
 static struct sh_mobile_meram_cfg hdmi_meram_cfg = {
        .icb[0] = {
                .marker_icb     = 30,
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
new file mode 100644 (file)
index 0000000..4d22016
--- /dev/null
@@ -0,0 +1,522 @@
+/*
+ * bonito board support
+ *
+ * Copyright (C) 2011 Renesas Solutions Corp.
+ * Copyright (C) 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/smsc911x.h>
+#include <mach/common.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/time.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <mach/r8a7740.h>
+#include <video/sh_mobile_lcdc.h>
+
+/*
+ * CS  Address         device                  note
+ *----------------------------------------------------------------
+ * 0   0x0000_0000     NOR Flash (64MB)        SW12 : bit3 = OFF
+ * 2   0x0800_0000     ExtNOR (64MB)           SW12 : bit3 = OFF
+ * 4                   -
+ * 5A                  -
+ * 5B  0x1600_0000     SRAM (8MB)
+ * 6   0x1800_0000     FPGA (64K)
+ *     0x1801_0000     Ether (4KB)
+ *     0x1801_1000     USB (4KB)
+ */
+
+/*
+ * SW12
+ *
+ *     bit1                    bit2                    bit3
+ *----------------------------------------------------------------------------
+ * ON  NOR WriteProtect        NAND WriteProtect       CS0 ExtNOR / CS2 NOR
+ * OFF NOR Not WriteProtect    NAND Not WriteProtect   CS0 NOR    / CS2 ExtNOR
+ */
+
+/*
+ * SCIFA5 (CN42)
+ *
+ * S38.3 = ON
+ * S39.6 = ON
+ * S43.1 = ON
+ */
+
+/*
+ * LCDC0 (CN3/CN4/CN7)
+ *
+ * S38.1 = OFF
+ * S38.2 = OFF
+ */
+
+/*
+ * FPGA
+ */
+#define IRQSR0         0x0020
+#define IRQSR1         0x0022
+#define IRQMR0         0x0030
+#define IRQMR1         0x0032
+#define BUSSWMR1       0x0070
+#define BUSSWMR2       0x0072
+#define BUSSWMR3       0x0074
+#define BUSSWMR4       0x0076
+
+#define LCDCR          0x10B4
+#define DEVRSTCR1      0x10D0
+#define DEVRSTCR2      0x10D2
+#define A1MDSR         0x10E0
+#define BVERR          0x1100
+
+/* FPGA IRQ */
+#define FPGA_IRQ_BASE          (512)
+#define FPGA_IRQ0              (FPGA_IRQ_BASE)
+#define FPGA_IRQ1              (FPGA_IRQ_BASE + 16)
+#define FPGA_ETH_IRQ           (FPGA_IRQ0 + 15)
+static u16 bonito_fpga_read(u32 offset)
+{
+       return __raw_readw(0xf0003000 + offset);
+}
+
+static void bonito_fpga_write(u32 offset, u16 val)
+{
+       __raw_writew(val, 0xf0003000 + offset);
+}
+
+static void bonito_fpga_irq_disable(struct irq_data *data)
+{
+       unsigned int irq = data->irq;
+       u32 addr = (irq < 1016) ? IRQMR0 : IRQMR1;
+       int shift = irq % 16;
+
+       bonito_fpga_write(addr, bonito_fpga_read(addr) | (1 << shift));
+}
+
+static void bonito_fpga_irq_enable(struct irq_data *data)
+{
+       unsigned int irq = data->irq;
+       u32 addr = (irq < 1016) ? IRQMR0 : IRQMR1;
+       int shift = irq % 16;
+
+       bonito_fpga_write(addr, bonito_fpga_read(addr) & ~(1 << shift));
+}
+
+static struct irq_chip bonito_fpga_irq_chip __read_mostly = {
+       .name           = "bonito FPGA",
+       .irq_mask       = bonito_fpga_irq_disable,
+       .irq_unmask     = bonito_fpga_irq_enable,
+};
+
+static void bonito_fpga_irq_demux(unsigned int irq, struct irq_desc *desc)
+{
+       u32 val =  bonito_fpga_read(IRQSR1) << 16 |
+                  bonito_fpga_read(IRQSR0);
+       u32 mask = bonito_fpga_read(IRQMR1) << 16 |
+                  bonito_fpga_read(IRQMR0);
+
+       int i;
+
+       val &= ~mask;
+
+       for (i = 0; i < 32; i++) {
+               if (!(val & (1 << i)))
+                       continue;
+
+               generic_handle_irq(FPGA_IRQ_BASE + i);
+       }
+}
+
+static void bonito_fpga_init(void)
+{
+       int i;
+
+       bonito_fpga_write(IRQMR0, 0xffff); /* mask all */
+       bonito_fpga_write(IRQMR1, 0xffff); /* mask all */
+
+       /* Device reset */
+       bonito_fpga_write(DEVRSTCR1,
+                  (1 << 2));   /* Eth */
+
+       /* FPGA irq require special handling */
+       for (i = FPGA_IRQ_BASE; i < FPGA_IRQ_BASE + 32; i++) {
+               irq_set_chip_and_handler_name(i, &bonito_fpga_irq_chip,
+                                             handle_level_irq, "level");
+               set_irq_flags(i, IRQF_VALID); /* yuck */
+       }
+
+       irq_set_chained_handler(evt2irq(0x0340), bonito_fpga_irq_demux);
+       irq_set_irq_type(evt2irq(0x0340), IRQ_TYPE_LEVEL_LOW);
+}
+
+/*
+* PMIC settings
+*
+* FIXME
+*
+* bonito board needs some settings by pmic which use i2c access.
+* pmic settings use device_initcall() here for use it.
+*/
+static __u8 *pmic_settings = NULL;
+static __u8 pmic_do_2A[] = {
+       0x1C, 0x09,
+       0x1A, 0x80,
+       0xff, 0xff,
+};
+
+static int __init pmic_init(void)
+{
+       struct i2c_adapter *a = i2c_get_adapter(0);
+       struct i2c_msg msg;
+       __u8 buf[2];
+       int i, ret;
+
+       if (!pmic_settings)
+               return 0;
+       if (!a)
+               return 0;
+
+       msg.addr        = 0x46;
+       msg.buf         = buf;
+       msg.len         = 2;
+       msg.flags       = 0;
+
+       for (i = 0; ; i += 2) {
+               buf[0] = pmic_settings[i + 0];
+               buf[1] = pmic_settings[i + 1];
+
+               if ((0xff == buf[0]) && (0xff == buf[1]))
+                       break;
+
+               ret = i2c_transfer(a, &msg, 1);
+               if (ret < 0) {
+                       pr_err("i2c transfer fail\n");
+                       break;
+               }
+       }
+
+       return 0;
+}
+device_initcall(pmic_init);
+
+/*
+ * LCDC0
+ */
+static const struct fb_videomode lcdc0_mode = {
+       .name           = "WVGA Panel",
+       .xres           = 800,
+       .yres           = 480,
+       .left_margin    = 88,
+       .right_margin   = 40,
+       .hsync_len      = 128,
+       .upper_margin   = 20,
+       .lower_margin   = 5,
+       .vsync_len      = 5,
+       .sync           = 0,
+};
+
+static struct sh_mobile_lcdc_info lcdc0_info = {
+       .clock_source   = LCDC_CLK_BUS,
+       .ch[0] = {
+               .chan                   = LCDC_CHAN_MAINLCD,
+               .bpp                    = 16,
+               .interface_type         = RGB24,
+               .clock_divider          = 5,
+               .flags                  = 0,
+               .lcd_cfg                = &lcdc0_mode,
+               .num_cfg                = 1,
+               .lcd_size_cfg = {
+                       .width  = 152,
+                       .height = 91,
+               },
+       },
+};
+
+static struct resource lcdc0_resources[] = {
+       [0] = {
+               .name   = "LCDC0",
+               .start  = 0xfe940000,
+               .end    = 0xfe943fff,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = intcs_evt2irq(0x0580),
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device lcdc0_device = {
+       .name           = "sh_mobile_lcdc_fb",
+       .id             = 0,
+       .resource       = lcdc0_resources,
+       .num_resources  = ARRAY_SIZE(lcdc0_resources),
+       .dev    = {
+               .platform_data  = &lcdc0_info,
+               .coherent_dma_mask = ~0,
+       },
+};
+
+/*
+ * SMSC 9221
+ */
+static struct resource smsc_resources[] = {
+       [0] = {
+               .start          = 0x18010000,
+               .end            = 0x18011000 - 1,
+               .flags          = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start          = FPGA_ETH_IRQ,
+               .flags          = IORESOURCE_IRQ,
+       },
+};
+
+static struct smsc911x_platform_config smsc_platdata = {
+       .flags          = SMSC911X_USE_16BIT,
+       .phy_interface  = PHY_INTERFACE_MODE_MII,
+       .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+       .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
+};
+
+static struct platform_device smsc_device = {
+       .name           = "smsc911x",
+       .dev  = {
+               .platform_data = &smsc_platdata,
+       },
+       .resource       = smsc_resources,
+       .num_resources  = ARRAY_SIZE(smsc_resources),
+};
+
+/*
+ * core board devices
+ */
+static struct platform_device *bonito_core_devices[] __initdata = {
+};
+
+/*
+ * base board devices
+ */
+static struct platform_device *bonito_base_devices[] __initdata = {
+       &lcdc0_device,
+       &smsc_device,
+};
+
+/*
+ * map I/O
+ */
+static struct map_desc bonito_io_desc[] __initdata = {
+        /*
+         * for CPGA/INTC/PFC
+         * 0xe6000000-0xefffffff -> 0xe6000000-0xefffffff
+         */
+       {
+               .virtual        = 0xe6000000,
+               .pfn            = __phys_to_pfn(0xe6000000),
+               .length         = 160 << 20,
+               .type           = MT_DEVICE_NONSHARED
+       },
+#ifdef CONFIG_CACHE_L2X0
+       /*
+        * for l2x0_init()
+        * 0xf0100000-0xf0101000 -> 0xf0002000-0xf0003000
+        */
+       {
+               .virtual        = 0xf0002000,
+               .pfn            = __phys_to_pfn(0xf0100000),
+               .length         = PAGE_SIZE,
+               .type           = MT_DEVICE_NONSHARED
+       },
+#endif
+       /*
+        * for FPGA (0x1800000-0x19ffffff)
+        * 0x18000000-0x18002000 -> 0xf0003000-0xf0005000
+        */
+       {
+               .virtual        = 0xf0003000,
+               .pfn            = __phys_to_pfn(0x18000000),
+               .length         = PAGE_SIZE * 2,
+               .type           = MT_DEVICE_NONSHARED
+       }
+};
+
+static void __init bonito_map_io(void)
+{
+       iotable_init(bonito_io_desc, ARRAY_SIZE(bonito_io_desc));
+
+       /* setup early devices and console here as well */
+       r8a7740_add_early_devices();
+       shmobile_setup_console();
+}
+
+/*
+ * board init
+ */
+#define BIT_ON(sw, bit)                (sw & (1 << bit))
+#define BIT_OFF(sw, bit)       (!(sw & (1 << bit)))
+
+#define VCCQ1CR                0xE6058140
+#define VCCQ1LCDCR     0xE6058186
+
+static void __init bonito_init(void)
+{
+       u16 val;
+
+       r8a7740_pinmux_init();
+       bonito_fpga_init();
+
+       pmic_settings = pmic_do_2A;
+
+       /*
+        * core board settings
+        */
+
+#ifdef CONFIG_CACHE_L2X0
+       /* Early BRESP enable, Shared attribute override enable, 32K*8way */
+       l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff);
+#endif
+
+       r8a7740_add_standard_devices();
+
+       platform_add_devices(bonito_core_devices,
+                            ARRAY_SIZE(bonito_core_devices));
+
+       /*
+        * base board settings
+        */
+       gpio_request(GPIO_PORT176, NULL);
+       gpio_direction_input(GPIO_PORT176);
+       if (!gpio_get_value(GPIO_PORT176)) {
+               u16 bsw2;
+               u16 bsw3;
+               u16 bsw4;
+
+               /*
+                * FPGA
+                */
+               gpio_request(GPIO_FN_CS5B,              NULL);
+               gpio_request(GPIO_FN_CS6A,              NULL);
+               gpio_request(GPIO_FN_CS5A_PORT105,      NULL);
+               gpio_request(GPIO_FN_IRQ10,             NULL);
+
+               val = bonito_fpga_read(BVERR);
+               pr_info("bonito version: cpu %02x, base %02x\n",
+                       ((val >> 8) & 0xFF),
+                       ((val >> 0) & 0xFF));
+
+               bsw2 = bonito_fpga_read(BUSSWMR2);
+               bsw3 = bonito_fpga_read(BUSSWMR3);
+               bsw4 = bonito_fpga_read(BUSSWMR4);
+
+               /*
+                * SCIFA5 (CN42)
+                */
+               if (BIT_OFF(bsw2, 1) && /* S38.3 = ON */
+                   BIT_OFF(bsw3, 9) && /* S39.6 = ON */
+                   BIT_OFF(bsw4, 4)) { /* S43.1 = ON */
+                       gpio_request(GPIO_FN_SCIFA5_TXD_PORT91, NULL);
+                       gpio_request(GPIO_FN_SCIFA5_RXD_PORT92, NULL);
+               }
+
+               /*
+                * LCDC0 (CN3)
+                */
+               if (BIT_ON(bsw2, 3) &&  /* S38.1 = OFF */
+                   BIT_ON(bsw2, 2)) {  /* S38.2 = OFF */
+                       gpio_request(GPIO_FN_LCDC0_SELECT,      NULL);
+                       gpio_request(GPIO_FN_LCD0_D0,           NULL);
+                       gpio_request(GPIO_FN_LCD0_D1,           NULL);
+                       gpio_request(GPIO_FN_LCD0_D2,           NULL);
+                       gpio_request(GPIO_FN_LCD0_D3,           NULL);
+                       gpio_request(GPIO_FN_LCD0_D4,           NULL);
+                       gpio_request(GPIO_FN_LCD0_D5,           NULL);
+                       gpio_request(GPIO_FN_LCD0_D6,           NULL);
+                       gpio_request(GPIO_FN_LCD0_D7,           NULL);
+                       gpio_request(GPIO_FN_LCD0_D8,           NULL);
+                       gpio_request(GPIO_FN_LCD0_D9,           NULL);
+                       gpio_request(GPIO_FN_LCD0_D10,          NULL);
+                       gpio_request(GPIO_FN_LCD0_D11,          NULL);
+                       gpio_request(GPIO_FN_LCD0_D12,          NULL);
+                       gpio_request(GPIO_FN_LCD0_D13,          NULL);
+                       gpio_request(GPIO_FN_LCD0_D14,          NULL);
+                       gpio_request(GPIO_FN_LCD0_D15,          NULL);
+                       gpio_request(GPIO_FN_LCD0_D16,          NULL);
+                       gpio_request(GPIO_FN_LCD0_D17,          NULL);
+                       gpio_request(GPIO_FN_LCD0_D18_PORT163,  NULL);
+                       gpio_request(GPIO_FN_LCD0_D19_PORT162,  NULL);
+                       gpio_request(GPIO_FN_LCD0_D20_PORT161,  NULL);
+                       gpio_request(GPIO_FN_LCD0_D21_PORT158,  NULL);
+                       gpio_request(GPIO_FN_LCD0_D22_PORT160,  NULL);
+                       gpio_request(GPIO_FN_LCD0_D23_PORT159,  NULL);
+                       gpio_request(GPIO_FN_LCD0_DCK,          NULL);
+                       gpio_request(GPIO_FN_LCD0_VSYN,         NULL);
+                       gpio_request(GPIO_FN_LCD0_HSYN,         NULL);
+                       gpio_request(GPIO_FN_LCD0_DISP,         NULL);
+                       gpio_request(GPIO_FN_LCD0_LCLK_PORT165, NULL);
+
+                       gpio_request(GPIO_PORT61, NULL); /* LCDDON */
+                       gpio_direction_output(GPIO_PORT61, 1);
+
+                       /* backlight on */
+                       bonito_fpga_write(LCDCR, 1);
+
+                       /*  drivability Max */
+                       __raw_writew(0x00FF , VCCQ1LCDCR);
+                       __raw_writew(0xFFFF , VCCQ1CR);
+               }
+
+               platform_add_devices(bonito_base_devices,
+                                    ARRAY_SIZE(bonito_base_devices));
+       }
+}
+
+static void __init bonito_timer_init(void)
+{
+       u16 val;
+       u8 md_ck = 0;
+
+       /* read MD_CK value */
+       val = bonito_fpga_read(A1MDSR);
+       if (val & (1 << 10))
+               md_ck |= MD_CK2;
+       if (val & (1 << 9))
+               md_ck |= MD_CK1;
+       if (val & (1 << 8))
+               md_ck |= MD_CK0;
+
+       r8a7740_clock_init(md_ck);
+       shmobile_timer.init();
+}
+
+struct sys_timer bonito_timer = {
+       .init   = bonito_timer_init,
+};
+
+MACHINE_START(BONITO, "bonito")
+       .map_io         = bonito_map_io,
+       .init_irq       = r8a7740_init_irq,
+       .handle_irq     = shmobile_handle_irq_intc,
+       .init_machine   = bonito_init,
+       .timer          = &bonito_timer,
+MACHINE_END
index ed52566..cbc5934 100644 (file)
@@ -990,8 +990,20 @@ static struct platform_device fsi_device = {
        },
 };
 
+static struct fsi_ak4642_info fsi2_ak4643_info = {
+       .name           = "AK4643",
+       .card           = "FSI2A-AK4643",
+       .cpu_dai        = "fsia-dai",
+       .codec          = "ak4642-codec.0-0013",
+       .platform       = "sh_fsi2",
+       .id             = FSI_PORT_A,
+};
+
 static struct platform_device fsi_ak4643_device = {
-       .name           = "sh_fsi2_a_ak4643",
+       .name   = "fsi-ak4642-audio",
+       .dev    = {
+               .platform_data  = &fsi2_ak4643_info,
+       },
 };
 
 /*
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
new file mode 100644 (file)
index 0000000..f0e02c0
--- /dev/null
@@ -0,0 +1,157 @@
+/*
+ * marzen board support
+ *
+ * Copyright (C) 2011  Renesas Solutions Corp.
+ * Copyright (C) 2011  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/dma-mapping.h>
+#include <linux/smsc911x.h>
+#include <mach/hardware.h>
+#include <mach/r8a7779.h>
+#include <mach/common.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/time.h>
+#include <asm/hardware/gic.h>
+#include <asm/traps.h>
+
+/* SMSC LAN89218 */
+static struct resource smsc911x_resources[] = {
+       [0] = {
+               .start          = 0x18000000, /* ExCS0 */
+               .end            = 0x180000ff, /* A1->A7 */
+               .flags          = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start          = gic_spi(28), /* IRQ 1 */
+               .flags          = IORESOURCE_IRQ,
+       },
+};
+
+static struct smsc911x_platform_config smsc911x_platdata = {
+       .flags          = SMSC911X_USE_32BIT, /* 32-bit SW on 16-bit HW bus */
+       .phy_interface  = PHY_INTERFACE_MODE_MII,
+       .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+       .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
+};
+
+static struct platform_device eth_device = {
+       .name           = "smsc911x",
+       .id             = 0,
+       .dev  = {
+               .platform_data = &smsc911x_platdata,
+       },
+       .resource       = smsc911x_resources,
+       .num_resources  = ARRAY_SIZE(smsc911x_resources),
+};
+
+static struct platform_device *marzen_devices[] __initdata = {
+       &eth_device,
+};
+
+static struct map_desc marzen_io_desc[] __initdata = {
+       /* 2M entity map for 0xf0000000 (MPCORE) */
+       {
+               .virtual        = 0xf0000000,
+               .pfn            = __phys_to_pfn(0xf0000000),
+               .length         = SZ_2M,
+               .type           = MT_DEVICE_NONSHARED
+       },
+       /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
+       {
+               .virtual        = 0xfe000000,
+               .pfn            = __phys_to_pfn(0xfe000000),
+               .length         = SZ_16M,
+               .type           = MT_DEVICE_NONSHARED
+       },
+};
+
+static void __init marzen_map_io(void)
+{
+       iotable_init(marzen_io_desc, ARRAY_SIZE(marzen_io_desc));
+}
+
+static void __init marzen_init_early(void)
+{
+       r8a7779_add_early_devices();
+
+       /* Early serial console setup is not included here due to
+        * memory map collisions. The SCIF serial ports in r8a7779
+        * are difficult to entity map 1:1 due to collision with the
+        * virtual memory range used by the coherent DMA code on ARM.
+        *
+        * Anyone wanting to debug early can remove UPF_IOREMAP from
+        * the sh-sci serial console platform data, adjust mapbase
+        * to a static M:N virt:phys mapping that needs to be added to
+        * the mappings passed with iotable_init() above.
+        *
+        * Then add a call to shmobile_setup_console() from this function.
+        *
+        * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
+        * command line.
+        */
+}
+
+static void __init marzen_init(void)
+{
+       r8a7779_pinmux_init();
+
+       /* SCIF2 (CN18: DEBUG0) */
+       gpio_request(GPIO_FN_TX2_C, NULL);
+       gpio_request(GPIO_FN_RX2_C, NULL);
+
+       /* SCIF4 (CN19: DEBUG1) */
+       gpio_request(GPIO_FN_TX4, NULL);
+       gpio_request(GPIO_FN_RX4, NULL);
+
+       /* LAN89218 */
+       gpio_request(GPIO_FN_EX_CS0, NULL); /* nCS */
+       gpio_request(GPIO_FN_IRQ1_B, NULL); /* IRQ + PME */
+
+       r8a7779_add_standard_devices();
+       platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
+}
+
+static void __init marzen_timer_init(void)
+{
+       r8a7779_clock_init();
+       shmobile_timer.init();
+       return;
+}
+
+struct sys_timer marzen_timer = {
+       .init   = marzen_timer_init,
+};
+
+MACHINE_START(MARZEN, "marzen")
+       .map_io         = marzen_map_io,
+       .init_early     = marzen_init_early,
+       .nr_irqs        = NR_IRQS_LEGACY,
+       .init_irq       = r8a7779_init_irq,
+       .handle_irq     = gic_handle_irq,
+       .init_machine   = marzen_init,
+       .timer          = &marzen_timer,
+MACHINE_END
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
new file mode 100644 (file)
index 0000000..3b35b9a
--- /dev/null
@@ -0,0 +1,382 @@
+/*
+ * R8A7740 processor support
+ *
+ * Copyright (C) 2011  Renesas Solutions Corp.
+ * Copyright (C) 2011  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/sh_clk.h>
+#include <linux/clkdev.h>
+#include <mach/common.h>
+#include <mach/r8a7740.h>
+
+/*
+ *        |  MDx  |  XTAL1/EXTAL1   |  System   | EXTALR |
+ *  Clock |-------+-----------------+  clock    | 32.768 |   RCLK
+ *  Mode  | 2/1/0 | src         MHz |  source   |  KHz   |  source
+ * -------+-------+-----------------+-----------+--------+----------
+ *    0   | 0 0 0 | External  20~50 | XTAL1     |    O   |  EXTALR
+ *    1   | 0 0 1 | Crystal   20~30 | XTAL1     |    O   |  EXTALR
+ *    2   | 0 1 0 | External  40~50 | XTAL1 / 2 |    O   |  EXTALR
+ *    3   | 0 1 1 | Crystal   40~50 | XTAL1 / 2 |    O   |  EXTALR
+ *    4   | 1 0 0 | External  20~50 | XTAL1     |    x   |  XTAL1 / 1024
+ *    5   | 1 0 1 | Crystal   20~30 | XTAL1     |    x   |  XTAL1 / 1024
+ *    6   | 1 1 0 | External  40~50 | XTAL1 / 2 |    x   |  XTAL1 / 2048
+ *    7   | 1 1 1 | Crystal   40~50 | XTAL1 / 2 |    x   |  XTAL1 / 2048
+ */
+
+/* CPG registers */
+#define FRQCRA         0xe6150000
+#define FRQCRB         0xe6150004
+#define FRQCRC         0xe61500e0
+#define PLLC01CR       0xe6150028
+
+#define SUBCKCR                0xe6150080
+
+#define MSTPSR0                0xe6150030
+#define MSTPSR1                0xe6150038
+#define MSTPSR2                0xe6150040
+#define MSTPSR3                0xe6150048
+#define MSTPSR4                0xe615004c
+#define SMSTPCR0       0xe6150130
+#define SMSTPCR1       0xe6150134
+#define SMSTPCR2       0xe6150138
+#define SMSTPCR3       0xe615013c
+#define SMSTPCR4       0xe6150140
+
+/* Fixed 32 KHz root clock from EXTALR pin */
+static struct clk extalr_clk = {
+       .rate   = 32768,
+};
+
+/*
+ * 25MHz default rate for the EXTAL1 root input clock.
+ * If needed, reset this with clk_set_rate() from the platform code.
+ */
+static struct clk extal1_clk = {
+       .rate   = 25000000,
+};
+
+/*
+ * 48MHz default rate for the EXTAL2 root input clock.
+ * If needed, reset this with clk_set_rate() from the platform code.
+ */
+static struct clk extal2_clk = {
+       .rate   = 48000000,
+};
+
+/*
+ * 27MHz default rate for the DV_CLKI root input clock.
+ * If needed, reset this with clk_set_rate() from the platform code.
+ */
+static struct clk dv_clk = {
+       .rate   = 27000000,
+};
+
+static unsigned long div_recalc(struct clk *clk)
+{
+       return clk->parent->rate / (int)(clk->priv);
+}
+
+static struct clk_ops div_clk_ops = {
+       .recalc = div_recalc,
+};
+
+/* extal1 / 2 */
+static struct clk extal1_div2_clk = {
+       .ops    = &div_clk_ops,
+       .priv   = (void *)2,
+       .parent = &extal1_clk,
+};
+
+/* extal1 / 1024 */
+static struct clk extal1_div1024_clk = {
+       .ops    = &div_clk_ops,
+       .priv   = (void *)1024,
+       .parent = &extal1_clk,
+};
+
+/* extal1 / 2 / 1024 */
+static struct clk extal1_div2048_clk = {
+       .ops    = &div_clk_ops,
+       .priv   = (void *)1024,
+       .parent = &extal1_div2_clk,
+};
+
+/* extal2 / 2 */
+static struct clk extal2_div2_clk = {
+       .ops    = &div_clk_ops,
+       .priv   = (void *)2,
+       .parent = &extal2_clk,
+};
+
+static struct clk_ops followparent_clk_ops = {
+       .recalc = followparent_recalc,
+};
+
+/* Main clock */
+static struct clk system_clk = {
+       .ops    = &followparent_clk_ops,
+};
+
+static struct clk system_div2_clk = {
+       .ops    = &div_clk_ops,
+       .priv   = (void *)2,
+       .parent = &system_clk,
+};
+
+/* r_clk */
+static struct clk r_clk = {
+       .ops    = &followparent_clk_ops,
+};
+
+/* PLLC0/PLLC1 */
+static unsigned long pllc01_recalc(struct clk *clk)
+{
+       unsigned long mult = 1;
+
+       if (__raw_readl(PLLC01CR) & (1 << 14))
+               mult = ((__raw_readl(clk->enable_reg) >> 24) & 0x7f) + 1;
+
+       return clk->parent->rate * mult;
+}
+
+static struct clk_ops pllc01_clk_ops = {
+       .recalc         = pllc01_recalc,
+};
+
+static struct clk pllc0_clk = {
+       .ops            = &pllc01_clk_ops,
+       .flags          = CLK_ENABLE_ON_INIT,
+       .parent         = &system_clk,
+       .enable_reg     = (void __iomem *)FRQCRC,
+};
+
+static struct clk pllc1_clk = {
+       .ops            = &pllc01_clk_ops,
+       .flags          = CLK_ENABLE_ON_INIT,
+       .parent         = &system_div2_clk,
+       .enable_reg     = (void __iomem *)FRQCRA,
+};
+
+/* PLLC1 / 2 */
+static struct clk pllc1_div2_clk = {
+       .ops            = &div_clk_ops,
+       .priv           = (void *)2,
+       .parent         = &pllc1_clk,
+};
+
+struct clk *main_clks[] = {
+       &extalr_clk,
+       &extal1_clk,
+       &extal2_clk,
+       &extal1_div2_clk,
+       &extal1_div1024_clk,
+       &extal1_div2048_clk,
+       &extal2_div2_clk,
+       &dv_clk,
+       &system_clk,
+       &system_div2_clk,
+       &r_clk,
+       &pllc0_clk,
+       &pllc1_clk,
+       &pllc1_div2_clk,
+};
+
+static void div4_kick(struct clk *clk)
+{
+       unsigned long value;
+
+       /* set KICK bit in FRQCRB to update hardware setting */
+       value = __raw_readl(FRQCRB);
+       value |= (1 << 31);
+       __raw_writel(value, FRQCRB);
+}
+
+static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18,
+                         24, 32, 36, 48, 0, 72, 96, 0 };
+
+static struct clk_div_mult_table div4_div_mult_table = {
+       .divisors = divisors,
+       .nr_divisors = ARRAY_SIZE(divisors),
+};
+
+static struct clk_div4_table div4_table = {
+       .div_mult_table = &div4_div_mult_table,
+       .kick = div4_kick,
+};
+
+enum {
+       DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP,
+       DIV4_HPP, DIV4_S, DIV4_ZB, DIV4_M3, DIV4_CP,
+       DIV4_NR
+};
+
+struct clk div4_clks[DIV4_NR] = {
+       [DIV4_I]        = SH_CLK_DIV4(&pllc1_clk, FRQCRA, 20, 0x6fff, CLK_ENABLE_ON_INIT),
+       [DIV4_ZG]       = SH_CLK_DIV4(&pllc1_clk, FRQCRA, 16, 0x6fff, CLK_ENABLE_ON_INIT),
+       [DIV4_B]        = SH_CLK_DIV4(&pllc1_clk, FRQCRA,  8, 0x6fff, CLK_ENABLE_ON_INIT),
+       [DIV4_M1]       = SH_CLK_DIV4(&pllc1_clk, FRQCRA,  4, 0x6fff, CLK_ENABLE_ON_INIT),
+       [DIV4_HP]       = SH_CLK_DIV4(&pllc1_clk, FRQCRB,  4, 0x6fff, 0),
+       [DIV4_HPP]      = SH_CLK_DIV4(&pllc1_clk, FRQCRC, 20, 0x6fff, 0),
+       [DIV4_S]        = SH_CLK_DIV4(&pllc1_clk, FRQCRC, 12, 0x6fff, 0),
+       [DIV4_ZB]       = SH_CLK_DIV4(&pllc1_clk, FRQCRC,  8, 0x6fff, 0),
+       [DIV4_M3]       = SH_CLK_DIV4(&pllc1_clk, FRQCRC,  4, 0x6fff, 0),
+       [DIV4_CP]       = SH_CLK_DIV4(&pllc1_clk, FRQCRC,  0, 0x6fff, 0),
+};
+
+enum {
+       DIV6_SUB,
+       DIV6_NR
+};
+
+static struct clk div6_clks[DIV6_NR] = {
+       [DIV6_SUB]      = SH_CLK_DIV6(&pllc1_div2_clk, SUBCKCR, 0),
+};
+
+enum {
+       MSTP125,
+       MSTP116, MSTP111, MSTP100, MSTP117,
+
+       MSTP230,
+       MSTP222,
+       MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
+
+       MSTP329, MSTP323,
+
+       MSTP_NR
+};
+
+static struct clk mstp_clks[MSTP_NR] = {
+       [MSTP125] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
+       [MSTP117] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   SMSTPCR1, 17, 0), /* LCDC1 */
+       [MSTP116] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */
+       [MSTP111] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 11, 0), /* TMU1 */
+       [MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   SMSTPCR1,  0, 0), /* LCDC0 */
+
+       [MSTP230] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 30, 0), /* SCIFA6 */
+       [MSTP222] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 22, 0), /* SCIFA7 */
+       [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  7, 0), /* SCIFA5 */
+       [MSTP206] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  6, 0), /* SCIFB */
+       [MSTP204] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  4, 0), /* SCIFA0 */
+       [MSTP203] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  3, 0), /* SCIFA1 */
+       [MSTP202] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  2, 0), /* SCIFA2 */
+       [MSTP201] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  1, 0), /* SCIFA3 */
+       [MSTP200] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  0, 0), /* SCIFA4 */
+
+       [MSTP329] = SH_CLK_MSTP32(&r_clk,               SMSTPCR3, 29, 0), /* CMT10 */
+       [MSTP323] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
+};
+
+static struct clk_lookup lookups[] = {
+       /* main clocks */
+       CLKDEV_CON_ID("extalr",                 &extalr_clk),
+       CLKDEV_CON_ID("extal1",                 &extal1_clk),
+       CLKDEV_CON_ID("extal2",                 &extal2_clk),
+       CLKDEV_CON_ID("extal1_div2",            &extal1_div2_clk),
+       CLKDEV_CON_ID("extal1_div1024",         &extal1_div1024_clk),
+       CLKDEV_CON_ID("extal1_div2048",         &extal1_div2048_clk),
+       CLKDEV_CON_ID("extal2_div2",            &extal2_div2_clk),
+       CLKDEV_CON_ID("dv_clk",                 &dv_clk),
+       CLKDEV_CON_ID("system_clk",             &system_clk),
+       CLKDEV_CON_ID("system_div2_clk",        &system_div2_clk),
+       CLKDEV_CON_ID("r_clk",                  &r_clk),
+       CLKDEV_CON_ID("pllc0_clk",              &pllc0_clk),
+       CLKDEV_CON_ID("pllc1_clk",              &pllc1_clk),
+       CLKDEV_CON_ID("pllc1_div2_clk",         &pllc1_div2_clk),
+
+       /* DIV4 clocks */
+       CLKDEV_CON_ID("i_clk",                  &div4_clks[DIV4_I]),
+       CLKDEV_CON_ID("zg_clk",                 &div4_clks[DIV4_ZG]),
+       CLKDEV_CON_ID("b_clk",                  &div4_clks[DIV4_B]),
+       CLKDEV_CON_ID("m1_clk",                 &div4_clks[DIV4_M1]),
+       CLKDEV_CON_ID("hp_clk",                 &div4_clks[DIV4_HP]),
+       CLKDEV_CON_ID("hpp_clk",                &div4_clks[DIV4_HPP]),
+       CLKDEV_CON_ID("s_clk",                  &div4_clks[DIV4_S]),
+       CLKDEV_CON_ID("zb_clk",                 &div4_clks[DIV4_ZB]),
+       CLKDEV_CON_ID("m3_clk",                 &div4_clks[DIV4_M3]),
+       CLKDEV_CON_ID("cp_clk",                 &div4_clks[DIV4_CP]),
+
+       /* DIV6 clocks */
+       CLKDEV_CON_ID("sub_clk",                &div6_clks[DIV6_SUB]),
+
+       /* MSTP32 clocks */
+       CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0",    &mstp_clks[MSTP100]),
+       CLKDEV_DEV_ID("sh_tmu.1",               &mstp_clks[MSTP111]),
+       CLKDEV_DEV_ID("i2c-sh_mobile.0",        &mstp_clks[MSTP116]),
+       CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1",    &mstp_clks[MSTP117]),
+       CLKDEV_DEV_ID("sh_tmu.0",               &mstp_clks[MSTP125]),
+
+       CLKDEV_DEV_ID("sh-sci.4",               &mstp_clks[MSTP200]),
+       CLKDEV_DEV_ID("sh-sci.3",               &mstp_clks[MSTP201]),
+       CLKDEV_DEV_ID("sh-sci.2",               &mstp_clks[MSTP202]),
+       CLKDEV_DEV_ID("sh-sci.1",               &mstp_clks[MSTP203]),
+       CLKDEV_DEV_ID("sh-sci.0",               &mstp_clks[MSTP204]),
+       CLKDEV_DEV_ID("sh-sci.8",               &mstp_clks[MSTP206]),
+       CLKDEV_DEV_ID("sh-sci.5",               &mstp_clks[MSTP207]),
+
+       CLKDEV_DEV_ID("sh-sci.7",               &mstp_clks[MSTP222]),
+       CLKDEV_DEV_ID("sh-sci.6",               &mstp_clks[MSTP230]),
+
+       CLKDEV_DEV_ID("sh_cmt.10",              &mstp_clks[MSTP329]),
+       CLKDEV_DEV_ID("i2c-sh_mobile.1",        &mstp_clks[MSTP323]),
+};
+
+void __init r8a7740_clock_init(u8 md_ck)
+{
+       int k, ret = 0;
+
+       /* detect system clock parent */
+       if (md_ck & MD_CK1)
+               system_clk.parent = &extal1_div2_clk;
+       else
+               system_clk.parent = &extal1_clk;
+
+       /* detect RCLK parent */
+       switch (md_ck & (MD_CK2 | MD_CK1)) {
+       case MD_CK2 | MD_CK1:
+               r_clk.parent = &extal1_div2048_clk;
+               break;
+       case MD_CK2:
+               r_clk.parent = &extal1_div1024_clk;
+               break;
+       case MD_CK1:
+       default:
+               r_clk.parent = &extalr_clk;
+               break;
+       }
+
+       for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
+               ret = clk_register(main_clks[k]);
+
+       if (!ret)
+               ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
+
+       if (!ret)
+               ret = sh_clk_div6_register(div6_clks, DIV6_NR);
+
+       if (!ret)
+               ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
+
+       clkdev_add_table(lookups, ARRAY_SIZE(lookups));
+
+       if (!ret)
+               clk_init();
+       else
+               panic("failed to setup r8a7740 clocks\n");
+}
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
new file mode 100644 (file)
index 0000000..b4b0e8c
--- /dev/null
@@ -0,0 +1,176 @@
+/*
+ * r8a7779 clock framework support
+ *
+ * Copyright (C) 2011  Renesas Solutions Corp.
+ * Copyright (C) 2011  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/sh_clk.h>
+#include <linux/clkdev.h>
+#include <mach/common.h>
+
+#define FRQMR   0xffc80014
+#define MSTPCR0 0xffc80030
+#define MSTPCR1 0xffc80034
+#define MSTPCR3 0xffc8003c
+#define MSTPSR1 0xffc80044
+#define MSTPSR4 0xffc80048
+#define MSTPSR6 0xffc8004c
+#define MSTPCR4 0xffc80050
+#define MSTPCR5 0xffc80054
+#define MSTPCR6 0xffc80058
+#define MSTPCR7 0xffc80040
+
+/* ioremap() through clock mapping mandatory to avoid
+ * collision with ARM coherent DMA virtual memory range.
+ */
+
+static struct clk_mapping cpg_mapping = {
+       .phys   = 0xffc80000,
+       .len    = 0x80,
+};
+
+/*
+ * Default rate for the root input clock, reset this with clk_set_rate()
+ * from the platform code.
+ */
+static struct clk plla_clk = {
+       .rate           = 1500000000,
+       .mapping        = &cpg_mapping,
+};
+
+static struct clk *main_clks[] = {
+       &plla_clk,
+};
+
+static int divisors[] = { 0, 0, 0, 6, 8, 12, 16, 0, 24, 32, 36, 0, 0, 0, 0, 0 };
+
+static struct clk_div_mult_table div4_div_mult_table = {
+       .divisors = divisors,
+       .nr_divisors = ARRAY_SIZE(divisors),
+};
+
+static struct clk_div4_table div4_table = {
+       .div_mult_table = &div4_div_mult_table,
+};
+
+enum { DIV4_S, DIV4_OUT, DIV4_S4, DIV4_S3, DIV4_S1, DIV4_P, DIV4_NR };
+
+static struct clk div4_clks[DIV4_NR] = {
+       [DIV4_S]        = SH_CLK_DIV4(&plla_clk, FRQMR, 20,
+                                     0x0018, CLK_ENABLE_ON_INIT),
+       [DIV4_OUT]      = SH_CLK_DIV4(&plla_clk, FRQMR, 16,
+                                     0x0700, CLK_ENABLE_ON_INIT),
+       [DIV4_S4]       = SH_CLK_DIV4(&plla_clk, FRQMR, 12,
+                                     0x0040, CLK_ENABLE_ON_INIT),
+       [DIV4_S3]       = SH_CLK_DIV4(&plla_clk, FRQMR, 8,
+                                     0x0010, CLK_ENABLE_ON_INIT),
+       [DIV4_S1]       = SH_CLK_DIV4(&plla_clk, FRQMR, 4,
+                                     0x0060, CLK_ENABLE_ON_INIT),
+       [DIV4_P]        = SH_CLK_DIV4(&plla_clk, FRQMR, 0,
+                                     0x0300, CLK_ENABLE_ON_INIT),
+};
+
+enum { MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
+       MSTP016, MSTP015, MSTP014,
+       MSTP_NR };
+
+static struct clk mstp_clks[MSTP_NR] = {
+       [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0), /* SCIF0 */
+       [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0), /* SCIF1 */
+       [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0), /* SCIF2 */
+       [MSTP023] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 23, 0), /* SCIF3 */
+       [MSTP022] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 22, 0), /* SCIF4 */
+       [MSTP021] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 21, 0), /* SCIF5 */
+       [MSTP016] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 16, 0), /* TMU0 */
+       [MSTP015] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0), /* TMU1 */
+       [MSTP014] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 14, 0), /* TMU2 */
+};
+
+static unsigned long mul4_recalc(struct clk *clk)
+{
+       return clk->parent->rate * 4;
+}
+
+static struct clk_ops mul4_clk_ops = {
+       .recalc         = mul4_recalc,
+};
+
+struct clk clkz_clk = {
+       .ops            = &mul4_clk_ops,
+       .parent         = &div4_clks[DIV4_S],
+};
+
+struct clk clkzs_clk = {
+       /* clks x 4 / 4 = clks */
+       .parent         = &div4_clks[DIV4_S],
+};
+
+static struct clk *late_main_clks[] = {
+       &clkz_clk,
+       &clkzs_clk,
+};
+
+static struct clk_lookup lookups[] = {
+       /* main clocks */
+       CLKDEV_CON_ID("plla_clk", &plla_clk),
+       CLKDEV_CON_ID("clkz_clk", &clkz_clk),
+       CLKDEV_CON_ID("clkzs_clk", &clkzs_clk),
+
+       /* DIV4 clocks */
+       CLKDEV_CON_ID("shyway_clk",     &div4_clks[DIV4_S]),
+       CLKDEV_CON_ID("bus_clk",        &div4_clks[DIV4_OUT]),
+       CLKDEV_CON_ID("shyway4_clk",    &div4_clks[DIV4_S4]),
+       CLKDEV_CON_ID("shyway3_clk",    &div4_clks[DIV4_S3]),
+       CLKDEV_CON_ID("shyway1_clk",    &div4_clks[DIV4_S1]),
+       CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
+
+       /* MSTP32 clocks */
+       CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
+       CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */
+       CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
+       CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
+       CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
+       CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */
+       CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
+       CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
+};
+
+void __init r8a7779_clock_init(void)
+{
+       int k, ret = 0;
+
+       for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
+               ret = clk_register(main_clks[k]);
+
+       if (!ret)
+               ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
+
+       if (!ret)
+               ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
+
+       for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
+               ret = clk_register(late_main_clks[k]);
+
+       clkdev_add_table(lookups, ARRAY_SIZE(lookups));
+
+       if (!ret)
+               clk_init();
+       else
+               panic("failed to setup r8a7779 clocks\n");
+}
index 995a9c3..e349c22 100644 (file)
@@ -411,11 +411,11 @@ static struct clk *fsibckcr_parent[] = {
 };
 
 static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
-       [DIV6_HDMI] = SH_CLK_DIV6_EXT(&pllc1_div2_clk, HDMICKCR, 0,
+       [DIV6_HDMI] = SH_CLK_DIV6_EXT(HDMICKCR, 0,
                                      hdmi_parent, ARRAY_SIZE(hdmi_parent), 6, 2),
-       [DIV6_FSIA] = SH_CLK_DIV6_EXT(&pllc1_div2_clk, FSIACKCR, 0,
+       [DIV6_FSIA] = SH_CLK_DIV6_EXT(FSIACKCR, 0,
                                      fsiackcr_parent, ARRAY_SIZE(fsiackcr_parent), 6, 2),
-       [DIV6_FSIB] = SH_CLK_DIV6_EXT(&pllc1_div2_clk, FSIBCKCR, 0,
+       [DIV6_FSIB] = SH_CLK_DIV6_EXT(FSIBCKCR, 0,
                                      fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2),
 };
 
index 1370a89..34944d0 100644 (file)
@@ -92,6 +92,24 @@ static struct clk_ops div2_clk_ops = {
        .recalc         = div2_recalc,
 };
 
+static unsigned long div7_recalc(struct clk *clk)
+{
+       return clk->parent->rate / 7;
+}
+
+static struct clk_ops div7_clk_ops = {
+       .recalc         = div7_recalc,
+};
+
+static unsigned long div13_recalc(struct clk *clk)
+{
+       return clk->parent->rate / 13;
+}
+
+static struct clk_ops div13_clk_ops = {
+       .recalc         = div13_recalc,
+};
+
 /* Divide extal1 by two */
 static struct clk extal1_div2_clk = {
        .ops            = &div2_clk_ops,
@@ -174,12 +192,29 @@ static struct clk pll3_clk = {
        .enable_bit     = 3,
 };
 
-/* Divide PLL1 by two */
+/* Divide PLL */
 static struct clk pll1_div2_clk = {
        .ops            = &div2_clk_ops,
        .parent         = &pll1_clk,
 };
 
+static struct clk pll1_div7_clk = {
+       .ops            = &div7_clk_ops,
+       .parent         = &pll1_clk,
+};
+
+static struct clk pll1_div13_clk = {
+       .ops            = &div13_clk_ops,
+       .parent         = &pll1_clk,
+};
+
+/* External input clock */
+struct clk sh73a0_extcki_clk = {
+};
+
+struct clk sh73a0_extalr_clk = {
+};
+
 static struct clk *main_clks[] = {
        &r_clk,
        &sh73a0_extal1_clk,
@@ -193,6 +228,10 @@ static struct clk *main_clks[] = {
        &pll2_clk,
        &pll3_clk,
        &pll1_div2_clk,
+       &pll1_div7_clk,
+       &pll1_div13_clk,
+       &sh73a0_extcki_clk,
+       &sh73a0_extalr_clk,
 };
 
 static void div4_kick(struct clk *clk)
@@ -246,27 +285,84 @@ enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_ZB1,
        DIV6_DSIT, DIV6_DSI0P, DIV6_DSI1P,
        DIV6_NR };
 
+static struct clk *vck_parent[8] = {
+       [0] = &pll1_div2_clk,
+       [1] = &pll2_clk,
+       [2] = &sh73a0_extcki_clk,
+       [3] = &sh73a0_extal2_clk,
+       [4] = &main_div2_clk,
+       [5] = &sh73a0_extalr_clk,
+       [6] = &main_clk,
+};
+
+static struct clk *pll_parent[4] = {
+       [0] = &pll1_div2_clk,
+       [1] = &pll2_clk,
+       [2] = &pll1_div13_clk,
+};
+
+static struct clk *hsi_parent[4] = {
+       [0] = &pll1_div2_clk,
+       [1] = &pll2_clk,
+       [2] = &pll1_div7_clk,
+};
+
+static struct clk *pll_extal2_parent[] = {
+       [0] = &pll1_div2_clk,
+       [1] = &pll2_clk,
+       [2] = &sh73a0_extal2_clk,
+       [3] = &sh73a0_extal2_clk,
+};
+
+static struct clk *dsi_parent[8] = {
+       [0] = &pll1_div2_clk,
+       [1] = &pll2_clk,
+       [2] = &main_clk,
+       [3] = &sh73a0_extal2_clk,
+       [4] = &sh73a0_extcki_clk,
+};
+
 static struct clk div6_clks[DIV6_NR] = {
-       [DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0),
-       [DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0),
-       [DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0),
-       [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, CLK_ENABLE_ON_INIT),
-       [DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0),
-       [DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0),
-       [DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0),
-       [DIV6_SDHI2] = SH_CLK_DIV6(&pll1_div2_clk, SD2CKCR, 0),
-       [DIV6_FSIA] = SH_CLK_DIV6(&pll1_div2_clk, FSIACKCR, 0),
-       [DIV6_FSIB] = SH_CLK_DIV6(&pll1_div2_clk, FSIBCKCR, 0),
-       [DIV6_SUB] = SH_CLK_DIV6(&sh73a0_extal2_clk, SUBCKCR, 0),
-       [DIV6_SPUA] = SH_CLK_DIV6(&pll1_div2_clk, SPUACKCR, 0),
-       [DIV6_SPUV] = SH_CLK_DIV6(&pll1_div2_clk, SPUVCKCR, 0),
-       [DIV6_MSU] = SH_CLK_DIV6(&pll1_div2_clk, MSUCKCR, 0),
-       [DIV6_HSI] = SH_CLK_DIV6(&pll1_div2_clk, HSICKCR, 0),
-       [DIV6_MFG1] = SH_CLK_DIV6(&pll1_div2_clk, MFCK1CR, 0),
-       [DIV6_MFG2] = SH_CLK_DIV6(&pll1_div2_clk, MFCK2CR, 0),
-       [DIV6_DSIT] = SH_CLK_DIV6(&pll1_div2_clk, DSITCKCR, 0),
-       [DIV6_DSI0P] = SH_CLK_DIV6(&pll1_div2_clk, DSI0PCKCR, 0),
-       [DIV6_DSI1P] = SH_CLK_DIV6(&pll1_div2_clk, DSI1PCKCR, 0),
+       [DIV6_VCK1] = SH_CLK_DIV6_EXT(VCLKCR1, 0,
+                       vck_parent, ARRAY_SIZE(vck_parent), 12, 3),
+       [DIV6_VCK2] = SH_CLK_DIV6_EXT(VCLKCR2, 0,
+                       vck_parent, ARRAY_SIZE(vck_parent), 12, 3),
+       [DIV6_VCK3] = SH_CLK_DIV6_EXT(VCLKCR3, 0,
+                       vck_parent, ARRAY_SIZE(vck_parent), 12, 3),
+       [DIV6_ZB1] = SH_CLK_DIV6_EXT(ZBCKCR, CLK_ENABLE_ON_INIT,
+                       pll_parent, ARRAY_SIZE(pll_parent), 7, 1),