ARM: tegra11x: flush L2 at entry of system suspend
Bo Yan [Wed, 31 Oct 2012 01:55:26 +0000 (18:55 -0700)]
since we are no longer flushing L2 cache in cpu_suspend, this has
to be done when we need to enter system suspend.

Change-Id: If84d1b4e8120e48aaea7fc850254ff71474a4399
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/160077
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

arch/arm/mach-tegra/sleep-t3.S

index b49d9eb..c675e91 100644 (file)
@@ -234,6 +234,11 @@ ENDPROC(tegra3_cpu_reset)
  * tegra3_tear_down_core in IRAM
  */
 ENTRY(tegra3_sleep_core_finish)
+#if defined(CONFIG_ARCH_TEGRA_11x_SOC)
+       mov     r4, r0
+       bl      tegra_flush_cache
+       mov     r0, r4
+#endif
        bl      tegra_cpu_exit_coherency
 
        /* preload all the address literals that are needed for the