ARM: SAMSUNG: Reduce size of struct clk.
Ben Dooks [Tue, 1 Dec 2009 01:24:37 +0000 (01:24 +0000)]
Reduce the size of struct clk by 12 bytes and make defining clocks with
common implementation functions easier by moving the set_rate, get_rate,
round_rate and set_parent calls into a new structure called 'struct clk_ops'
and using that instead.

This change does make a few clocks larger as they need their own clk_ops,
but this is outweighed by the number of clocks with either no ops or having
a common set of ops.

Update all the users of this.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>

13 files changed:
arch/arm/mach-s3c2412/clock.c
arch/arm/mach-s3c2440/clock.c
arch/arm/mach-s3c2442/clock.c
arch/arm/mach-s3c2443/clock.c
arch/arm/plat-s3c/clock.c
arch/arm/plat-s3c/pwm-clock.c
arch/arm/plat-s3c24xx/clock-dclk.c
arch/arm/plat-s3c24xx/s3c244x-clock.c
arch/arm/plat-s3c64xx/s3c6400-clock.c
arch/arm/plat-s5pc1xx/clock.c
arch/arm/plat-s5pc1xx/s5pc100-clock.c
arch/arm/plat-samsung/clock-clksrc.c
arch/arm/plat-samsung/include/plat/clock.h

index a037df5..0c0505b 100644 (file)
@@ -124,7 +124,9 @@ static struct clk clk_usysclk = {
        .name           = "usysclk",
        .id             = -1,
        .parent         = &clk_xtal,
-       .set_parent     = s3c2412_setparent_usysclk,
+       .ops            = &(struct clk_ops) {
+               .set_parent     = s3c2412_setparent_usysclk,
+       },
 };
 
 static struct clk clk_mrefclk = {
@@ -199,10 +201,12 @@ static int s3c2412_setrate_usbsrc(struct clk *clk, unsigned long rate)
 static struct clk clk_usbsrc = {
        .name           = "usbsrc",
        .id             = -1,
-       .get_rate       = s3c2412_getrate_usbsrc,
-       .set_rate       = s3c2412_setrate_usbsrc,
-       .round_rate     = s3c2412_roundrate_usbsrc,
-       .set_parent     = s3c2412_setparent_usbsrc,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s3c2412_getrate_usbsrc,
+               .set_rate       = s3c2412_setrate_usbsrc,
+               .round_rate     = s3c2412_roundrate_usbsrc,
+               .set_parent     = s3c2412_setparent_usbsrc,
+       },
 };
 
 static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent)
@@ -225,7 +229,9 @@ static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent)
 static struct clk clk_msysclk = {
        .name           = "msysclk",
        .id             = -1,
-       .set_parent     = s3c2412_setparent_msysclk,
+       .ops            = &(struct clk_ops) {
+               .set_parent     = s3c2412_setparent_msysclk,
+       },
 };
 
 static int s3c2412_setparent_armclk(struct clk *clk, struct clk *parent)
@@ -264,7 +270,9 @@ static struct clk clk_armclk = {
        .name           = "armclk",
        .id             = -1,
        .parent         = &clk_msysclk,
-       .set_parent     = s3c2412_setparent_armclk,
+       .ops            = &(struct clk_ops) {
+               .set_parent     = s3c2412_setparent_armclk,
+       },
 };
 
 /* these next clocks have an divider immediately after them,
@@ -337,10 +345,12 @@ static int s3c2412_setrate_uart(struct clk *clk, unsigned long rate)
 static struct clk clk_uart = {
        .name           = "uartclk",
        .id             = -1,
-       .get_rate       = s3c2412_getrate_uart,
-       .set_rate       = s3c2412_setrate_uart,
-       .set_parent     = s3c2412_setparent_uart,
-       .round_rate     = s3c2412_roundrate_clksrc,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s3c2412_getrate_uart,
+               .set_rate       = s3c2412_setrate_uart,
+               .set_parent     = s3c2412_setparent_uart,
+               .round_rate     = s3c2412_roundrate_clksrc,
+       },
 };
 
 static int s3c2412_setparent_i2s(struct clk *clk, struct clk *parent)
@@ -388,10 +398,12 @@ static int s3c2412_setrate_i2s(struct clk *clk, unsigned long rate)
 static struct clk clk_i2s = {
        .name           = "i2sclk",
        .id             = -1,
-       .get_rate       = s3c2412_getrate_i2s,
-       .set_rate       = s3c2412_setrate_i2s,
-       .set_parent     = s3c2412_setparent_i2s,
-       .round_rate     = s3c2412_roundrate_clksrc,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s3c2412_getrate_i2s,
+               .set_rate       = s3c2412_setrate_i2s,
+               .set_parent     = s3c2412_setparent_i2s,
+               .round_rate     = s3c2412_roundrate_clksrc,
+       },
 };
 
 static int s3c2412_setparent_cam(struct clk *clk, struct clk *parent)
@@ -438,10 +450,12 @@ static int s3c2412_setrate_cam(struct clk *clk, unsigned long rate)
 static struct clk clk_cam = {
        .name           = "camif-upll", /* same as 2440 name */
        .id             = -1,
-       .get_rate       = s3c2412_getrate_cam,
-       .set_rate       = s3c2412_setrate_cam,
-       .set_parent     = s3c2412_setparent_cam,
-       .round_rate     = s3c2412_roundrate_clksrc,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s3c2412_getrate_cam,
+               .set_rate       = s3c2412_setrate_cam,
+               .set_parent     = s3c2412_setparent_cam,
+               .round_rate     = s3c2412_roundrate_clksrc,
+       },
 };
 
 /* standard clock definitions */
index d1c29b2..3dc2426 100644 (file)
@@ -98,8 +98,10 @@ static struct clk s3c2440_clk_cam = {
 static struct clk s3c2440_clk_cam_upll = {
        .name           = "camif-upll",
        .id             = -1,
-       .set_rate       = s3c2440_camif_upll_setrate,
-       .round_rate     = s3c2440_camif_upll_round,
+       .ops            = &(struct clk_ops) {
+               .set_rate       = s3c2440_camif_upll_setrate,
+               .round_rate     = s3c2440_camif_upll_round,
+       },
 };
 
 static struct clk s3c2440_clk_ac97 = {
index ea1aa1f..d9b692a 100644 (file)
@@ -109,8 +109,10 @@ static struct clk s3c2442_clk_cam = {
 static struct clk s3c2442_clk_cam_upll = {
        .name           = "camif-upll",
        .id             = -1,
-       .set_rate       = s3c2442_camif_upll_setrate,
-       .round_rate     = s3c2442_camif_upll_round,
+       .ops            = &(struct clk_ops) {
+               .set_rate       = s3c2442_camif_upll_setrate,
+               .round_rate     = s3c2442_camif_upll_round,
+       },
 };
 
 static int s3c2442_clk_add(struct sys_device *sysdev)
index 2785d69..91db4f5 100644 (file)
@@ -187,7 +187,9 @@ static int s3c2443_setparent_epllref(struct clk *clk, struct clk *parent)
 static struct clk clk_epllref = {
        .name           = "epllref",
        .id             = -1,
-       .set_parent     = s3c2443_setparent_epllref,
+       .ops            = &(struct clk_ops) {
+               .set_parent     = s3c2443_setparent_epllref,
+       },
 };
 
 static unsigned long s3c2443_getrate_mdivclk(struct clk *clk)
@@ -205,7 +207,9 @@ static struct clk clk_mdivclk = {
        .name           = "mdivclk",
        .parent         = &clk_mpllref,
        .id             = -1,
-       .get_rate       = s3c2443_getrate_mdivclk,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s3c2443_getrate_mdivclk,
+       },
 };
 
 static int s3c2443_setparent_msysclk(struct clk *clk, struct clk *parent)
@@ -232,7 +236,9 @@ static struct clk clk_msysclk = {
        .name           = "msysclk",
        .parent         = &clk_xtal,
        .id             = -1,
-       .set_parent     = s3c2443_setparent_msysclk,
+       .ops            = &(struct clk_ops) {
+               .set_parent     = s3c2443_setparent_msysclk,
+       },
 };
 
 /* armdiv
@@ -273,7 +279,9 @@ static int s3c2443_setparent_armclk(struct clk *clk, struct clk *parent)
 static struct clk clk_arm = {
        .name           = "armclk",
        .id             = -1,
-       .set_parent     = s3c2443_setparent_armclk,
+       .ops            = &(struct clk_ops) {
+               .set_parent     = s3c2443_setparent_armclk,
+       },
 };
 
 /* esysclk
@@ -302,7 +310,9 @@ static struct clk clk_esysclk = {
        .name           = "esysclk",
        .parent         = &clk_epll,
        .id             = -1,
-       .set_parent     = s3c2443_setparent_esysclk,
+       .ops            = &(struct clk_ops) {
+               .set_parent     = s3c2443_setparent_esysclk,
+       },
 };
 
 /* uartclk
@@ -341,9 +351,11 @@ static struct clk clk_uart = {
        .name           = "uartclk",
        .id             = -1,
        .parent         = &clk_esysclk,
-       .get_rate       = s3c2443_getrate_uart,
-       .set_rate       = s3c2443_setrate_uart,
-       .round_rate     = s3c2443_roundrate_clksrc16,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s3c2443_getrate_uart,
+               .set_rate       = s3c2443_setrate_uart,
+               .round_rate     = s3c2443_roundrate_clksrc16,
+       },
 };
 
 /* hsspi
@@ -384,9 +396,11 @@ static struct clk clk_hsspi = {
        .parent         = &clk_esysclk,
        .ctrlbit        = S3C2443_SCLKCON_HSSPICLK,
        .enable         = s3c2443_clkcon_enable_s,
-       .get_rate       = s3c2443_getrate_hsspi,
-       .set_rate       = s3c2443_setrate_hsspi,
-       .round_rate     = s3c2443_roundrate_clksrc4,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s3c2443_getrate_hsspi,
+               .set_rate       = s3c2443_setrate_hsspi,
+               .round_rate     = s3c2443_roundrate_clksrc4,
+       },
 };
 
 /* usbhost
@@ -426,9 +440,11 @@ static struct clk clk_usb_bus_host = {
        .parent         = &clk_esysclk,
        .ctrlbit        = S3C2443_SCLKCON_USBHOST,
        .enable         = s3c2443_clkcon_enable_s,
-       .get_rate       = s3c2443_getrate_usbhost,
-       .set_rate       = s3c2443_setrate_usbhost,
-       .round_rate     = s3c2443_roundrate_clksrc4,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s3c2443_getrate_usbhost,
+               .set_rate       = s3c2443_setrate_usbhost,
+               .round_rate     = s3c2443_roundrate_clksrc4,
+       },
 };
 
 /* clk_hsmcc_div
@@ -468,9 +484,11 @@ static struct clk clk_hsmmc_div = {
        .name           = "hsmmc-div",
        .id             = -1,
        .parent         = &clk_esysclk,
-       .get_rate       = s3c2443_getrate_hsmmc_div,
-       .set_rate       = s3c2443_setrate_hsmmc_div,
-       .round_rate     = s3c2443_roundrate_clksrc4,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s3c2443_getrate_hsmmc_div,
+               .set_rate       = s3c2443_setrate_hsmmc_div,
+               .round_rate     = s3c2443_roundrate_clksrc4,
+       },
 };
 
 static int s3c2443_setparent_hsmmc(struct clk *clk, struct clk *parent)
@@ -505,7 +523,9 @@ static struct clk clk_hsmmc = {
        .id             = -1,
        .parent         = &clk_hsmmc_div,
        .enable         = s3c2443_enable_hsmmc,
-       .set_parent     = s3c2443_setparent_hsmmc,
+       .ops            = &(struct clk_ops) {
+               .set_parent     = s3c2443_setparent_hsmmc,
+       },
 };
 
 /* i2s_eplldiv
@@ -543,9 +563,11 @@ static struct clk clk_i2s_eplldiv = {
        .name           = "i2s-eplldiv",
        .id             = -1,
        .parent         = &clk_esysclk,
-       .get_rate       = s3c2443_getrate_i2s_eplldiv,
-       .set_rate       = s3c2443_setrate_i2s_eplldiv,
-       .round_rate     = s3c2443_roundrate_clksrc16,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s3c2443_getrate_i2s_eplldiv,
+               .set_rate       = s3c2443_setrate_i2s_eplldiv,
+               .round_rate     = s3c2443_roundrate_clksrc16,
+       },
 };
 
 /* i2s-ref
@@ -578,7 +600,9 @@ static struct clk clk_i2s = {
        .parent         = &clk_i2s_eplldiv,
        .ctrlbit        = S3C2443_SCLKCON_I2SCLK,
        .enable         = s3c2443_clkcon_enable_s,
-       .set_parent     = s3c2443_setparent_i2s,
+       .ops            = &(struct clk_ops) {
+               .set_parent     = s3c2443_setparent_i2s,
+       },
 };
 
 /* cam-if
@@ -618,9 +642,11 @@ static struct clk clk_cam = {
        .parent         = &clk_esysclk,
        .ctrlbit        = S3C2443_SCLKCON_CAMCLK,
        .enable         = s3c2443_clkcon_enable_s,
-       .get_rate       = s3c2443_getrate_cam,
-       .set_rate       = s3c2443_setrate_cam,
-       .round_rate     = s3c2443_roundrate_clksrc16,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s3c2443_getrate_cam,
+               .set_rate       = s3c2443_setrate_cam,
+               .round_rate     = s3c2443_roundrate_clksrc16,
+       },
 };
 
 /* display-if
@@ -660,9 +686,11 @@ static struct clk clk_display = {
        .parent         = &clk_esysclk,
        .ctrlbit        = S3C2443_SCLKCON_DISPCLK,
        .enable         = s3c2443_clkcon_enable_s,
-       .get_rate       = s3c2443_getrate_display,
-       .set_rate       = s3c2443_setrate_display,
-       .round_rate     = s3c2443_roundrate_clksrc256,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s3c2443_getrate_display,
+               .set_rate       = s3c2443_setrate_display,
+               .round_rate     = s3c2443_roundrate_clksrc256,
+       },
 };
 
 /* prediv
@@ -685,7 +713,9 @@ static struct clk clk_prediv = {
        .name           = "prediv",
        .id             = -1,
        .parent         = &clk_msysclk,
-       .get_rate       = s3c2443_prediv_getrate,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s3c2443_prediv_getrate,
+       },
 };
 
 /* standard clock definitions */
index 619cfa8..fa91125 100644 (file)
@@ -150,8 +150,8 @@ unsigned long clk_get_rate(struct clk *clk)
        if (clk->rate != 0)
                return clk->rate;
 
-       if (clk->get_rate != NULL)
-               return (clk->get_rate)(clk);
+       if (clk->ops != NULL && clk->ops->get_rate != NULL)
+               return (clk->ops->get_rate)(clk);
 
        if (clk->parent != NULL)
                return clk_get_rate(clk->parent);
@@ -161,8 +161,8 @@ unsigned long clk_get_rate(struct clk *clk)
 
 long clk_round_rate(struct clk *clk, unsigned long rate)
 {
-       if (!IS_ERR(clk) && clk->round_rate)
-               return (clk->round_rate)(clk, rate);
+       if (!IS_ERR(clk) && clk->ops && clk->ops->round_rate)
+               return (clk->ops->round_rate)(clk, rate);
 
        return rate;
 }
@@ -178,13 +178,14 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
         * the clock may have been made this way by choice.
         */
 
-       WARN_ON(clk->set_rate == NULL);
+       WARN_ON(clk->ops == NULL);
+       WARN_ON(clk->ops && clk->ops->set_rate == NULL);
 
-       if (clk->set_rate == NULL)
+       if (clk->ops == NULL || clk->ops->set_rate == NULL)
                return -EINVAL;
 
        spin_lock(&clocks_lock);
-       ret = (clk->set_rate)(clk, rate);
+       ret = (clk->ops->set_rate)(clk, rate);
        spin_unlock(&clocks_lock);
 
        return ret;
@@ -204,8 +205,8 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
 
        spin_lock(&clocks_lock);
 
-       if (clk->set_parent)
-               ret = (clk->set_parent)(clk, parent);
+       if (clk->ops && clk->ops->set_parent)
+               ret = (clk->ops->set_parent)(clk, parent);
 
        spin_unlock(&clocks_lock);
 
@@ -230,6 +231,10 @@ static int clk_default_setrate(struct clk *clk, unsigned long rate)
        return 0;
 }
 
+static struct clk_ops clk_ops_def_setrate = {
+       .set_rate       = clk_default_setrate,
+};
+
 struct clk clk_xtal = {
        .name           = "xtal",
        .id             = -1,
@@ -251,7 +256,7 @@ struct clk clk_epll = {
 struct clk clk_mpll = {
        .name           = "mpll",
        .id             = -1,
-       .set_rate       = clk_default_setrate,
+       .ops            = &clk_ops_def_setrate,
 };
 
 struct clk clk_upll = {
@@ -267,7 +272,6 @@ struct clk clk_f = {
        .rate           = 0,
        .parent         = &clk_mpll,
        .ctrlbit        = 0,
-       .set_rate       = clk_default_setrate,
 };
 
 struct clk clk_h = {
@@ -276,7 +280,7 @@ struct clk clk_h = {
        .rate           = 0,
        .parent         = NULL,
        .ctrlbit        = 0,
-       .set_rate       = clk_default_setrate,
+       .ops            = &clk_ops_def_setrate,
 };
 
 struct clk clk_p = {
@@ -285,7 +289,7 @@ struct clk clk_p = {
        .rate           = 0,
        .parent         = NULL,
        .ctrlbit        = 0,
-       .set_rate       = clk_default_setrate,
+       .ops            = &clk_ops_def_setrate,
 };
 
 struct clk clk_usb_bus = {
@@ -296,7 +300,6 @@ struct clk clk_usb_bus = {
 };
 
 
-
 struct clk s3c24xx_uclk = {
        .name           = "uclk",
        .id             = -1,
index a318215..1808fa8 100644 (file)
@@ -130,20 +130,22 @@ static int clk_pwm_scaler_set_rate(struct clk *clk, unsigned long rate)
        return 0;
 }
 
+static struct clk_ops clk_pwm_scaler_ops = {
+       .get_rate       = clk_pwm_scaler_get_rate,
+       .set_rate       = clk_pwm_scaler_set_rate,
+       .round_rate     = clk_pwm_scaler_round_rate,
+};
+
 static struct clk clk_timer_scaler[] = {
        [0]     = {
                .name           = "pwm-scaler0",
                .id             = -1,
-               .get_rate       = clk_pwm_scaler_get_rate,
-               .set_rate       = clk_pwm_scaler_set_rate,
-               .round_rate     = clk_pwm_scaler_round_rate,
+               .ops            = &clk_pwm_scaler_ops,
        },
        [1]     = {
                .name           = "pwm-scaler1",
                .id             = -1,
-               .get_rate       = clk_pwm_scaler_get_rate,
-               .set_rate       = clk_pwm_scaler_set_rate,
-               .round_rate     = clk_pwm_scaler_round_rate,
+               .ops            = &clk_pwm_scaler_ops,
        },
 };
 
@@ -256,50 +258,46 @@ static int clk_pwm_tdiv_set_rate(struct clk *clk, unsigned long rate)
        return 0;
 }
 
+static struct clk_ops clk_tdiv_ops = {
+       .get_rate       = clk_pwm_tdiv_get_rate,
+       .set_rate       = clk_pwm_tdiv_set_rate,
+       .round_rate     = clk_pwm_tdiv_round_rate,
+};
+
 static struct pwm_tdiv_clk clk_timer_tdiv[] = {
        [0]     = {
                .clk    = {
-                       .name           = "pwm-tdiv",
-                       .parent         = &clk_timer_scaler[0],
-                       .get_rate       = clk_pwm_tdiv_get_rate,
-                       .set_rate       = clk_pwm_tdiv_set_rate,
-                       .round_rate     = clk_pwm_tdiv_round_rate,
+                       .name   = "pwm-tdiv",
+                       .ops    = &clk_tdiv_ops,
+                       .parent = &clk_timer_scaler[0],
                },
        },
        [1]     = {
                .clk    = {
-                       .name           = "pwm-tdiv",
-                       .parent         = &clk_timer_scaler[0],
-                       .get_rate       = clk_pwm_tdiv_get_rate,
-                       .set_rate       = clk_pwm_tdiv_set_rate,
-                       .round_rate     = clk_pwm_tdiv_round_rate,
+                       .name   = "pwm-tdiv",
+                       .ops    = &clk_tdiv_ops,
+                       .parent = &clk_timer_scaler[0],
                }
        },
        [2]     = {
                .clk    = {
-                       .name           = "pwm-tdiv",
-                       .parent         = &clk_timer_scaler[1],
-                       .get_rate       = clk_pwm_tdiv_get_rate,
-                       .set_rate       = clk_pwm_tdiv_set_rate,
-                       .round_rate     = clk_pwm_tdiv_round_rate,
+                       .name   = "pwm-tdiv",
+                       .ops    = &clk_tdiv_ops,
+                       .parent = &clk_timer_scaler[1],
                },
        },
        [3]     = {
                .clk    = {
-                       .name           = "pwm-tdiv",
-                       .parent         = &clk_timer_scaler[1],
-                       .get_rate       = clk_pwm_tdiv_get_rate,
-                       .set_rate       = clk_pwm_tdiv_set_rate,
-                       .round_rate     = clk_pwm_tdiv_round_rate,
+                       .name   = "pwm-tdiv",
+                       .ops    = &clk_tdiv_ops,
+                       .parent = &clk_timer_scaler[1],
                },
        },
        [4]     = {
                .clk    = {
-                       .name           = "pwm-tdiv",
-                       .parent         = &clk_timer_scaler[1],
-                       .get_rate       = clk_pwm_tdiv_get_rate,
-                       .set_rate       = clk_pwm_tdiv_set_rate,
-                       .round_rate     = clk_pwm_tdiv_round_rate,
+                       .name   = "pwm-tdiv",
+                       .ops    = &clk_tdiv_ops,
+                       .parent = &clk_timer_scaler[1],
                },
        },
 };
@@ -356,31 +354,35 @@ static int clk_pwm_tin_set_parent(struct clk *clk, struct clk *parent)
        return 0;
 }
 
+static struct clk_ops clk_tin_ops = {
+       .set_parent     = clk_pwm_tin_set_parent,
+};
+
 static struct clk clk_tin[] = {
        [0]     = {
-               .name           = "pwm-tin",
-               .id             = 0,
-               .set_parent     = clk_pwm_tin_set_parent,
+               .name   = "pwm-tin",
+               .id     = 0,
+               .ops    = &clk_tin_ops,
        },
        [1]     = {
-               .name           = "pwm-tin",
-               .id             = 1,
-               .set_parent     = clk_pwm_tin_set_parent,
+               .name   = "pwm-tin",
+               .id     = 1,
+               .ops    = &clk_tin_ops,
        },
        [2]     = {
-               .name           = "pwm-tin",
-               .id             = 2,
-               .set_parent     = clk_pwm_tin_set_parent,
+               .name   = "pwm-tin",
+               .id     = 2,
+               .ops    = &clk_tin_ops,
        },
        [3]     = {
-               .name           = "pwm-tin",
-               .id             = 3,
-               .set_parent     = clk_pwm_tin_set_parent,
+               .name   = "pwm-tin",
+               .id     = 3,
+               .ops    = &clk_tin_ops,
        },
        [4]     = {
-               .name           = "pwm-tin",
-               .id             = 4,
-               .set_parent     = clk_pwm_tin_set_parent,
+               .name   = "pwm-tin",
+               .id     = 4,
+               .ops    = &clk_tin_ops,
        },
 };
 
index ac061a1..cf97caa 100644 (file)
@@ -161,14 +161,18 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent)
 
 /* external clock definitions */
 
+static struct clk_ops dclk_ops = {
+       .set_parent     = s3c24xx_dclk_setparent,
+       .set_rate       = s3c24xx_set_dclk_rate,
+       .round_rate     = s3c24xx_round_dclk_rate,
+};
+
 struct clk s3c24xx_dclk0 = {
        .name           = "dclk0",
        .id             = -1,
        .ctrlbit        = S3C2410_DCLKCON_DCLK0EN,
        .enable         = s3c24xx_dclk_enable,
-       .set_parent     = s3c24xx_dclk_setparent,
-       .set_rate       = s3c24xx_set_dclk_rate,
-       .round_rate     = s3c24xx_round_dclk_rate,
+       .ops            = &dclk_ops,
 };
 
 struct clk s3c24xx_dclk1 = {
@@ -176,19 +180,21 @@ struct clk s3c24xx_dclk1 = {
        .id             = -1,
        .ctrlbit        = S3C2410_DCLKCON_DCLK1EN,
        .enable         = s3c24xx_dclk_enable,
-       .set_parent     = s3c24xx_dclk_setparent,
-       .set_rate       = s3c24xx_set_dclk_rate,
-       .round_rate     = s3c24xx_round_dclk_rate,
+       .ops            = &dclk_ops,
+};
+
+static struct clk_ops clkout_ops = {
+       .set_parent     = s3c24xx_clkout_setparent,
 };
 
 struct clk s3c24xx_clkout0 = {
        .name           = "clkout0",
        .id             = -1,
-       .set_parent     = s3c24xx_clkout_setparent,
+       .ops            = &clkout_ops,
 };
 
 struct clk s3c24xx_clkout1 = {
        .name           = "clkout1",
        .id             = -1,
-       .set_parent     = s3c24xx_clkout_setparent,
+       .ops            = &clkout_ops,
 };
index 7937109..f8d9613 100644 (file)
@@ -68,7 +68,9 @@ static int s3c2440_setparent_armclk(struct clk *clk, struct clk *parent)
 static struct clk clk_arm = {
        .name           = "armclk",
        .id             = -1,
-       .set_parent     = s3c2440_setparent_armclk,
+       .ops            = &(struct clk_ops) {
+               .set_parent     = s3c2440_setparent_armclk,
+       },
 };
 
 static int s3c244x_clk_add(struct sys_device *sysdev)
index 20af0c2..f85406a 100644 (file)
@@ -165,9 +165,11 @@ static struct clk clk_arm = {
        .name           = "armclk",
        .id             = -1,
        .parent         = &clk_mout_apll.clk,
-       .get_rate       = s3c64xx_clk_arm_get_rate,
-       .set_rate       = s3c64xx_clk_arm_set_rate,
-       .round_rate     = s3c64xx_clk_arm_round_rate,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s3c64xx_clk_arm_get_rate,
+               .set_rate       = s3c64xx_clk_arm_set_rate,
+               .round_rate     = s3c64xx_clk_arm_round_rate,
+       },
 };
 
 static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk)
@@ -182,11 +184,15 @@ static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk)
        return rate;
 }
 
+static struct clk_ops clk_dout_ops = {
+       .get_rate       = s3c64xx_clk_doutmpll_get_rate,
+};
+
 static struct clk clk_dout_mpll = {
        .name           = "dout_mpll",
        .id             = -1,
        .parent         = &clk_mout_mpll.clk,
-       .get_rate       = s3c64xx_clk_doutmpll_get_rate,
+       .ops            = &clk_dout_ops,
 };
 
 static struct clk *clkset_spi_mmc_list[] = {
index 26c21d8..2f4d8d4 100644 (file)
@@ -70,6 +70,10 @@ static int clk_default_setrate(struct clk *clk, unsigned long rate)
        return 0;
 }
 
+static struct clk_ops clk_ops_default_setrate = {
+       .set_rate       = clk_default_setrate,
+};
+
 static int clk_dummy_enable(struct clk *clk, int enable)
 {
        return 0;
@@ -81,8 +85,8 @@ struct clk clk_hd0 = {
        .rate           = 0,
        .parent         = NULL,
        .ctrlbit        = 0,
-       .set_rate       = clk_default_setrate,
        .enable         = clk_dummy_enable,
+       .ops            = &clk_ops_default_setrate,
 };
 
 struct clk clk_pd0 = {
@@ -91,7 +95,7 @@ struct clk clk_pd0 = {
        .rate           = 0,
        .parent         = NULL,
        .ctrlbit        = 0,
-       .set_rate       = clk_default_setrate,
+       .ops            = &clk_ops_default_setrate,
        .enable         = clk_dummy_enable,
 };
 
index b436d44..16f0b90 100644 (file)
@@ -111,7 +111,9 @@ static struct clk clk_dout_apll = {
        .name           = "dout_apll",
        .id             = -1,
        .parent         = &clk_mout_apll.clk,
-       .get_rate       = s5pc100_clk_dout_apll_get_rate,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s5pc100_clk_dout_apll_get_rate,
+       },
 };
 
 static unsigned long s5pc100_clk_arm_get_rate(struct clk *clk)
@@ -165,9 +167,11 @@ static struct clk clk_arm = {
        .name           = "armclk",
        .id             = -1,
        .parent         = &clk_dout_apll,
-       .get_rate       = s5pc100_clk_arm_get_rate,
-       .set_rate       = s5pc100_clk_arm_set_rate,
-       .round_rate     = s5pc100_clk_arm_round_rate,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s5pc100_clk_arm_get_rate,
+               .set_rate       = s5pc100_clk_arm_set_rate,
+               .round_rate     = s5pc100_clk_arm_round_rate,
+       },
 };
 
 static unsigned long s5pc100_clk_dout_d0_bus_get_rate(struct clk *clk)
@@ -185,7 +189,9 @@ static struct clk clk_dout_d0_bus = {
        .name           = "dout_d0_bus",
        .id             = -1,
        .parent         = &clk_arm,
-       .get_rate       = s5pc100_clk_dout_d0_bus_get_rate,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s5pc100_clk_dout_d0_bus_get_rate,
+       },
 };
 
 static unsigned long s5pc100_clk_dout_pclkd0_get_rate(struct clk *clk)
@@ -203,7 +209,9 @@ static struct clk clk_dout_pclkd0 = {
        .name           = "dout_pclkd0",
        .id             = -1,
        .parent         = &clk_dout_d0_bus,
-       .get_rate       = s5pc100_clk_dout_pclkd0_get_rate,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s5pc100_clk_dout_pclkd0_get_rate,
+       },
 };
 
 static unsigned long s5pc100_clk_dout_apll2_get_rate(struct clk *clk)
@@ -221,7 +229,9 @@ static struct clk clk_dout_apll2 = {
        .name           = "dout_apll2",
        .id             = -1,
        .parent         = &clk_mout_apll.clk,
-       .get_rate       = s5pc100_clk_dout_apll2_get_rate,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s5pc100_clk_dout_apll2_get_rate,
+       },
 };
 
 /* MPLL */
@@ -284,7 +294,9 @@ static struct clk clk_dout_d1_bus = {
        .name           = "dout_d1_bus",
        .id             = -1,
        .parent         = &clk_mout_am.clk,
-       .get_rate       = s5pc100_clk_dout_d1_bus_get_rate,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s5pc100_clk_dout_d1_bus_get_rate,
+       },
 };
 
 static struct clk *clkset_onenand_list[] = {
@@ -325,7 +337,9 @@ static struct clk clk_dout_pclkd1 = {
        .name           = "dout_pclkd1",
        .id             = -1,
        .parent         = &clk_dout_d1_bus,
-       .get_rate       = s5pc100_clk_dout_pclkd1_get_rate,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s5pc100_clk_dout_pclkd1_get_rate,
+       },
 };
 
 static unsigned long s5pc100_clk_dout_mpll2_get_rate(struct clk *clk)
@@ -345,7 +359,9 @@ static struct clk clk_dout_mpll2 = {
        .name           = "dout_mpll2",
        .id             = -1,
        .parent         = &clk_mout_am.clk,
-       .get_rate       = s5pc100_clk_dout_mpll2_get_rate,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s5pc100_clk_dout_mpll2_get_rate,
+       },
 };
 
 static unsigned long s5pc100_clk_dout_cam_get_rate(struct clk *clk)
@@ -365,7 +381,9 @@ static struct clk clk_dout_cam = {
        .name           = "dout_cam",
        .id             = -1,
        .parent         = &clk_dout_mpll2,
-       .get_rate       = s5pc100_clk_dout_cam_get_rate,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s5pc100_clk_dout_cam_get_rate,
+       },
 };
 
 static unsigned long s5pc100_clk_dout_mpll_get_rate(struct clk *clk)
@@ -385,7 +403,9 @@ static struct clk clk_dout_mpll = {
        .name           = "dout_mpll",
        .id             = -1,
        .parent         = &clk_mout_am.clk,
-       .get_rate       = s5pc100_clk_dout_mpll_get_rate,
+       .ops            = &(struct clk_ops) {
+               .get_rate       = s5pc100_clk_dout_mpll_get_rate,
+       },
 };
 
 /* EPLL */
@@ -540,6 +560,13 @@ static unsigned long s5pc100_roundrate_clksrc(struct clk *clk,
        return rate;
 }
 
+static struct clk_ops s5pc100_clksrc_ops = {
+       .set_parent     = s5pc100_setparent_clksrc,
+       .get_rate       = s5pc100_getrate_clksrc,
+       .set_rate       = s5pc100_setrate_clksrc,
+       .round_rate     = s5pc100_roundrate_clksrc,
+};
+
 static struct clk *clkset_spi_list[] = {
        &clk_mout_epll.clk,
        &clk_dout_mpll2,
@@ -558,10 +585,7 @@ static struct clksrc_clk clk_spi0 = {
                .id             = 0,
                .ctrlbit        = S5PC100_CLKGATE_SCLK0_SPI0,
                .enable         = s5pc100_sclk0_ctrl,
-               .set_parent     = s5pc100_setparent_clksrc,
-               .get_rate       = s5pc100_getrate_clksrc,
-               .set_rate       = s5pc100_setrate_clksrc,
-               .round_rate     = s5pc100_roundrate_clksrc,
+
        },
        .shift          = S5PC100_CLKSRC1_SPI0_SHIFT,
        .mask           = S5PC100_CLKSRC1_SPI0_MASK,
@@ -577,10 +601,7 @@ static struct clksrc_clk clk_spi1 = {
                .id             = 1,
                .ctrlbit        = S5PC100_CLKGATE_SCLK0_SPI1,
                .enable         = s5pc100_sclk0_ctrl,
-               .set_parent     = s5pc100_setparent_clksrc,
-               .get_rate       = s5pc100_getrate_clksrc,
-               .set_rate       = s5pc100_setrate_clksrc,
-               .round_rate     = s5pc100_roundrate_clksrc,
+               .ops            = &s5pc100_clksrc_ops,
        },
        .shift          = S5PC100_CLKSRC1_SPI1_SHIFT,
        .mask           = S5PC100_CLKSRC1_SPI1_MASK,
@@ -596,10 +617,7 @@ static struct clksrc_clk clk_spi2 = {
                .id             = 2,
                .ctrlbit        = S5PC100_CLKGATE_SCLK0_SPI2,
                .enable         = s5pc100_sclk0_ctrl,
-               .set_parent     = s5pc100_setparent_clksrc,
-               .get_rate       = s5pc100_getrate_clksrc,
-               .set_rate       = s5pc100_setrate_clksrc,
-               .round_rate     = s5pc100_roundrate_clksrc,
+               .ops            = &s5pc100_clksrc_ops,
        },
        .shift          = S5PC100_CLKSRC1_SPI2_SHIFT,
        .mask           = S5PC100_CLKSRC1_SPI2_MASK,
@@ -625,10 +643,7 @@ static struct clksrc_clk clk_uart_uclk1 = {
                .id             = -1,
                .ctrlbit        = S5PC100_CLKGATE_SCLK0_UART,
                .enable         = s5pc100_sclk0_ctrl,
-               .set_parent     = s5pc100_setparent_clksrc,
-               .get_rate       = s5pc100_getrate_clksrc,
-               .set_rate       = s5pc100_setrate_clksrc,
-               .round_rate     = s5pc100_roundrate_clksrc,
+               .ops            = &s5pc100_clksrc_ops,
        },
        .shift          = S5PC100_CLKSRC1_UART_SHIFT,
        .mask           = S5PC100_CLKSRC1_UART_MASK,
@@ -683,10 +698,7 @@ static struct clksrc_clk clk_audio0 = {
                .id             = 0,
                .ctrlbit        = S5PC100_CLKGATE_SCLK1_AUDIO0,
                .enable         = s5pc100_sclk1_ctrl,
-               .set_parent     = s5pc100_setparent_clksrc,
-               .get_rate       = s5pc100_getrate_clksrc,
-               .set_rate       = s5pc100_setrate_clksrc,
-               .round_rate     = s5pc100_roundrate_clksrc,
+               .ops            = &s5pc100_clksrc_ops,
        },
        .shift          = S5PC100_CLKSRC3_AUDIO0_SHIFT,
        .mask           = S5PC100_CLKSRC3_AUDIO0_MASK,
@@ -716,10 +728,7 @@ static struct clksrc_clk clk_audio1 = {
                .id             = 1,
                .ctrlbit        = S5PC100_CLKGATE_SCLK1_AUDIO1,
                .enable         = s5pc100_sclk1_ctrl,
-               .set_parent     = s5pc100_setparent_clksrc,
-               .get_rate       = s5pc100_getrate_clksrc,
-               .set_rate       = s5pc100_setrate_clksrc,
-               .round_rate     = s5pc100_roundrate_clksrc,
+               .ops            = &s5pc100_clksrc_ops,
        },
        .shift          = S5PC100_CLKSRC3_AUDIO1_SHIFT,
        .mask           = S5PC100_CLKSRC3_AUDIO1_MASK,
@@ -748,10 +757,7 @@ static struct clksrc_clk clk_audio2 = {
                .id             = 2,
                .ctrlbit        = S5PC100_CLKGATE_SCLK1_AUDIO2,
                .enable         = s5pc100_sclk1_ctrl,
-               .set_parent     = s5pc100_setparent_clksrc,
-               .get_rate       = s5pc100_getrate_clksrc,
-               .set_rate       = s5pc100_setrate_clksrc,
-               .round_rate     = s5pc100_roundrate_clksrc,
+               .ops            = &s5pc100_clksrc_ops,
        },
        .shift          = S5PC100_CLKSRC3_AUDIO2_SHIFT,
        .mask           = S5PC100_CLKSRC3_AUDIO2_MASK,
@@ -801,10 +807,7 @@ static struct clksrc_clk clk_lcd = {
                .id             = -1,
                .ctrlbit        = S5PC100_CLKGATE_SCLK1_LCD,
                .enable         = s5pc100_sclk1_ctrl,
-               .set_parent     = s5pc100_setparent_clksrc,
-               .get_rate       = s5pc100_getrate_clksrc,
-               .set_rate       = s5pc100_setrate_clksrc,
-               .round_rate     = s5pc100_roundrate_clksrc,
+               .ops            = &s5pc100_clksrc_ops,
        },
        .shift          = S5PC100_CLKSRC2_LCD_SHIFT,
        .mask           = S5PC100_CLKSRC2_LCD_MASK,
@@ -820,10 +823,7 @@ static struct clksrc_clk clk_fimc0 = {
                .id             = 0,
                .ctrlbit        = S5PC100_CLKGATE_SCLK1_FIMC0,
                .enable         = s5pc100_sclk1_ctrl,
-               .set_parent     = s5pc100_setparent_clksrc,
-               .get_rate       = s5pc100_getrate_clksrc,
-               .set_rate       = s5pc100_setrate_clksrc,
-               .round_rate     = s5pc100_roundrate_clksrc,
+               .ops            = &s5pc100_clksrc_ops,
        },
        .shift          = S5PC100_CLKSRC2_FIMC0_SHIFT,
        .mask           = S5PC100_CLKSRC2_FIMC0_MASK,
@@ -839,10 +839,7 @@ static struct clksrc_clk clk_fimc1 = {
                .id             = 1,
                .ctrlbit        = S5PC100_CLKGATE_SCLK1_FIMC1,
                .enable         = s5pc100_sclk1_ctrl,
-               .set_parent     = s5pc100_setparent_clksrc,
-               .get_rate       = s5pc100_getrate_clksrc,
-               .set_rate       = s5pc100_setrate_clksrc,
-               .round_rate     = s5pc100_roundrate_clksrc,
+               .ops            = &s5pc100_clksrc_ops,
        },
        .shift          = S5PC100_CLKSRC2_FIMC1_SHIFT,
        .mask           = S5PC100_CLKSRC2_FIMC1_MASK,
@@ -858,10 +855,7 @@ static struct clksrc_clk clk_fimc2 = {
                .id             = 2,
                .ctrlbit        = S5PC100_CLKGATE_SCLK1_FIMC2,
                .enable         = s5pc100_sclk1_ctrl,
-               .set_parent     = s5pc100_setparent_clksrc,
-               .get_rate       = s5pc100_getrate_clksrc,
-               .set_rate       = s5pc100_setrate_clksrc,
-               .round_rate     = s5pc100_roundrate_clksrc,
+               .ops            = &s5pc100_clksrc_ops,
        },
        .shift          = S5PC100_CLKSRC2_FIMC2_SHIFT,
        .mask           = S5PC100_CLKSRC2_FIMC2_MASK,
@@ -889,10 +883,7 @@ static struct clksrc_clk clk_mmc0 = {
                .id             = 0,
                .ctrlbit        = S5PC100_CLKGATE_SCLK0_MMC0,
                .enable         = s5pc100_sclk0_ctrl,
-               .set_parent     = s5pc100_setparent_clksrc,
-               .get_rate       = s5pc100_getrate_clksrc,
-               .set_rate       = s5pc100_setrate_clksrc,
-               .round_rate     = s5pc100_roundrate_clksrc,
+               .ops            = &s5pc100_clksrc_ops,
        },
        .shift          = S5PC100_CLKSRC2_MMC0_SHIFT,
        .mask           = S5PC100_CLKSRC2_MMC0_MASK,
@@ -908,10 +899,7 @@ static struct clksrc_clk clk_mmc1 = {
                .id             = 1,
                .ctrlbit        = S5PC100_CLKGATE_SCLK0_MMC1,
                .enable         = s5pc100_sclk0_ctrl,
-               .set_parent     = s5pc100_setparent_clksrc,
-               .get_rate       = s5pc100_getrate_clksrc,
-               .set_rate       = s5pc100_setrate_clksrc,
-               .round_rate     = s5pc100_roundrate_clksrc,
+               .ops            = &s5pc100_clksrc_ops,
        },
        .shift          = S5PC100_CLKSRC2_MMC1_SHIFT,
        .mask           = S5PC100_CLKSRC2_MMC1_MASK,
@@ -927,10 +915,7 @@ static struct clksrc_clk clk_mmc2 = {
                .id             = 2,
                .ctrlbit        = S5PC100_CLKGATE_SCLK0_MMC2,
                .enable         = s5pc100_sclk0_ctrl,
-               .set_parent     = s5pc100_setparent_clksrc,
-               .get_rate       = s5pc100_getrate_clksrc,
-               .set_rate       = s5pc100_setrate_clksrc,
-               .round_rate     = s5pc100_roundrate_clksrc,
+               .ops            = &s5pc100_clksrc_ops,
        },
        .shift          = S5PC100_CLKSRC2_MMC2_SHIFT,
        .mask           = S5PC100_CLKSRC2_MMC2_MASK,
@@ -959,10 +944,7 @@ static struct clksrc_clk clk_usbhost = {
                .id             = -1,
                .ctrlbit        = S5PC100_CLKGATE_SCLK0_USBHOST,
                .enable         = s5pc100_sclk0_ctrl,
-               .set_parent     = s5pc100_setparent_clksrc,
-               .get_rate       = s5pc100_getrate_clksrc,
-               .set_rate       = s5pc100_setrate_clksrc,
-               .round_rate     = s5pc100_roundrate_clksrc,
+               .ops            = &s5pc100_clksrc_ops,
        },
        .shift          = S5PC100_CLKSRC1_UHOST_SHIFT,
        .mask           = S5PC100_CLKSRC1_UHOST_MASK,
index 5872f0b..ad4e872 100644 (file)
@@ -150,20 +150,21 @@ void __init_or_cpufreq s3c_set_clksrc(struct clksrc_clk *clk)
               clk_get_rate(&clk->clk));
 }
 
+static struct clk_ops clksrc_ops = {
+       .set_parent     = s3c_setparent_clksrc,
+       .get_rate       = s3c_getrate_clksrc,
+       .set_rate       = s3c_setrate_clksrc,
+       .round_rate     = s3c_roundrate_clksrc,
+};
+
 void __init s3c_register_clksrc(struct clksrc_clk *clksrc, int size)
 {
        int ret;
 
        for (; size > 0; size--, clksrc++) {
                /* fill in the default functions */
-               if (!clksrc->clk.set_parent)
-                       clksrc->clk.set_parent = s3c_setparent_clksrc;
-               if (!clksrc->clk.get_rate)
-                       clksrc->clk.get_rate = s3c_getrate_clksrc;
-               if (!clksrc->clk.set_rate)
-                       clksrc->clk.set_rate = s3c_setrate_clksrc;
-               if (!clksrc->clk.round_rate)
-                       clksrc->clk.round_rate = s3c_roundrate_clksrc;
+               if (!clksrc->clk.ops)
+                       clksrc->clk.ops = &clksrc_ops;
 
                s3c_set_clksrc(clksrc);
 
index d86af84..43324af 100644 (file)
 
 #include <linux/spinlock.h>
 
+struct clk;
+
+/**
+ * struct clk_ops - standard clock operations
+ * @set_rate: set the clock rate, see clk_set_rate().
+ * @get_rate: get the clock rate, see clk_get_rate().
+ * @round_rate: round a given clock rate, see clk_round_rate().
+ * @set_parent: set the clock's parent, see clk_set_parent().
+ *
+ * Group the common clock implementations together so that we
+ * don't have to keep setting the same fiels again. We leave
+ * enable in struct clk.
+ *
+ * Adding an extra layer of indirection into the process should
+ * not be a problem as it is unlikely these operations are going
+ * to need to be called quickly.
+ */
+struct clk_ops {
+       int                 (*set_rate)(struct clk *c, unsigned long rate);
+       unsigned long       (*get_rate)(struct clk *c);
+       unsigned long       (*round_rate)(struct clk *c, unsigned long rate);
+       int                 (*set_parent)(struct clk *c, struct clk *parent);
+};
+
 struct clk {
        struct list_head      list;
        struct module        *owner;
@@ -21,11 +45,8 @@ struct clk {
        unsigned long         rate;
        unsigned long         ctrlbit;
 
+       struct clk_ops          *ops;
        int                 (*enable)(struct clk *, int enable);
-       int                 (*set_rate)(struct clk *c, unsigned long rate);
-       unsigned long       (*get_rate)(struct clk *c);
-       unsigned long       (*round_rate)(struct clk *c, unsigned long rate);
-       int                 (*set_parent)(struct clk *c, struct clk *parent);
 };
 
 /* other clocks which may be registered by board support */