tegra: usb: phy: Pullup HSIC strobe at idle
Vinayak Pane [Wed, 14 Dec 2011 04:34:30 +0000 (20:34 -0800)]
Correcting the strobe and SOFs behaviour. This avoids run-stop
bit to start before actual bus_reset. Also, pullup the
strobe signal during idle and wait for connect detect
after bus idle.

Bug 898008
Bug 922444

Reviewed-on: http://git-master/r/73261

Change-Id: I01999521013677f159ee9c12f2d7bcb453c3b39d
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77748
Reviewed-by: Automatic_Commit_Validation_User

arch/arm/mach-tegra/usb_phy.c
drivers/usb/host/ehci-tegra.c

index 8820a26..32ae374 100644 (file)
@@ -2806,14 +2806,26 @@ int tegra_usb_phy_bus_idle(struct tegra_usb_phy *phy)
 
                val = readl(base + UHSIC_PADS_CFG1);
                val &= ~UHSIC_RPD_STROBE;
-#ifdef CONFIG_ARCH_TEGRA_2x_SOC
+               /* safe to enable RPU on STROBE at all times during idle */
                val |= UHSIC_RPU_STROBE;
-#endif
                writel(val, base + UHSIC_PADS_CFG1);
 
+               val = readl(base + USB_USBCMD);
+               val &= ~USB_USBCMD_RS;
+               writel(val, base + USB_USBCMD);
+
                if (uhsic_config->usb_phy_ready &&
                                        uhsic_config->usb_phy_ready())
                        return -EAGAIN;
+
+               /* wait for connect detect */
+               if (utmi_wait_register(base + UHSIC_STAT_CFG0,
+                           UHSIC_CONNECT_DETECT, UHSIC_CONNECT_DETECT) < 0) {
+                       pr_err("%s: timeout waiting for hsic connect detect\n",
+                               __func__);
+                       return -ETIMEDOUT;
+               }
+
        }
        return 0;
 }
index dfd4c47..030b03b 100644 (file)
@@ -489,7 +489,11 @@ static void tegra_ehci_restart(struct usb_hcd *hcd, bool is_dpd)
        ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
        /* setup the command register and set the controller in RUN mode */
        ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
-       ehci->command |= CMD_RUN;
+#ifndef CONFIG_ARCH_TEGRA_2x_SOC
+       /* dont start RS here for HSIC, it will be set by bus_reset */
+       if (tegra->phy->usb_phy_type != TEGRA_USB_PHY_TYPE_HSIC)
+#endif
+               ehci->command |= CMD_RUN;
        ehci_writel(ehci, ehci->command, &ehci->regs->command);
 
        /* Enable the root Port Power */