ARM: tegra3: p1852: clock: changed p1852 clocks
Mohit Kataria [Wed, 11 Jan 2012 05:08:38 +0000 (10:08 +0530)]
Changed clock frequencies for vi, host1x etc. as per POR
Bug 882186

Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/74289
(cherry picked from commit 915b9924388f432fbc68be611f84047d09fc0d33)

Change-Id: I19c3aa845c75f0b8d07bd2dd109055696098e12a
Reviewed-on: http://git-master/r/90494
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

arch/arm/mach-tegra/board-p1852.c

index 15c7d57..5a0f60e 100644 (file)
@@ -128,17 +128,18 @@ static __initdata struct tegra_clk_init_table p1852_clk_init_table[] = {
        { "dam0",               "clk_m",        12000000,       true},
        { "dam1",               "clk_m",        12000000,       true},
        { "dam2",               "clk_m",        12000000,       true},
-       { "vi",                 "pll_p",        200000000,      true},
-       { "vi_sensor",          "pll_p",        150000000,      true},
+       { "vi",                 "pll_p",        470000000,      false},
+       { "vi_sensor",          "pll_p",        150000000,      false},
        { "vde",                "pll_c",        484000000,      true},
-       { "host1x",             "pll_c",        300000000,      true},
+       { "host1x",             "pll_c",        242000000,      true},
        { "mpe",                "pll_c",        484000000,      true},
-       { "se",                 "pll_m",        650000000,      true},
+       { "se",                 "pll_m",        625000000,      true},
        { "i2c1",               "pll_p",        3200000,        true},
        { "i2c2",               "pll_p",        3200000,        true},
        { "i2c3",               "pll_p",        3200000,        true},
        { "i2c4",               "pll_p",        3200000,        true},
        { "i2c5",               "pll_p",        3200000,        true},
+       { "sdmmc2",             "pll_p",        104000000,      false},
        { NULL,                 NULL,           0,              0},
 };