ARM: tegra: dc: program active mux for cursor
Jon McCaffrey [Fri, 14 Jun 2013 20:56:56 +0000 (13:56 -0700)]
Write to the active mux for cursor updates to make the results visible
with minimal latency.  This adds the possibility of tearing, but that
should be acceptable for the cursor.

Bug 1213581

Change-Id: I064778ba598e50b335e8c41d32defba503503f21
Signed-off-by: Jon McCaffrey <jmccaffrey@nvidia.com>
Reviewed-on: http://git-master/r/239802
(cherry picked from commit 3bb0d7f08cde9ef74c7419218187a3ca53b961c1)
Reviewed-on: http://git-master/r/288787
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Gabby Lee <galee@nvidia.com>
Tested-by: Gabby Lee <galee@nvidia.com>

drivers/video/tegra/dc/ext/cursor.c

index 35a86d4..6aeacab 100644 (file)
@@ -165,6 +165,9 @@ int tegra_dc_ext_set_cursor_image(struct tegra_dc_ext_user *user,
        mutex_lock(&dc->lock);
        tegra_dc_get(dc);
 
+       tegra_dc_writel(dc, WRITE_MUX_ACTIVE | READ_MUX_ACTIVE,
+                       DC_CMD_STATE_ACCESS);
+
        set_cursor_image_hw(dc, args, phys_addr);
 
        tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
@@ -216,6 +219,9 @@ int tegra_dc_ext_set_cursor(struct tegra_dc_ext_user *user,
        mutex_lock(&dc->lock);
        tegra_dc_get(dc);
 
+       tegra_dc_writel(dc, WRITE_MUX_ACTIVE | READ_MUX_ACTIVE,
+                       DC_CMD_STATE_ACCESS);
+
        val = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);
        if (!!(val & CURSOR_ENABLE) != enable) {
                val &= ~CURSOR_ENABLE;
@@ -269,6 +275,9 @@ int tegra_dc_ext_cursor_clip(struct tegra_dc_ext_user *user,
        mutex_lock(&dc->lock);
        tegra_dc_get(dc);
 
+       tegra_dc_writel(dc, WRITE_MUX_ACTIVE | READ_MUX_ACTIVE,
+                       DC_CMD_STATE_ACCESS);
+
        reg_val = tegra_dc_readl(dc, DC_DISP_CURSOR_START_ADDR);
        reg_val &= ~CURSOR_CLIP_SHIFT_BITS(3); /* Clear out the old value */
        tegra_dc_writel(dc, reg_val | CURSOR_CLIP_SHIFT_BITS(*args),