usb: xhci: tegra: update low speed rise and fall slew rate
Ajay Gupta [Tue, 19 Mar 2013 16:31:54 +0000 (09:31 -0700)]
Bug 1256238

Change-Id: I81dc9baad99728ca52608a41578b094c8e07fe28
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/210852
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

arch/arm/mach-tegra/board-dalmore.c
arch/arm/mach-tegra/board-pluto.c
drivers/usb/host/xhci-tegra.c
include/linux/platform_data/tegra_xusb.h

index a33178b..543f247 100644 (file)
@@ -569,6 +569,7 @@ static struct tegra_xusb_pad_data xusb_padctl_data = {
        .cdr_cntl = (0x26 << 24),
        .dfe_cntl = 0x002008EE,
        .hs_slew = (0xE << 6),
+       .ls_rslew = (0x3 << 14),
        .otg_pad0_ctl0 = (0x7 << 19),
        .otg_pad1_ctl0 = (0x0 << 19),
        .otg_pad0_ctl1 = (0x4 << 0),
index d39b5d3..16da981 100644 (file)
@@ -1164,6 +1164,7 @@ static struct tegra_xusb_pad_data xusb_padctl_data = {
        .cdr_cntl = (0x26 << 24),
        .dfe_cntl = 0x002008EE,
        .hs_slew = (0xE << 6),
+       .ls_rslew = (0x3 << 14),
        .otg_pad0_ctl0 = (0x0 << 19),
        .otg_pad1_ctl0 = (0x7 << 19),
        .otg_pad0_ctl1 = (0x3 << 0),
index b44f21d..d687d24 100644 (file)
@@ -1072,8 +1072,8 @@ tegra_xhci_padctl_portmap_and_caps(struct tegra_xhci_hcd *tegra)
        writel(reg, tegra->padctl_base + IOPHY_USB3_PAD1_CTL_4_0);
 
        reg = readl(tegra->padctl_base + USB2_OTG_PAD0_CTL_0_0);
-       reg &= ~((0xfff << 0) | (0x1f << 19));
-       reg |= xusb_padctl->hs_slew
+       reg &= ~((0x3fff << 0) | (0x1f << 19));
+       reg |= xusb_padctl->hs_slew | xusb_padctl->ls_rslew
                | xusb_padctl->hs_curr_level_pad0 | xusb_padctl->otg_pad0_ctl0;
        writel(reg, tegra->padctl_base + USB2_OTG_PAD0_CTL_0_0);
 
index e173571..ebae033 100644 (file)
@@ -31,6 +31,7 @@ struct tegra_xusb_pad_data {
        u32 cdr_cntl;
        u32 dfe_cntl;
        u32 hs_slew;
+       u32 ls_rslew;
        u32 hs_curr_level_pad0;
        u32 hs_curr_level_pad1;
        u32 hs_iref_cap;