video: tegra: host: invalidate FDC before context save
Nuno Subtil [Tue, 7 Aug 2012 05:11:01 +0000 (22:11 -0700)]
Invalidate the FDC before submitting the context
save pushbuffer to ensure cache coherency across
both GPU cores.

Bug 1020291

Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/121945
(cherry picked from commit cef956d07ec717f4714f5101805bbe2f0f149e71)

Change-Id: I43ffee6a77122b4f2fe17f063dc6756c501e59c7
Reviewed-on: http://git-master/r/122323
Tested-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>

drivers/video/tegra/host/gr3d/gr3d.h
drivers/video/tegra/host/gr3d/gr3d_t30.c

index 3855b23..61f708c 100644 (file)
@@ -29,6 +29,9 @@
 #define AR3D_PSEQ_QUAD_ID 0x545
 #define AR3D_DW_MEMORY_OUTPUT_ADDRESS 0x904
 #define AR3D_DW_MEMORY_OUTPUT_DATA 0x905
+#define AR3D_FDC_CONTROL_0 0xa00
+#define AR3D_FDC_CONTROL_0_RESET_VAL 0xe00
+#define AR3D_FDC_CONTROL_0_INVALIDATE 1
 #define AR3D_GSHIM_WRITE_MASK 0xb00
 #define AR3D_GSHIM_READ_SELECT 0xb01
 #define AR3D_GLOBAL_MEMORY_OUTPUT_READS 0xe40
index c35fea2..5e26a6f 100644 (file)
@@ -125,6 +125,16 @@ static void save_push_v1(struct nvhost_hwctx *nctx, struct nvhost_cdma *cdma)
                        nvhost_opcode_setclass(NV_GRAPHICS_3D_CLASS_ID, 0, 0),
                        NVHOST_OPCODE_NOOP);
 
+       /* invalidate the FDC to prevent cache-coherency issues across GPUs
+          note that we assume FDC_CONTROL_0 is left in the reset state by all
+          contexts.  the invalidate bit will clear itself, so the register
+          should be unchanged after this */
+       nvhost_cdma_push(cdma,
+               nvhost_opcode_imm(AR3D_FDC_CONTROL_0,
+                       AR3D_FDC_CONTROL_0_RESET_VAL
+                               | AR3D_FDC_CONTROL_0_INVALIDATE),
+               NVHOST_OPCODE_NOOP);
+
        /* set register set 0 and 1 register read memory output addresses,
           and send their reads to memory */
 
@@ -132,7 +142,7 @@ static void save_push_v1(struct nvhost_hwctx *nctx, struct nvhost_cdma *cdma)
                nvhost_opcode_imm(AR3D_GSHIM_WRITE_MASK, 2),
                nvhost_opcode_imm(AR3D_GLOBAL_MEMORY_OUTPUT_READS, 1));
        nvhost_cdma_push(cdma,
-               nvhost_opcode_nonincr(0x904, 1),
+               nvhost_opcode_nonincr(AR3D_DW_MEMORY_OUTPUT_ADDRESS, 1),
                ctx->restore_phys + restore_set1_offset * 4);
 
        nvhost_cdma_push(cdma,