drm/i915: enable 36bit physical address for hardware status page
Zhenyu Wang [Tue, 5 Jan 2010 03:25:06 +0000 (11:25 +0800)]
This enables possible 36bit address mask on 965G that use physical
address for hw status page.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

drivers/char/agp/intel-agp.c
drivers/gpu/drm/i915/i915_dma.c

index 30c36ac..3999a5f 100644 (file)
@@ -2460,10 +2460,14 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
                                &bridge->mode);
        }
 
-       if (bridge->driver->mask_memory == intel_i965_mask_memory)
+       if (bridge->driver->mask_memory == intel_i965_mask_memory) {
                if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(36)))
                        dev_err(&intel_private.pcidev->dev,
                                "set gfx device dma mask 36bit failed!\n");
+               else
+                       pci_set_consistent_dma_mask(intel_private.pcidev,
+                                                   DMA_BIT_MASK(36));
+       }
 
        pci_set_drvdata(pdev, bridge);
        return agp_add_bridge(bridge);
index bbe4781..e660ac0 100644 (file)
@@ -134,6 +134,10 @@ static int i915_init_phys_hws(struct drm_device *dev)
 
        memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 
+       if (IS_I965G(dev))
+               dev_priv->dma_status_page |= (dev_priv->dma_status_page >> 28) &
+                                            0xf0;
+
        I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
        DRM_DEBUG_DRIVER("Enabled hardware status page\n");
        return 0;