ARM: tegra: smmu: Correct PTC_STATS_TEST in MC_SMMU_PTC_CONFIG_0
Hiroshi DOYU [Wed, 25 Jul 2012 08:30:03 +0000 (11:30 +0300)]
Correct register bit defs for PTC_STATS_TEST in MC_SMMU_PTC_CONFIG_0

Change-Id: I1f9cad1ba5b0c9dd57cff6694ab054f40a9acdc1
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/118308
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

arch/arm/mach-tegra/iovmm-smmu.c

index 8063d80..29516be 100644 (file)
@@ -69,8 +69,8 @@
 #define MC_SMMU_PTC_CONFIG_0                           0x18
 #define MC_SMMU_PTC_CONFIG_0_PTC_STATS_ENABLE__MASK    (1 << 31)
 #define MC_SMMU_PTC_CONFIG_0_PTC_STATS_ENABLE          (1 << 31)
-#define MC_SMMU_PTC_CONFIG_0_PTC_STATS_TEST__MASK      (1 << 31)
-#define MC_SMMU_PTC_CONFIG_0_PTC_STATS_TEST            (1 << 31)
+#define MC_SMMU_PTC_CONFIG_0_PTC_STATS_TEST__MASK      (1 << 30)
+#define MC_SMMU_PTC_CONFIG_0_PTC_STATS_TEST            (1 << 30)
 #define MC_SMMU_PTC_CONFIG_0_PTC_INDEX_MAP__PATTERN    0x3f
 #define MC_SMMU_PTC_CONFIG_0_RESET_VAL                 0x2000003f