ARM: tegra: Fix HEG power gating sequence
Terje Bergstrom [Tue, 2 Oct 2012 07:23:46 +0000 (10:23 +0300)]
Change HEG power gating sequence to use the same sequence with
3D.

Bug 1058074

Change-Id: I34737183a0804c9a255a890e7f4cd3ab46ffe63b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/141186
(cherry picked from commit f0653f0d58967f93e7622563b95eacf2db7ec2f8)
Reviewed-on: http://git-master/r/146193
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

arch/arm/mach-tegra/powergate.c

index c001330..ec8a91e 100644 (file)
@@ -1493,6 +1493,7 @@ static int tegra11x_check_partition_pg_seq(int id)
 
                break;
        case TEGRA_POWERGATE_3D:
+       case TEGRA_POWERGATE_HEG:
        case TEGRA_POWERGATE_MPE:
                ret = tegra11x_powergate_3d(id);
                if (ret < 0)
@@ -1514,6 +1515,7 @@ static int tegra11x_check_partition_pug_seq(int id)
 
                break;
        case TEGRA_POWERGATE_3D:
+       case TEGRA_POWERGATE_HEG:
        case TEGRA_POWERGATE_MPE:
                ret = tegra11x_unpowergate_3d(id);
                if (ret < 0)