tegra: kernel: voice call debug
ScottPeterson [Mon, 10 Dec 2012 16:27:37 +0000 (08:27 -0800)]
Changed KB_ROW7 gpio to PULL_UP for better headset
detection.

Added vdd_sys_audio regulator for speaker amp

Debugging voice call UL/DL loss during stress testing.

Change-Id: Ib1930ff693306621aef269f0e0ff27aee2ab450f
Signed-off-by: ScottPeterson <speterson@nvidia.com>
Reviewed-on: http://git-master/r/171212

arch/arm/mach-tegra/board-pluto-pinmux-t11x.h
arch/arm/mach-tegra/board-pluto-pinmux.c
arch/arm/mach-tegra/board-pluto-power.c
arch/arm/mach-tegra/board-pluto.h
sound/soc/tegra/tegra30_dam.c
sound/soc/tegra/tegra30_i2s.c
sound/soc/tegra/tegra30_i2s.h
sound/soc/tegra/tegra_cs42l73.c

index eedf7f7..4c59322 100644 (file)
@@ -49,7 +49,7 @@ static __initdata struct tegra_pingroup_config pluto_pinmux_common[] = {
        DEFAULT_PINMUX(ULPI_DIR,      ULPI,       NORMAL,    TRISTATE, INPUT),
        DEFAULT_PINMUX(ULPI_NXT,      ULPI,       NORMAL,    TRISTATE, INPUT),
        DEFAULT_PINMUX(ULPI_STP,      ULPI,       NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(KB_ROW7,     KBC,      PULL_DOWN,    NORMAL,    INPUT),
+       DEFAULT_PINMUX(KB_ROW7,           KBC,             PULL_UP,   NORMAL,    INPUT),
        DEFAULT_PINMUX(GMI_A16,       UARTD,       NORMAL,    NORMAL,   OUTPUT),
        DEFAULT_PINMUX(GMI_A17,       UARTD,       NORMAL,    NORMAL,   INPUT),
        DEFAULT_PINMUX(GMI_A18,       UARTD,       NORMAL,    NORMAL,   INPUT),
@@ -213,6 +213,9 @@ static __initdata struct tegra_pingroup_config pluto_pinmux_common[] = {
        I2C_PINMUX(DDC_SCL, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
        I2C_PINMUX(DDC_SDA, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
 
+       /* USB pinmux */
+       DEFAULT_PINMUX(USB_VBUS_EN0,  RSVD3,       PULL_DOWN, NORMAL, OUTPUT),
+
        /* nct */
        DEFAULT_PINMUX(GPIO_X6_AUD,   SPI6,        PULL_UP,   TRISTATE, INPUT),
 
@@ -286,5 +289,5 @@ static struct gpio_init_pin_info init_gpio_mode_pluto_common[] = {
        GPIO_INIT_PIN_MODE(TEGRA_GPIO_PU6, true, 0),
        GPIO_INIT_PIN_MODE(TEGRA_GPIO_PN7, true, 0),
        GPIO_INIT_PIN_MODE(TEGRA_GPIO_PK5, false, 0),
-       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PN4, false, 0),
+       GPIO_INIT_PIN_MODE(TEGRA_GPIO_PN4, false, 1),
 };
index 07a05a5..7f4c41d 100644 (file)
@@ -227,7 +227,7 @@ static __initdata struct tegra_pingroup_config pluto_pinmux_set_nontristate[] =
        DEFAULT_PINMUX(KB_ROW4,     KBC,      PULL_DOWN,    NORMAL,    INPUT),
        DEFAULT_PINMUX(KB_ROW5,     KBC,      PULL_DOWN,    NORMAL,    OUTPUT),
        DEFAULT_PINMUX(KB_ROW6,     KBC,      PULL_DOWN,    NORMAL,    OUTPUT),
-       DEFAULT_PINMUX(KB_ROW7,     KBC,      PULL_DOWN,    NORMAL,    INPUT),
+       DEFAULT_PINMUX(KB_ROW7,     KBC,      PULL_UP,          NORMAL,    INPUT),
        DEFAULT_PINMUX(KB_ROW8,     KBC,      PULL_DOWN,    NORMAL,    INPUT),
 
        DEFAULT_PINMUX(CLK3_REQ,    RSVD3,    NORMAL,      NORMAL,     OUTPUT),
index 065fd52..a29fc81 100644 (file)
@@ -373,6 +373,7 @@ static struct regulator_consumer_supply fixed_reg_en_battery_supply[] = {
                REGULATOR_SUPPLY("vdd_sys_com", NULL),
                REGULATOR_SUPPLY("vdd_sys_gps", NULL),
                REGULATOR_SUPPLY("vdd_sys_bt", NULL),
+               REGULATOR_SUPPLY("vdd_sys_audio", NULL),
 };
 
 static struct regulator_consumer_supply fixed_reg_en_vdd_1v8_cam_supply[] = {
index 7e5b9d0..7af8cbb 100644 (file)
@@ -32,7 +32,7 @@
 /* Audio-related GPIOs */
 #define TEGRA_GPIO_CDC_IRQ             TEGRA_GPIO_PW3
 #define TEGRA_GPIO_LDO1_EN             TEGRA_GPIO_PV3
-#define TEGRA_GPIO_SPKR_EN             -1
+#define TEGRA_GPIO_SPKR_EN             TEGRA_GPIO_PN4
 #define TEGRA_GPIO_HP_DET              TEGRA_GPIO_PR7
 #define TEGRA_GPIO_INT_MIC_EN          -1
 #define TEGRA_GPIO_EXT_MIC_EN          -1
index f4f2d69..e2511ed 100644 (file)
@@ -45,7 +45,6 @@ enum {
        dam_ch_maxnum
 } tegra30_dam_chtype;
 
-#ifdef CONFIG_ARCH_TEGRA_3x_SOC
 struct tegra30_dam_src_step_table  step_table[] = {
        { 8000, 44100, 80 },
        { 8000, 48000, 1 },
@@ -56,7 +55,6 @@ struct tegra30_dam_src_step_table  step_table[] = {
        { 44100, 16000, 441 },
        { 48000, 16000, 0 },
 };
-#endif
 
 #ifndef CONFIG_ARCH_TEGRA_3x_SOC
 int coefRam16To44[64] = {
@@ -317,11 +315,9 @@ static void tegra30_dam_set_output_samplerate(struct tegra30_dam_context *dam,
                int fsout);
 static void tegra30_dam_set_input_samplerate(struct tegra30_dam_context *dam,
                int fsin);
-#ifdef CONFIG_ARCH_TEGRA_3x_SOC
 static int tegra30_dam_set_step_reset(struct tegra30_dam_context *dam,
                int insample, int outsample);
 static void tegra30_dam_ch0_set_step(struct tegra30_dam_context *dam, int step);
-#endif
 
 static inline void tegra30_dam_writel(struct tegra30_dam_context *dam,
                        u32 val, u32 reg)
@@ -549,9 +545,7 @@ void tegra30_dam_set_samplerate(int ifc, int chid, int samplerate)
        case dam_ch_in0:
                tegra30_dam_set_input_samplerate(dam, samplerate);
                dam->ch_insamplerate[dam_ch_in0] = samplerate;
-#ifdef CONFIG_ARCH_TEGRA_3x_SOC
                tegra30_dam_set_step_reset(dam, samplerate, dam->outsamplerate);
-#endif
                break;
        case dam_ch_in1:
                if (samplerate != dam->outsamplerate)
@@ -622,7 +616,6 @@ void tegra30_dam_set_input_samplerate(struct tegra30_dam_context *dam, int fsin)
        tegra30_dam_writel(dam, val, TEGRA30_DAM_CH0_CTRL);
 }
 
-#ifdef CONFIG_ARCH_TEGRA_3x_SOC
 int tegra30_dam_set_step_reset(struct tegra30_dam_context *dam,
                int insample, int outsample)
 {
@@ -649,7 +642,6 @@ void tegra30_dam_ch0_set_step(struct tegra30_dam_context *dam, int step)
        val |= step << TEGRA30_DAM_CH0_CTRL_STEP_SHIFT;
        tegra30_dam_writel(dam, val, TEGRA30_DAM_CH0_CTRL);
 }
-#endif
 
 int tegra30_dam_set_gain(int ifc, int chid, int gain)
 {
index cf11d9e..ab8e220 100644 (file)
@@ -1140,6 +1140,7 @@ int tegra30_make_voice_call_connections(struct codec_config *codec_info,
 {
        struct tegra30_i2s  *codec_i2s;
        struct tegra30_i2s  *bb_i2s;
+       int reg;
 
        codec_i2s = &i2scont[codec_info->i2s_id];
        bb_i2s = &i2scont[bb_info->i2s_id];
@@ -1150,6 +1151,27 @@ int tegra30_make_voice_call_connections(struct codec_config *codec_info,
        codec_i2s->capture_ref_count++;
        bb_i2s->capture_ref_count++;
 
+       /* Make sure i2s is disabled during the configiration */
+       tegra30_i2s_enable_clocks(codec_i2s);
+       reg = codec_i2s->reg_ctrl;
+       reg &= ~TEGRA30_I2S_CTRL_TX_FLOWCTL_EN;
+       reg &= ~TEGRA30_I2S_CTRL_XFER_EN_TX;
+       reg &= ~TEGRA30_I2S_CTRL_XFER_EN_RX;
+       tegra30_i2s_write(codec_i2s, TEGRA30_I2S_CTRL,
+               codec_i2s->reg_ctrl);
+       tegra30_i2s_disable_clocks(codec_i2s);
+
+       tegra30_i2s_enable_clocks(bb_i2s);
+       reg = bb_i2s->reg_ctrl;
+       reg &= ~TEGRA30_I2S_CTRL_TX_FLOWCTL_EN;
+       reg &= ~TEGRA30_I2S_CTRL_XFER_EN_TX;
+       reg &= ~TEGRA30_I2S_CTRL_XFER_EN_RX;
+       tegra30_i2s_write(bb_i2s, TEGRA30_I2S_CTRL,
+               bb_i2s->reg_ctrl);
+       tegra30_i2s_disable_clocks(bb_i2s);
+
+       msleep(20);
+
        /*Configure codec i2s*/
        configure_baseband_i2s(codec_i2s, codec_info->is_i2smaster,
                codec_info->is_format_dsp, codec_info->channels,
@@ -1171,6 +1193,16 @@ int tegra30_make_voice_call_connections(struct codec_config *codec_info,
                tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_I2S0_RX0 +
                            codec_info->i2s_id, TEGRA30_AHUB_TXCIF_I2S0_TX0 +
                            bb_info->i2s_id);
+               if (!(codec_info->is_i2smaster && bb_info->is_i2smaster)) {
+                       tegra30_i2s_write(codec_i2s, TEGRA30_I2S_FLOWCTL,
+                               TEGRA30_I2S_FILTER_QUAD);
+                       tegra30_i2s_write(bb_i2s, TEGRA30_I2S_FLOWCTL,
+                               TEGRA30_I2S_FILTER_QUAD);
+                       tegra30_i2s_write(codec_i2s, TEGRA30_I2S_TX_STEP, 4);
+                       tegra30_i2s_write(bb_i2s, TEGRA30_I2S_TX_STEP, 4);
+                       codec_i2s->reg_ctrl |= TEGRA30_I2S_CTRL_TX_FLOWCTL_EN;
+                       bb_i2s->reg_ctrl |= TEGRA30_I2S_CTRL_TX_FLOWCTL_EN;
+               }
        } else {
 
                /*configure codec dam*/
@@ -1209,11 +1241,15 @@ int tegra30_make_voice_call_connections(struct codec_config *codec_info,
                        TEGRA30_DAM_CHIN0_SRC);
        }
 
+       msleep(20);
+
        codec_i2s->reg_ctrl |= TEGRA30_I2S_CTRL_XFER_EN_TX;
        codec_i2s->reg_ctrl |= TEGRA30_I2S_CTRL_XFER_EN_RX;
        tegra30_i2s_write(codec_i2s, TEGRA30_I2S_CTRL,
                codec_i2s->reg_ctrl);
 
+       msleep(20);
+
        bb_i2s->reg_ctrl |= TEGRA30_I2S_CTRL_XFER_EN_TX;
        bb_i2s->reg_ctrl |= TEGRA30_I2S_CTRL_XFER_EN_RX;
        tegra30_i2s_write(bb_i2s, TEGRA30_I2S_CTRL,
index 10fadc8..a0baaf7 100644 (file)
@@ -271,7 +271,7 @@ struct tegra30_i2s {
        bool is_dam_used;
 #ifdef CONFIG_PM
        #ifdef CONFIG_ARCH_TEGRA_3x_SOC
-               u32  reg_cache[(TEGRA30_I2S_CIF_TX_CTRL >> 2) + 1];
+               u32  reg_cache[(TEGRA30_I2S_LCOEF_2_4_2 >> 2) + 1];
        #else
                u32  reg_cache[(TEGRA30_I2S_SLOT_CTRL2 >> 2) + 1];
        #endif
index 2cd901c..e5e36b2 100644 (file)
@@ -91,6 +91,7 @@ struct tegra_cs42l73 {
        struct regulator *dmic_reg;
        struct regulator *dmic_1v8_reg;
        struct regulator *hmic_reg;
+       struct regulator *spkr_reg;
        enum snd_soc_bias_level bias_level;
        struct snd_soc_card *pcard;
 #ifdef CONFIG_SWITCH
@@ -936,12 +937,11 @@ static int tegra_cs42l73_event_int_mic(struct snd_soc_dapm_widget *w,
                        regulator_disable(machine->dmic_1v8_reg);
                }
        }
-
        if (!(machine->gpio_requested & GPIO_INT_MIC_EN))
                return 0;
 
        gpio_set_value_cansleep(pdata->gpio_int_mic_en,
-                               SND_SOC_DAPM_EVENT_ON(event));
+                               !!SND_SOC_DAPM_EVENT_ON(event));
 
        return 0;
 }
@@ -954,11 +954,18 @@ static int tegra_cs42l73_event_int_spk(struct snd_soc_dapm_widget *w,
        struct tegra_cs42l73 *machine = snd_soc_card_get_drvdata(card);
        struct tegra_asoc_platform_data *pdata = machine->pdata;
 
+       if (machine->spkr_reg) {
+               if (SND_SOC_DAPM_EVENT_ON(event))
+                       regulator_enable(machine->spkr_reg);
+               else
+                       regulator_disable(machine->spkr_reg);
+       }
+
        if (!(machine->gpio_requested & GPIO_SPKR_EN))
                return 0;
 
        gpio_set_value_cansleep(pdata->gpio_spkr_en,
-                               SND_SOC_DAPM_EVENT_ON(event));
+                               !!SND_SOC_DAPM_EVENT_ON(event));
 
        return 0;
 }
@@ -982,7 +989,7 @@ static int tegra_cs42l73_event_ext_mic(struct snd_soc_dapm_widget *w,
                return 0;
 
        gpio_set_value_cansleep(pdata->gpio_ext_mic_en,
-                               SND_SOC_DAPM_EVENT_ON(event));
+                               !!SND_SOC_DAPM_EVENT_ON(event));
 
        return 0;
 }
@@ -998,6 +1005,8 @@ static const struct snd_soc_dapm_widget tegra_cs42l73_dapm_widgets[] = {
 /* cs42l73 Audio Map */
 static const struct snd_soc_dapm_route tegra_cs42l73_audio_map[] = {
        {"Int Spk", NULL, "SPKOUT"},
+       {"Int Spk", NULL, "SPKLINEOUT"},
+       {"Int Spk", NULL, "EAROUT"},
        {"MIC2", NULL, "Headset Mic"},
        {"ADC Left", NULL, "Headset Mic"},
        {"ADC Right", NULL, "Headset Mic"},
@@ -1072,7 +1081,6 @@ static int tegra_cs42l73_init(struct snd_soc_pcm_runtime *rtd)
                gpio_direction_output(pdata->gpio_spkr_en, 0);
        }
 
-
        /* Add call mode switch control */
        ret = snd_ctl_add(codec->card->snd_card,
                snd_ctl_new1(&tegra_call_mode_control, machine));
@@ -1212,7 +1220,6 @@ static struct snd_soc_card snd_soc_tegra_cs42l73 = {
        .resume_pre = tegra_cs42l73_resume_pre,
        .set_bias_level = tegra_cs42l73_set_bias_level,
        .set_bias_level_post = tegra_cs42l73_set_bias_level_post,
-
        .controls = tegra_cs42l73_controls,
        .num_controls = ARRAY_SIZE(tegra_cs42l73_controls),
        .dapm_widgets = tegra_cs42l73_dapm_widgets,
@@ -1286,6 +1293,12 @@ static __devinit int tegra_cs42l73_driver_probe(struct platform_device *pdev)
                machine->hmic_reg = 0;
        }
 
+       machine->spkr_reg = regulator_get(&pdev->dev, "vdd_sys_audio");
+       if (IS_ERR(machine->spkr_reg)) {
+               dev_info(&pdev->dev, "No speaker regulator found\n");
+               machine->spkr_reg = 0;
+       }
+
 #ifdef CONFIG_SWITCH
        /* Addd h2w swith class support */
        ret = switch_dev_register(&tegra_cs42l73_headset_switch);
@@ -1383,6 +1396,8 @@ static int __devexit tegra_cs42l73_driver_remove(struct platform_device *pdev)
                regulator_put(machine->dmic_1v8_reg);
        if (machine->hmic_reg)
                regulator_put(machine->hmic_reg);
+       if (machine->spkr_reg)
+               regulator_put(machine->spkr_reg);
 
        if (gpio_is_valid(pdata->gpio_ldo1_en)) {
                gpio_set_value(pdata->gpio_ldo1_en, 0);