arm:tegra: Correct sample rate for voice call
Lei Fan [Tue, 21 Jan 2014 06:39:50 +0000 (14:39 +0800)]
Because the channel1 of DAM is used for DL, there is no SRC in DL.
the  codec need to be set the same rate with baseband.
Otherwise the I2S Timing REG cannot get the suited value and
left channel may be swapped with right channel.

Bug 1441449

Change-Id: Ib71bb41a7e03d2a85d718be0c94a5a5f525c0ce3
Signed-off-by: Lei Fan <leif@nvidia.com>
Reviewed-on: http://git-master/r/358078
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vijay Mali <vmali@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Martin Chi <mchi@nvidia.com>

arch/arm/mach-tegra/board-tegranote7c.c

index 6b43e2d..236f33f 100644 (file)
@@ -351,6 +351,10 @@ static struct tegra_asoc_platform_data tegranote7c_audio_pdata = {
                .audio_port_id  = 1,
                .is_i2s_master  = 1,
                .i2s_mode       = TEGRA_DAIFMT_I2S,
+               .sample_size    = 16,
+               .rate           = 48000,
+               .channels       = 2,
+               .bit_clk        = 1536000,
        },
        .i2s_param[BASEBAND]    = {
                .audio_port_id  = 0,
@@ -375,7 +379,7 @@ static struct tegra_asoc_platform_data tegranote7c_audio_pdata = {
                .is_i2s_master  = 1,
                .i2s_mode       = TEGRA_DAIFMT_I2S,
                .sample_size    = 16,
-               .rate           = 48000,
+               .rate           = 16000,
                .channels       = 2,
                .bit_clk        = 1536000,
        },