V4L/DVB (10955): cx231xx: CodingStyle automatic fixes with Lindent
Mauro Carvalho Chehab [Tue, 3 Mar 2009 09:14:34 +0000 (06:14 -0300)]
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

13 files changed:
drivers/media/video/cx231xx/cx231xx-audio.c
drivers/media/video/cx231xx/cx231xx-avcore.c
drivers/media/video/cx231xx/cx231xx-cards.c
drivers/media/video/cx231xx/cx231xx-conf-reg.h
drivers/media/video/cx231xx/cx231xx-core.c
drivers/media/video/cx231xx/cx231xx-dvb.c
drivers/media/video/cx231xx/cx231xx-i2c.c
drivers/media/video/cx231xx/cx231xx-input.c
drivers/media/video/cx231xx/cx231xx-reg.h
drivers/media/video/cx231xx/cx231xx-vbi.c
drivers/media/video/cx231xx/cx231xx-vbi.h
drivers/media/video/cx231xx/cx231xx-video.c
drivers/media/video/cx231xx/cx231xx.h

index e4335e2..cee6487 100644 (file)
@@ -58,21 +58,20 @@ static int cx231xx_isoc_audio_deinit(struct cx231xx *dev)
 
        dprintk("Stopping isoc\n");
 
-
        for (i = 0; i < CX231XX_AUDIO_BUFS; i++) {
-        if(dev->adev.urb[i]) {
-            if (!irqs_disabled())
-                           usb_kill_urb(dev->adev.urb[i]);
-                   else
-                       usb_unlink_urb(dev->adev.urb[i]);
+               if (dev->adev.urb[i]) {
+                       if (!irqs_disabled())
+                               usb_kill_urb(dev->adev.urb[i]);
+                       else
+                               usb_unlink_urb(dev->adev.urb[i]);
 
-                   usb_free_urb(dev->adev.urb[i]);
-                   dev->adev.urb[i] = NULL;
+                       usb_free_urb(dev->adev.urb[i]);
+                       dev->adev.urb[i] = NULL;
 
-            kfree(dev->adev.transfer_buffer[i]);
-                   dev->adev.transfer_buffer[i] = NULL;
+                       kfree(dev->adev.transfer_buffer[i]);
+                       dev->adev.transfer_buffer[i] = NULL;
 
-        }
+               }
        }
 
        return 0;
@@ -80,27 +79,27 @@ static int cx231xx_isoc_audio_deinit(struct cx231xx *dev)
 
 static void cx231xx_audio_isocirq(struct urb *urb)
 {
-       struct cx231xx            *dev = urb->context;
-       int                      i;
-       unsigned int             oldptr;
-       int                      period_elapsed = 0;
-       int                      status;
-       unsigned char            *cp;
-       unsigned int             stride;
+       struct cx231xx *dev = urb->context;
+       int i;
+       unsigned int oldptr;
+       int period_elapsed = 0;
+       int status;
+       unsigned char *cp;
+       unsigned int stride;
        struct snd_pcm_substream *substream;
-       struct snd_pcm_runtime   *runtime;
-
-    switch (urb->status) {
-           case 0:             /* success */
-           case -ETIMEDOUT:    /* NAK */
-                   break;
-           case -ECONNRESET:   /* kill */
-           case -ENOENT:
-           case -ESHUTDOWN:
-                   return;
-           default:            /* error */
-                   dprintk("urb completition error %d.\n", urb->status);
-                   break;
+       struct snd_pcm_runtime *runtime;
+
+       switch (urb->status) {
+       case 0:         /* success */
+       case -ETIMEDOUT:        /* NAK */
+               break;
+       case -ECONNRESET:       /* kill */
+       case -ENOENT:
+       case -ESHUTDOWN:
+               return;
+       default:                /* error */
+               dprintk("urb completition error %d.\n", urb->status);
+               break;
        }
 
        if (dev->adev.capture_pcm_substream) {
@@ -145,7 +144,6 @@ static void cx231xx_audio_isocirq(struct urb *urb)
                                    runtime->period_size;
                                period_elapsed = 1;
                        }
-
                        snd_pcm_stream_unlock(substream);
                }
                if (period_elapsed)
@@ -156,19 +154,19 @@ static void cx231xx_audio_isocirq(struct urb *urb)
        status = usb_submit_urb(urb, GFP_ATOMIC);
        if (status < 0) {
                cx231xx_errdev("resubmit of audio urb failed (error=%i)\n",
-                             status);
+                              status);
        }
        return;
 }
 
 static int cx231xx_init_audio_isoc(struct cx231xx *dev)
 {
-       int       i, errCode;
-       int       sb_size;
+       int i, errCode;
+       int sb_size;
 
-    cx231xx_info("%s: Starting AUDIO transfers\n",__func__);
+       cx231xx_info("%s: Starting AUDIO transfers\n", __func__);
 
-    sb_size = CX231XX_NUM_AUDIO_PACKETS * dev->adev.max_pkt_size;
+       sb_size = CX231XX_NUM_AUDIO_PACKETS * dev->adev.max_pkt_size;
 
        for (i = 0; i < CX231XX_AUDIO_BUFS; i++) {
                struct urb *urb;
@@ -191,7 +189,8 @@ static int cx231xx_init_audio_isoc(struct cx231xx *dev)
 
                urb->dev = dev->udev;
                urb->context = dev;
-               urb->pipe = usb_rcvisocpipe(dev->udev, dev->adev.end_point_addr);
+               urb->pipe =
+                   usb_rcvisocpipe(dev->udev, dev->adev.end_point_addr);
                urb->transfer_flags = URB_ISO_ASAP;
                urb->transfer_buffer = dev->adev.transfer_buffer[i];
                urb->interval = 1;
@@ -200,10 +199,9 @@ static int cx231xx_init_audio_isoc(struct cx231xx *dev)
                urb->transfer_buffer_length = sb_size;
 
                for (j = k = 0; j < CX231XX_NUM_AUDIO_PACKETS;
-                            j++, k += dev->adev.max_pkt_size) {
+                    j++, k += dev->adev.max_pkt_size) {
                        urb->iso_frame_desc[j].offset = k;
-                       urb->iso_frame_desc[j].length =
-                           dev->adev.max_pkt_size;
+                       urb->iso_frame_desc[j].length = dev->adev.max_pkt_size;
                }
                dev->adev.urb[i] = urb;
        }
@@ -221,11 +219,11 @@ static int cx231xx_init_audio_isoc(struct cx231xx *dev)
 
 static int cx231xx_cmd(struct cx231xx *dev, int cmd, int arg)
 {
-       dprintk("%s transfer\n", (dev->adev.capture_stream == STREAM_ON)?
-                                "stop" : "start");
+       dprintk("%s transfer\n", (dev->adev.capture_stream == STREAM_ON) ?
+               "stop" : "start");
 
        switch (cmd) {
-    case CX231XX_CAPTURE_STREAM_EN:
+       case CX231XX_CAPTURE_STREAM_EN:
                if (dev->adev.capture_stream == STREAM_OFF && arg == 1) {
                        dev->adev.capture_stream = STREAM_ON;
                        cx231xx_init_audio_isoc(dev);
@@ -233,8 +231,8 @@ static int cx231xx_cmd(struct cx231xx *dev, int cmd, int arg)
                        dev->adev.capture_stream = STREAM_OFF;
                        cx231xx_isoc_audio_deinit(dev);
                } else {
-                       cx231xx_errdev( "An underrun very likely occurred. "
-                                       "Ignoring it.\n");
+                       cx231xx_errdev("An underrun very likely occurred. "
+                                      "Ignoring it.\n");
                }
                return 0;
        default:
@@ -265,9 +263,8 @@ static int snd_pcm_alloc_vmalloc_buffer(struct snd_pcm_substream *subs,
 
 static struct snd_pcm_hardware snd_cx231xx_hw_capture = {
        .info = SNDRV_PCM_INFO_BLOCK_TRANSFER |
-               SNDRV_PCM_INFO_MMAP           |
-               SNDRV_PCM_INFO_INTERLEAVED    |
-               SNDRV_PCM_INFO_MMAP_VALID,
+           SNDRV_PCM_INFO_MMAP |
+           SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_MMAP_VALID,
 
        .formats = SNDRV_PCM_FMTBIT_S16_LE,
 
@@ -278,10 +275,10 @@ static struct snd_pcm_hardware snd_cx231xx_hw_capture = {
        .channels_min = 2,
        .channels_max = 2,
        .buffer_bytes_max = 62720 * 8,  /* just about the value in usbaudio.c */
-       .period_bytes_min = 64,             /* 12544/2, */
+       .period_bytes_min = 64, /* 12544/2, */
        .period_bytes_max = 12544,
        .periods_min = 2,
-       .periods_max = 98,                      /* 12544, */
+       .periods_max = 98,      /* 12544, */
 };
 
 static int snd_cx231xx_capture_open(struct snd_pcm_substream *substream)
@@ -294,29 +291,29 @@ static int snd_cx231xx_capture_open(struct snd_pcm_substream *substream)
 
        if (!dev) {
                cx231xx_errdev("BUG: cx231xx can't find device struct."
-                               " Can't proceed with open\n");
+                              " Can't proceed with open\n");
                return -ENODEV;
        }
 
        /* Sets volume, mute, etc */
        dev->mute = 0;
 
-    /* set alternate setting for audio interface */
-    ret = cx231xx_set_alt_setting(dev, INDEX_AUDIO, 1); /* 1 - 48000 samples per sec */
-    if (ret < 0) {
-        cx231xx_errdev("failed to set alternate setting !\n");
+       /* set alternate setting for audio interface */
+       ret = cx231xx_set_alt_setting(dev, INDEX_AUDIO, 1);     /* 1 - 48000 samples per sec */
+       if (ret < 0) {
+               cx231xx_errdev("failed to set alternate setting !\n");
 
-        return ret;
-    }
+               return ret;
+       }
 
-    /* inform hardware to start streaming */
-    ret = cx231xx_capture_start(dev, 1, Audio);
+       /* inform hardware to start streaming */
+       ret = cx231xx_capture_start(dev, 1, Audio);
 
        runtime->hw = snd_cx231xx_hw_capture;
 
-    mutex_lock(&dev->lock);
+       mutex_lock(&dev->lock);
        dev->adev.users++;
-    mutex_unlock(&dev->lock);
+       mutex_unlock(&dev->lock);
 
        snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
        dev->adev.capture_pcm_substream = substream;
@@ -327,26 +324,25 @@ static int snd_cx231xx_capture_open(struct snd_pcm_substream *substream)
 
 static int snd_cx231xx_pcm_close(struct snd_pcm_substream *substream)
 {
-    int ret;
+       int ret;
        struct cx231xx *dev = snd_pcm_substream_chip(substream);
 
-
        dprintk("closing device\n");
 
-    /* set alternate setting for audio interface */
-    ret = cx231xx_set_alt_setting(dev, INDEX_AUDIO, 0); /* 1 - 48000 samples per sec */
-    if (ret < 0) {
-        cx231xx_errdev("failed to set alternate setting !\n");
+       /* set alternate setting for audio interface */
+       ret = cx231xx_set_alt_setting(dev, INDEX_AUDIO, 0);     /* 1 - 48000 samples per sec */
+       if (ret < 0) {
+               cx231xx_errdev("failed to set alternate setting !\n");
 
-        return ret;
-    }
+               return ret;
+       }
 
-    /* inform hardware to start streaming */
-    ret = cx231xx_capture_start(dev, 0, Audio);
+       /* inform hardware to start streaming */
+       ret = cx231xx_capture_start(dev, 0, Audio);
 
        dev->mute = 1;
        mutex_lock(&dev->lock);
-    dev->adev.users--;
+       dev->adev.users--;
        mutex_unlock(&dev->lock);
 
        if (dev->adev.users == 0 && dev->adev.shutdown == 1) {
@@ -360,7 +356,7 @@ static int snd_cx231xx_pcm_close(struct snd_pcm_substream *substream)
 }
 
 static int snd_cx231xx_hw_capture_params(struct snd_pcm_substream *substream,
-                                       struct snd_pcm_hw_params *hw_params)
+                                        struct snd_pcm_hw_params *hw_params)
 {
        unsigned int channels, rate, format;
        int ret;
@@ -368,7 +364,7 @@ static int snd_cx231xx_hw_capture_params(struct snd_pcm_substream *substream,
        dprintk("Setting capture parameters\n");
 
        ret = snd_pcm_alloc_vmalloc_buffer(substream,
-                               params_buffer_bytes(hw_params));
+                                          params_buffer_bytes(hw_params));
        format = params_format(hw_params);
        rate = params_rate(hw_params);
        channels = params_channels(hw_params);
@@ -397,45 +393,45 @@ static int snd_cx231xx_prepare(struct snd_pcm_substream *substream)
 }
 
 static int snd_cx231xx_capture_trigger(struct snd_pcm_substream *substream,
-                                     int cmd)
+                                      int cmd)
 {
        struct cx231xx *dev = snd_pcm_substream_chip(substream);
-    int retval;
+       int retval;
 
+       dprintk("Should %s capture\n", (cmd == SNDRV_PCM_TRIGGER_START) ?
+               "start" : "stop");
 
-       dprintk("Should %s capture\n", (cmd == SNDRV_PCM_TRIGGER_START)?
-                                      "start": "stop");
-
-    spin_lock(&dev->adev.slock);
+       spin_lock(&dev->adev.slock);
        switch (cmd) {
        case SNDRV_PCM_TRIGGER_START:
-               cx231xx_cmd(dev, CX231XX_CAPTURE_STREAM_EN, CX231XX_START_AUDIO);
+               cx231xx_cmd(dev, CX231XX_CAPTURE_STREAM_EN,
+                           CX231XX_START_AUDIO);
                retval = 0;
                break;
        case SNDRV_PCM_TRIGGER_STOP:
-        cx231xx_cmd(dev, CX231XX_CAPTURE_STREAM_EN, CX231XX_STOP_AUDIO);
+               cx231xx_cmd(dev, CX231XX_CAPTURE_STREAM_EN, CX231XX_STOP_AUDIO);
                retval = 0;
-        break;
+               break;
        default:
                retval = -EINVAL;
        }
 
-    spin_unlock(&dev->adev.slock);
+       spin_unlock(&dev->adev.slock);
        return retval;
 }
 
 static snd_pcm_uframes_t snd_cx231xx_capture_pointer(struct snd_pcm_substream
-                                                   *substream)
+                                                    *substream)
 {
        struct cx231xx *dev;
-    unsigned long flags;
+       unsigned long flags;
        snd_pcm_uframes_t hwptr_done;
 
        dev = snd_pcm_substream_chip(substream);
 
-    spin_lock_irqsave(&dev->adev.slock, flags);
+       spin_lock_irqsave(&dev->adev.slock, flags);
        hwptr_done = dev->adev.hwptr_done_capture;
-    spin_unlock_irqrestore(&dev->adev.slock, flags);
+       spin_unlock_irqrestore(&dev->adev.slock, flags);
 
        return hwptr_done;
 }
@@ -449,26 +445,26 @@ static struct page *snd_pcm_get_vmalloc_page(struct snd_pcm_substream *subs,
 }
 
 static struct snd_pcm_ops snd_cx231xx_pcm_capture = {
-       .open      = snd_cx231xx_capture_open,
-       .close     = snd_cx231xx_pcm_close,
-       .ioctl     = snd_pcm_lib_ioctl,
+       .open = snd_cx231xx_capture_open,
+       .close = snd_cx231xx_pcm_close,
+       .ioctl = snd_pcm_lib_ioctl,
        .hw_params = snd_cx231xx_hw_capture_params,
-       .hw_free   = snd_cx231xx_hw_capture_free,
-       .prepare   = snd_cx231xx_prepare,
-       .trigger   = snd_cx231xx_capture_trigger,
-       .pointer   = snd_cx231xx_capture_pointer,
-       .page      = snd_pcm_get_vmalloc_page,
+       .hw_free = snd_cx231xx_hw_capture_free,
+       .prepare = snd_cx231xx_prepare,
+       .trigger = snd_cx231xx_capture_trigger,
+       .pointer = snd_cx231xx_capture_pointer,
+       .page = snd_pcm_get_vmalloc_page,
 };
 
 static int cx231xx_audio_init(struct cx231xx *dev)
 {
        struct cx231xx_audio *adev = &dev->adev;
-       struct snd_pcm      *pcm;
-       struct snd_card     *card;
-       static int          devnr;
-       int                 err;
-    struct usb_interface *uif;
-    int i, isoc_pipe = 0;
+       struct snd_pcm *pcm;
+       struct snd_card *card;
+       static int devnr;
+       int err;
+       struct usb_interface *uif;
+       int i, isoc_pipe = 0;
 
        if (dev->has_alsa_audio != 1) {
                /* This device does not support the extension (in this case
@@ -478,7 +474,7 @@ static int cx231xx_audio_init(struct cx231xx *dev)
        }
 
        cx231xx_info("cx231xx-audio.c: probing for cx231xx "
-                        "non standard usbaudio\n");
+                    "non standard usbaudio\n");
 
        card = snd_card_new(index[devnr], "Cx231xx Audio", THIS_MODULE, 0);
        if (card == NULL) {
@@ -492,7 +488,8 @@ static int cx231xx_audio_init(struct cx231xx *dev)
                return err;
        }
 
-       snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cx231xx_pcm_capture);
+       snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
+                       &snd_cx231xx_pcm_capture);
        pcm->info_flags = 0;
        pcm->private_data = dev;
        strcpy(pcm->name, "Conexant cx231xx Capture");
@@ -508,29 +505,35 @@ static int cx231xx_audio_init(struct cx231xx *dev)
        adev->sndcard = card;
        adev->udev = dev->udev;
 
-    /* compute alternate max packet sizes for Audio */
-    uif = dev->udev->actconfig->interface[dev->current_pcb_config.hs_config_info[0].interface_info.audio_index+1];
+       /* compute alternate max packet sizes for Audio */
+       uif =
+           dev->udev->actconfig->interface[dev->current_pcb_config.
+                                           hs_config_info[0].interface_info.
+                                           audio_index + 1];
 
-    adev->end_point_addr = le16_to_cpu(uif->altsetting[0].endpoint[isoc_pipe].desc.bEndpointAddress);
+       adev->end_point_addr =
+           le16_to_cpu(uif->altsetting[0].endpoint[isoc_pipe].desc.
+                       bEndpointAddress);
 
-    adev->num_alt = uif->num_altsetting;
-    cx231xx_info(": EndPoint Addr 0x%x, Alternate settings: %i\n", adev->end_point_addr,
-                                    adev->num_alt);
-    adev->alt_max_pkt_size = kmalloc(32 * adev->num_alt, GFP_KERNEL);
+       adev->num_alt = uif->num_altsetting;
+       cx231xx_info(": EndPoint Addr 0x%x, Alternate settings: %i\n",
+                    adev->end_point_addr, adev->num_alt);
+       adev->alt_max_pkt_size = kmalloc(32 * adev->num_alt, GFP_KERNEL);
 
-    if (adev->alt_max_pkt_size == NULL) {
-        cx231xx_errdev("out of memory!\n");
-        return -ENOMEM;
-    }
+       if (adev->alt_max_pkt_size == NULL) {
+               cx231xx_errdev("out of memory!\n");
+               return -ENOMEM;
+       }
 
-    for (i = 0; i < adev->num_alt ; i++) {
-        u16 tmp = le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].desc.
-                                               wMaxPacketSize);
-        adev->alt_max_pkt_size[i] =
-            (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1);
-        cx231xx_info("Alternate setting %i, max size= %i\n", i,
-                                       adev->alt_max_pkt_size[i]);
-    }
+       for (i = 0; i < adev->num_alt; i++) {
+               u16 tmp =
+                   le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].desc.
+                               wMaxPacketSize);
+               adev->alt_max_pkt_size[i] =
+                   (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1);
+               cx231xx_info("Alternate setting %i, max size= %i\n", i,
+                            adev->alt_max_pkt_size[i]);
+       }
 
        return 0;
 }
@@ -549,7 +552,7 @@ static int cx231xx_audio_fini(struct cx231xx *dev)
 
        if (dev->adev.sndcard) {
                snd_card_free(dev->adev.sndcard);
-        kfree(dev->adev.alt_max_pkt_size);
+               kfree(dev->adev.alt_max_pkt_size);
                dev->adev.sndcard = NULL;
        }
 
@@ -557,7 +560,7 @@ static int cx231xx_audio_fini(struct cx231xx *dev)
 }
 
 static struct cx231xx_ops audio_ops = {
-    .id   = CX231XX_AUDIO,
+       .id = CX231XX_AUDIO,
        .name = "Cx231xx Audio Extension",
        .init = cx231xx_audio_init,
        .fini = cx231xx_audio_fini,
index b559733..3c09b94 100644 (file)
 
 #include "cx231xx.h"
 
-
 /*************************************************************************************
  *            C O L I B R I - B L O C K    C O N T R O L   functions                 *
  *************************************************************************************/
 int cx231xx_colibri_init_super_block(struct cx231xx *dev, u32 ref_count)
 {
-    int status = 0;
-    u8 temp = 0;
-    u32 colibri_power_status = 0;
-    int i = 0;
-
-    /* super block initialize */
-    temp = (u8)(ref_count & 0xff);
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE2, 2, temp, 1);
-
-    status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE2, 2, &colibri_power_status, 1);
-
-    temp = (u8)((ref_count & 0x300) >> 8);
-    temp |= 0x40;
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE1, 2, temp, 1);
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_PLL2, 2, 0x0f, 1);
-
-    /* enable pll     */
-    while(colibri_power_status != 0x18)
-    {
-        status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_PWRDN, 2, 0x18, 1);
-        status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_PWRDN, 2, &colibri_power_status, 1);
-        colibri_power_status &= 0xff;
-        if(status < 0) {
-            cx231xx_info(": Init Super Block failed in sending/receiving cmds\n");
-            break;
-        }
-        i++;
-        if( i == 10) {
-            cx231xx_info(": Init Super Block force break in loop !!!!\n");
-            status = -1;
-            break;
-        }
-    }
-
-    if(status < 0 )
-        return status;
-
-    /* start tuning filter */
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE3, 2, 0x40, 1);
-    msleep(5);
-
-    /* exit tuning */
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE3, 2, 0x00, 1);
-
-    return status;
+       int status = 0;
+       u8 temp = 0;
+       u32 colibri_power_status = 0;
+       int i = 0;
+
+       /* super block initialize */
+       temp = (u8) (ref_count & 0xff);
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE2,
+                                  2, temp, 1);
+
+       status =
+           cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE2, 2,
+                                 &colibri_power_status, 1);
+
+       temp = (u8) ((ref_count & 0x300) >> 8);
+       temp |= 0x40;
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE1,
+                                  2, temp, 1);
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_PLL2, 2,
+                                  0x0f, 1);
+
+       /* enable pll     */
+       while (colibri_power_status != 0x18) {
+               status =
+                   cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                          SUP_BLK_PWRDN, 2, 0x18, 1);
+               status =
+                   cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                         SUP_BLK_PWRDN, 2,
+                                         &colibri_power_status, 1);
+               colibri_power_status &= 0xff;
+               if (status < 0) {
+                       cx231xx_info
+                           (": Init Super Block failed in sending/receiving cmds\n");
+                       break;
+               }
+               i++;
+               if (i == 10) {
+                       cx231xx_info
+                           (": Init Super Block force break in loop !!!!\n");
+                       status = -1;
+                       break;
+               }
+       }
+
+       if (status < 0)
+               return status;
+
+       /* start tuning filter */
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE3,
+                                  2, 0x40, 1);
+       msleep(5);
+
+       /* exit tuning */
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE3,
+                                  2, 0x00, 1);
+
+       return status;
 }
 
 int cx231xx_colibri_init_channels(struct cx231xx *dev)
 {
-    int status = 0;
-
-    /* power up all 3 channels, clear pd_buffer */
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_PWRDN_CLAMP_CH1, 2, 0x00, 1);
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_PWRDN_CLAMP_CH2, 2, 0x00, 1);
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_PWRDN_CLAMP_CH3, 2, 0x00, 1);
-
-    /* Enable quantizer calibration */
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_COM_QUANT, 2, 0x02, 1);
-
-    /* channel initialize, force modulator (fb) reset */
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_FB_FRCRST_CH1, 2, 0x17, 1);
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_FB_FRCRST_CH2, 2, 0x17, 1);
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_FB_FRCRST_CH3, 2, 0x17, 1);
-
-    /* start quantilizer calibration  */
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_CAL_ATEST_CH1, 2, 0x10, 1);
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_CAL_ATEST_CH2, 2, 0x10, 1);
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_CAL_ATEST_CH3, 2, 0x10, 1);
-    msleep(5);
-
-    /* exit modulator (fb) reset */
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_FB_FRCRST_CH1, 2, 0x07, 1);
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_FB_FRCRST_CH2, 2, 0x07, 1);
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_FB_FRCRST_CH3, 2, 0x07, 1);
-
-    /* enable the pre_clamp in each channel for single-ended input */
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_NTF_PRECLMP_EN_CH1, 2, 0xf0, 1);
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_NTF_PRECLMP_EN_CH2, 2, 0xf0, 1);
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_NTF_PRECLMP_EN_CH3, 2, 0xf0, 1);
-
-    /* use diode instead of resistor, so set term_en to 0, res_en to 0  */
-    status = cx231xx_reg_mask_write(dev, Colibri_DEVICE_ADDRESS, 8, ADC_QGAIN_RES_TRM_CH1, 3, 7, 0x00);
-    status = cx231xx_reg_mask_write(dev, Colibri_DEVICE_ADDRESS, 8, ADC_QGAIN_RES_TRM_CH2, 3, 7, 0x00);
-    status = cx231xx_reg_mask_write(dev, Colibri_DEVICE_ADDRESS, 8, ADC_QGAIN_RES_TRM_CH3, 3, 7, 0x00);
-
-    /* dynamic element matching off */
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_DCSERVO_DEM_CH1, 2, 0x03, 1);
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_DCSERVO_DEM_CH2, 2, 0x03, 1);
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_DCSERVO_DEM_CH3, 2, 0x03, 1);
-
-    return status;
+       int status = 0;
+
+       /* power up all 3 channels, clear pd_buffer */
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_PWRDN_CLAMP_CH1, 2, 0x00, 1);
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_PWRDN_CLAMP_CH2, 2, 0x00, 1);
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_PWRDN_CLAMP_CH3, 2, 0x00, 1);
+
+       /* Enable quantizer calibration */
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_COM_QUANT,
+                                  2, 0x02, 1);
+
+       /* channel initialize, force modulator (fb) reset */
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_FB_FRCRST_CH1, 2, 0x17, 1);
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_FB_FRCRST_CH2, 2, 0x17, 1);
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_FB_FRCRST_CH3, 2, 0x17, 1);
+
+       /* start quantilizer calibration  */
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_CAL_ATEST_CH1, 2, 0x10, 1);
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_CAL_ATEST_CH2, 2, 0x10, 1);
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_CAL_ATEST_CH3, 2, 0x10, 1);
+       msleep(5);
+
+       /* exit modulator (fb) reset */
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_FB_FRCRST_CH1, 2, 0x07, 1);
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_FB_FRCRST_CH2, 2, 0x07, 1);
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_FB_FRCRST_CH3, 2, 0x07, 1);
+
+       /* enable the pre_clamp in each channel for single-ended input */
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_NTF_PRECLMP_EN_CH1, 2, 0xf0, 1);
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_NTF_PRECLMP_EN_CH2, 2, 0xf0, 1);
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_NTF_PRECLMP_EN_CH3, 2, 0xf0, 1);
+
+       /* use diode instead of resistor, so set term_en to 0, res_en to 0  */
+       status =
+           cx231xx_reg_mask_write(dev, Colibri_DEVICE_ADDRESS, 8,
+                                  ADC_QGAIN_RES_TRM_CH1, 3, 7, 0x00);
+       status =
+           cx231xx_reg_mask_write(dev, Colibri_DEVICE_ADDRESS, 8,
+                                  ADC_QGAIN_RES_TRM_CH2, 3, 7, 0x00);
+       status =
+           cx231xx_reg_mask_write(dev, Colibri_DEVICE_ADDRESS, 8,
+                                  ADC_QGAIN_RES_TRM_CH3, 3, 7, 0x00);
+
+       /* dynamic element matching off */
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_DCSERVO_DEM_CH1, 2, 0x03, 1);
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_DCSERVO_DEM_CH2, 2, 0x03, 1);
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_DCSERVO_DEM_CH3, 2, 0x03, 1);
+
+       return status;
 }
 
 int cx231xx_colibri_setup_AFE_for_baseband(struct cx231xx *dev)
 {
-    u32 c_value = 0;
-    int status = 0;
+       u32 c_value = 0;
+       int status = 0;
 
-    status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_PWRDN_CLAMP_CH2, 2, &c_value, 1);
-    c_value &= (~(0x50));
-    status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_PWRDN_CLAMP_CH2, 2, c_value, 1);
+       status =
+           cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                 ADC_PWRDN_CLAMP_CH2, 2, &c_value, 1);
+       c_value &= (~(0x50));
+       status =
+           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                  ADC_PWRDN_CLAMP_CH2, 2, c_value, 1);
 
-    return status;
+       return status;
 }
 
 /*
@@ -157,559 +222,802 @@ int cx231xx_colibri_setup_AFE_for_baseband(struct cx231xx *dev)
 */
 int cx231xx_colibri_set_input_mux(struct cx231xx *dev, u32 input_mux)
 {
-    u8 ch1_setting = (u8)input_mux;
-    u8 ch2_setting = (u8)(input_mux >> 8);
-    u8 ch3_setting = (u8)(input_mux >> 16);
-    int status = 0;
-    u32 value = 0;
-
-    if(ch1_setting != 0)
-    {
-        status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH1, 2, &value, 1);
-        value &= (!INPUT_SEL_MASK);
-        value |= (ch1_setting-1)<<4;
-        value &= 0xff;
-        status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH1, 2, value, 1);
-    }
-
-    if(ch2_setting != 0)
-    {
-        status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH2, 2, &value, 1);
-        value &= (!INPUT_SEL_MASK);
-        value |= (ch2_setting-1)<<4;
-        value &= 0xff;
-        status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH2, 2, value, 1);
-    }
-
-    /* For ch3_setting, the value to put in the register is 7 less than the input number */
-    if(ch3_setting != 0)
-    {
-        status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH3, 2, &value, 1);
-        value &= (!INPUT_SEL_MASK);
-        value |= (ch3_setting-1)<<4;
-        value &= 0xff;
-        status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH3, 2, value, 1);
-    }
-
-    return status;
+       u8 ch1_setting = (u8) input_mux;
+       u8 ch2_setting = (u8) (input_mux >> 8);
+       u8 ch3_setting = (u8) (input_mux >> 16);
+       int status = 0;
+       u32 value = 0;
+
+       if (ch1_setting != 0) {
+               status =
+                   cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                         ADC_INPUT_CH1, 2, &value, 1);
+               value &= (!INPUT_SEL_MASK);
+               value |= (ch1_setting - 1) << 4;
+               value &= 0xff;
+               status =
+                   cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                          ADC_INPUT_CH1, 2, value, 1);
+       }
+
+       if (ch2_setting != 0) {
+               status =
+                   cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                         ADC_INPUT_CH2, 2, &value, 1);
+               value &= (!INPUT_SEL_MASK);
+               value |= (ch2_setting - 1) << 4;
+               value &= 0xff;
+               status =
+                   cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                          ADC_INPUT_CH2, 2, value, 1);
+       }
+
+       /* For ch3_setting, the value to put in the register is 7 less than the input number */
+       if (ch3_setting != 0) {
+               status =
+                   cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                         ADC_INPUT_CH3, 2, &value, 1);
+               value &= (!INPUT_SEL_MASK);
+               value |= (ch3_setting - 1) << 4;
+               value &= 0xff;
+               status =
+                   cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                          ADC_INPUT_CH3, 2, value, 1);
+       }
+
+       return status;
 }
 
 int cx231xx_colibri_set_mode(struct cx231xx *dev, enum AFE_MODE mode)
 {
-    int status = 0;
-
-    switch(mode) {
-        case AFE_MODE_LOW_IF:
-            /* SetupAFEforLowIF();  */
-            break;
-        case AFE_MODE_BASEBAND:
-            status = cx231xx_colibri_setup_AFE_for_baseband(dev);
-            break;
-        case AFE_MODE_EU_HI_IF:
-            /* SetupAFEforEuHiIF(); */
-            break;
-        case AFE_MODE_US_HI_IF:
-            /* SetupAFEforUsHiIF(); */
-            break;
-        case AFE_MODE_JAPAN_HI_IF:
-            /* SetupAFEforJapanHiIF(); */
-            break;
-    }
-
-    if((mode != dev->colibri_mode) && (dev->video_input == CX231XX_VMUX_TELEVISION)) {
-        status = cx231xx_colibri_adjust_ref_count(dev, CX231XX_VMUX_TELEVISION);
-    }
-
-    dev->colibri_mode  = mode;
-
-    return status;
+       int status = 0;
+
+       switch (mode) {
+       case AFE_MODE_LOW_IF:
+               /* SetupAFEforLowIF();  */
+               break;
+       case AFE_MODE_BASEBAND:
+               status = cx231xx_colibri_setup_AFE_for_baseband(dev);
+               break;
+       case AFE_MODE_EU_HI_IF:
+               /* SetupAFEforEuHiIF(); */
+               break;
+       case AFE_MODE_US_HI_IF:
+               /* SetupAFEforUsHiIF(); */
+               break;
+       case AFE_MODE_JAPAN_HI_IF:
+               /* SetupAFEforJapanHiIF(); */
+               break;
+       }
+
+       if ((mode != dev->colibri_mode)
+           && (dev->video_input == CX231XX_VMUX_TELEVISION)) {
+               status =
+                   cx231xx_colibri_adjust_ref_count(dev,
+                                                    CX231XX_VMUX_TELEVISION);
+       }
+
+       dev->colibri_mode = mode;
+
+       return status;
 }
 
 /* For power saving in the EVK */
 int cx231xx_colibri_update_power_control(struct cx231xx *dev, AV_MODE avmode)
 {
-   u32 colibri_power_status = 0;
-   int status = 0;
-
-   switch (dev->model) {
-       case CX231XX_BOARD_CNXT_RDE_250:
-       case CX231XX_BOARD_CNXT_RDU_250:
-
-              if(avmode==POLARIS_AVMODE_ANALOGT_TV)
-              {
-                      while(colibri_power_status != 0x18) {
-                   status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     SUP_BLK_PWRDN, 2, 0x18, 1);
-                   status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     SUP_BLK_PWRDN, 2, &colibri_power_status, 1);
-                   if(status < 0 )
-                       break;
-                      }
-
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH1, 2, 0x00, 1);
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH2, 2, 0x00, 1);
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH3, 2, 0x00, 1);
-              }
-           else if(avmode==POLARIS_AVMODE_DIGITAL)  {
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH1, 2, 0x70, 1);
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH2, 2, 0x70, 1);
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH3, 2, 0x70, 1);
-
-               status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     SUP_BLK_PWRDN, 2, &colibri_power_status, 1);
-                      colibri_power_status |=0x07;
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     SUP_BLK_PWRDN, 2, colibri_power_status, 1);
-              }
-              else if(avmode==POLARIS_AVMODE_ENXTERNAL_AV)  {
-
-                      while(colibri_power_status != 0x18) {
-                              status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     SUP_BLK_PWRDN, 2, 0x18, 1);
-                   status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     SUP_BLK_PWRDN, 2, &colibri_power_status, 1);
-                   if(status < 0 )
-                       break;
-                      }
-
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH1, 2, 0x00, 1);
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH2, 2, 0x00, 1);
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH3, 2, 0x00, 1);
-              }
-              else {
-                      cx231xx_info("Invalid AV mode input\n");
-               status = -1;
-              }
-              break;
-       default:
-              if(avmode==POLARIS_AVMODE_ANALOGT_TV)
-              {
-                      while(colibri_power_status != 0x18)  {
-                              status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     SUP_BLK_PWRDN, 2, 0x18, 1);
-                   status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     SUP_BLK_PWRDN, 2, &colibri_power_status, 1);
-                   if(status < 0 )
-                       break;
-                      }
-
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH1, 2, 0x40, 1);
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH2, 2, 0x40, 1);
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH3, 2, 0x00, 1);
-           }
-           else if(avmode==POLARIS_AVMODE_DIGITAL)  {
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH1, 2, 0x70, 1);
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH2, 2, 0x70, 1);
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH3, 2, 0x70, 1);
-
-               status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     SUP_BLK_PWRDN, 2, &colibri_power_status, 1);
-               colibri_power_status |=0x07;
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     SUP_BLK_PWRDN, 2, colibri_power_status, 1);
-           }
-           else if(avmode==POLARIS_AVMODE_ENXTERNAL_AV) {
-               while(colibri_power_status != 0x18)  {
-                              status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     SUP_BLK_PWRDN, 2, 0x18, 1);
-                   status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     SUP_BLK_PWRDN, 2, &colibri_power_status, 1);
-                   if(status < 0 )
-                       break;
-                      }
-
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH1, 2, 0x00, 1);
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH2, 2, 0x00, 1);
-               status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                                     ADC_PWRDN_CLAMP_CH3, 2, 0x40, 1);
-           }
-           else  {
-                cx231xx_info("Invalid AV mode input\n");
-                status = -1;
-           }
-    } /* switch  */
-
-    return status;
+       u32 colibri_power_status = 0;
+       int status = 0;
+
+       switch (dev->model) {
+       case CX231XX_BOARD_CNXT_RDE_250:
+       case CX231XX_BOARD_CNXT_RDU_250:
+
+               if (avmode == POLARIS_AVMODE_ANALOGT_TV) {
+                       while (colibri_power_status != 0x18) {
+                               status =
+                                   cx231xx_write_i2c_data(dev,
+                                                          Colibri_DEVICE_ADDRESS,
+                                                          SUP_BLK_PWRDN, 2,
+                                                          0x18, 1);
+                               status =
+                                   cx231xx_read_i2c_data(dev,
+                                                         Colibri_DEVICE_ADDRESS,
+                                                         SUP_BLK_PWRDN, 2,
+                                                         &colibri_power_status,
+                                                         1);
+                               if (status < 0)
+                                       break;
+                       }
+
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH1, 2, 0x00,
+                                                  1);
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH2, 2, 0x00,
+                                                  1);
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH3, 2, 0x00,
+                                                  1);
+               } else if (avmode == POLARIS_AVMODE_DIGITAL) {
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH1, 2, 0x70,
+                                                  1);
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH2, 2, 0x70,
+                                                  1);
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH3, 2, 0x70,
+                                                  1);
+
+                       status =
+                           cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                 SUP_BLK_PWRDN, 2,
+                                                 &colibri_power_status, 1);
+                       colibri_power_status |= 0x07;
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  SUP_BLK_PWRDN, 2,
+                                                  colibri_power_status, 1);
+               } else if (avmode == POLARIS_AVMODE_ENXTERNAL_AV) {
+
+                       while (colibri_power_status != 0x18) {
+                               status =
+                                   cx231xx_write_i2c_data(dev,
+                                                          Colibri_DEVICE_ADDRESS,
+                                                          SUP_BLK_PWRDN, 2,
+                                                          0x18, 1);
+                               status =
+                                   cx231xx_read_i2c_data(dev,
+                                                         Colibri_DEVICE_ADDRESS,
+                                                         SUP_BLK_PWRDN, 2,
+                                                         &colibri_power_status,
+                                                         1);
+                               if (status < 0)
+                                       break;
+                       }
+
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH1, 2, 0x00,
+                                                  1);
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH2, 2, 0x00,
+                                                  1);
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH3, 2, 0x00,
+                                                  1);
+               } else {
+                       cx231xx_info("Invalid AV mode input\n");
+                       status = -1;
+               }
+               break;
+       default:
+               if (avmode == POLARIS_AVMODE_ANALOGT_TV) {
+                       while (colibri_power_status != 0x18) {
+                               status =
+                                   cx231xx_write_i2c_data(dev,
+                                                          Colibri_DEVICE_ADDRESS,
+                                                          SUP_BLK_PWRDN, 2,
+                                                          0x18, 1);
+                               status =
+                                   cx231xx_read_i2c_data(dev,
+                                                         Colibri_DEVICE_ADDRESS,
+                                                         SUP_BLK_PWRDN, 2,
+                                                         &colibri_power_status,
+                                                         1);
+                               if (status < 0)
+                                       break;
+                       }
+
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH1, 2, 0x40,
+                                                  1);
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH2, 2, 0x40,
+                                                  1);
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH3, 2, 0x00,
+                                                  1);
+               } else if (avmode == POLARIS_AVMODE_DIGITAL) {
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH1, 2, 0x70,
+                                                  1);
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH2, 2, 0x70,
+                                                  1);
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH3, 2, 0x70,
+                                                  1);
+
+                       status =
+                           cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                 SUP_BLK_PWRDN, 2,
+                                                 &colibri_power_status, 1);
+                       colibri_power_status |= 0x07;
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  SUP_BLK_PWRDN, 2,
+                                                  colibri_power_status, 1);
+               } else if (avmode == POLARIS_AVMODE_ENXTERNAL_AV) {
+                       while (colibri_power_status != 0x18) {
+                               status =
+                                   cx231xx_write_i2c_data(dev,
+                                                          Colibri_DEVICE_ADDRESS,
+                                                          SUP_BLK_PWRDN, 2,
+                                                          0x18, 1);
+                               status =
+                                   cx231xx_read_i2c_data(dev,
+                                                         Colibri_DEVICE_ADDRESS,
+                                                         SUP_BLK_PWRDN, 2,
+                                                         &colibri_power_status,
+                                                         1);
+                               if (status < 0)
+                                       break;
+                       }
+
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH1, 2, 0x00,
+                                                  1);
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH2, 2, 0x00,
+                                                  1);
+                       status =
+                           cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                                  ADC_PWRDN_CLAMP_CH3, 2, 0x40,
+                                                  1);
+               } else {
+                       cx231xx_info("Invalid AV mode input\n");
+                       status = -1;
+               }
+       }                       /* switch  */
+
+       return status;
 }
 
 int cx231xx_colibri_adjust_ref_count(struct cx231xx *dev, u32 video_input)
 {
-    u32 input_mode = 0;
-    u32 ntf_mode = 0;
-    int status = 0;
-
-    dev->video_input = video_input;
-
-    if(video_input == CX231XX_VMUX_TELEVISION) {
-        status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH3, 2, &input_mode, 1);
-        status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                            ADC_NTF_PRECLMP_EN_CH3, 2, &ntf_mode, 1);
-    }
-    else {
-        status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH1, 2, &input_mode, 1);
-        status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
-                            ADC_NTF_PRECLMP_EN_CH1, 2, &ntf_mode, 1);
-    }
-
-    input_mode = (ntf_mode & 0x3) | ((input_mode & 0x6) << 1);
-
-    switch(input_mode)
-    {
-    case SINGLE_ENDED:
-        dev->colibri_ref_count = 0x23C;
-        break;
-    case LOW_IF:
-        dev->colibri_ref_count = 0x24C;
-        break;
-    case EU_IF:
-        dev->colibri_ref_count = 0x258;
-        break;
-    case US_IF:
-        dev->colibri_ref_count = 0x260;
-        break;
-    default:
-        break;
-    }
-
-    status = cx231xx_colibri_init_super_block(dev, dev->colibri_ref_count);
-
-    return status;
-}
+       u32 input_mode = 0;
+       u32 ntf_mode = 0;
+       int status = 0;
+
+       dev->video_input = video_input;
+
+       if (video_input == CX231XX_VMUX_TELEVISION) {
+               status =
+                   cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                         ADC_INPUT_CH3, 2, &input_mode, 1);
+               status =
+                   cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                         ADC_NTF_PRECLMP_EN_CH3, 2, &ntf_mode,
+                                         1);
+       } else {
+               status =
+                   cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                         ADC_INPUT_CH1, 2, &input_mode, 1);
+               status =
+                   cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
+                                         ADC_NTF_PRECLMP_EN_CH1, 2, &ntf_mode,
+                                         1);
+       }
 
+       input_mode = (ntf_mode & 0x3) | ((input_mode & 0x6) << 1);
+
+       switch (input_mode) {
+       case SINGLE_ENDED:
+               dev->colibri_ref_count = 0x23C;
+               break;
+       case LOW_IF:
+               dev->colibri_ref_count = 0x24C;
+               break;
+       case EU_IF:
+               dev->colibri_ref_count = 0x258;
+               break;
+       case US_IF:
+               dev->colibri_ref_count = 0x260;
+               break;
+       default:
+               break;
+       }
+
+       status = cx231xx_colibri_init_super_block(dev, dev->colibri_ref_count);
 
+       return status;
+}
 
 /*************************************************************************************
  *       V I D E O / A U D I O    D E C O D E R    C O N T R O L   functions         *
  *************************************************************************************/
 int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input)
 {
-    int status = 0;
-
-    switch(INPUT(input)->type) {
-        case CX231XX_VMUX_COMPOSITE1:
-        case CX231XX_VMUX_SVIDEO:
-            if((dev->current_pcb_config.type == USB_BUS_POWER) &&
-                        (dev->power_mode != POLARIS_AVMODE_ENXTERNAL_AV)) {
-                status = cx231xx_set_power_mode(dev, POLARIS_AVMODE_ENXTERNAL_AV); /* External AV */
-                if (status < 0) {
-                    cx231xx_errdev("%s: cx231xx_set_power_mode : Failed to set Power - errCode [%d]!\n",
-                                   __func__, status);
-                           return status;
-                   }
-            }
-            status = cx231xx_set_decoder_video_input(dev, INPUT(input)->type, INPUT(input)->vmux);
-            break;
-        case CX231XX_VMUX_TELEVISION:
-        case CX231XX_VMUX_CABLE:
-            if((dev->current_pcb_config.type == USB_BUS_POWER) &&
-                        (dev->power_mode != POLARIS_AVMODE_ANALOGT_TV)) {
-                status = cx231xx_set_power_mode(dev, POLARIS_AVMODE_ANALOGT_TV); /* Tuner */
-                if (status < 0) {
-                    cx231xx_errdev("%s: cx231xx_set_power_mode : Failed to set Power - errCode [%d]!\n",
-                                   __func__, status);
-                           return status;
-                   }
-            }
-            status = cx231xx_set_decoder_video_input(dev, CX231XX_VMUX_COMPOSITE1, INPUT(input)->vmux);
-            break;
-        default:
-            cx231xx_errdev("%s: cx231xx_set_power_mode : Unknown Input %d !\n",
-                                   __func__, INPUT(input)->type);
-            break;
-    }
-
-    /* save the selection */
-    dev->video_input = input;
-
-    return status;
+       int status = 0;
+
+       switch (INPUT(input)->type) {
+       case CX231XX_VMUX_COMPOSITE1:
+       case CX231XX_VMUX_SVIDEO:
+               if ((dev->current_pcb_config.type == USB_BUS_POWER) &&
+                   (dev->power_mode != POLARIS_AVMODE_ENXTERNAL_AV)) {
+                       status = cx231xx_set_power_mode(dev, POLARIS_AVMODE_ENXTERNAL_AV);      /* External AV */
+                       if (status < 0) {
+                               cx231xx_errdev
+                                   ("%s: cx231xx_set_power_mode : Failed to set Power - errCode [%d]!\n",
+                                    __func__, status);
+                               return status;
+                       }
+               }
+               status =
+                   cx231xx_set_decoder_video_input(dev, INPUT(input)->type,
+                                                   INPUT(input)->vmux);
+               break;
+       case CX231XX_VMUX_TELEVISION:
+       case CX231XX_VMUX_CABLE:
+               if ((dev->current_pcb_config.type == USB_BUS_POWER) &&
+                   (dev->power_mode != POLARIS_AVMODE_ANALOGT_TV)) {
+                       status = cx231xx_set_power_mode(dev, POLARIS_AVMODE_ANALOGT_TV);        /* Tuner */
+                       if (status < 0) {
+                               cx231xx_errdev
+                                   ("%s: cx231xx_set_power_mode : Failed to set Power - errCode [%d]!\n",
+                                    __func__, status);
+                               return status;
+                       }
+               }
+               status =
+                   cx231xx_set_decoder_video_input(dev,
+                                                   CX231XX_VMUX_COMPOSITE1,
+                                                   INPUT(input)->vmux);
+               break;
+       default:
+               cx231xx_errdev
+                   ("%s: cx231xx_set_power_mode : Unknown Input %d !\n",
+                    __func__, INPUT(input)->type);
+               break;
+       }
+
+       /* save the selection */
+       dev->video_input = input;
+
+       return status;
 }
 
 int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input)
 {
-    int status = 0;
-    u32 value = 0;
-
-    if(pin_type != dev->video_input) {
-        status = cx231xx_colibri_adjust_ref_count(dev, pin_type);
-        if(status < 0 ) {
-            cx231xx_errdev("%s: cx231xx_colibri_adjust_ref_count :Failed to set Colibri input mux - errCode [%d]!\n",
-                                       __func__, status);
-            return status;
-        }
-    }
-
-    /* call colibri block to set video inputs */
-    status = cx231xx_colibri_set_input_mux(dev, input);
-    if(status < 0 ) {
-        cx231xx_errdev("%s: cx231xx_colibri_set_input_mux :Failed to set Colibri input mux - errCode [%d]!\n",
-                                   __func__, status);
-        return status;
-    }
-
-    switch(pin_type) {
-        case CX231XX_VMUX_COMPOSITE1:
-            {
-                status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, &value, 4);
-                value |= (0<<13)|(1<<4);
-                value  &= ~(1<<5);
-
-                value &= (~(0x1FF8000));        /* set [24:23] [22:15] to 0  */
-                value |= 0x1000000;             /* set FUNC_MODE[24:23] = 2 IF_MOD[22:15] = 0  */
-                status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, value, 4);
-
-                status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, OUT_CTRL1, 2, &value, 4);
-                value |= (1<<7);
-                status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, OUT_CTRL1, 2, value, 4);
-
-                /* Set vip 1.1 output mode */
-                status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       OUT_CTRL1, FLD_OUT_MODE, OUT_MODE_VIP11);
-
-                /* Tell DIF object to go to baseband mode  */
-                status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
-                if (status < 0) {
-                           cx231xx_errdev("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
-                                   __func__, status);
-                           return status;
-                   }
-
-                /* Read the DFE_CTRL1 register */
-                status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, &value, 4);
-
-                /* enable the VBI_GATE_EN */
-                value |= FLD_VBI_GATE_EN;
-
-                /* Enable the auto-VGA enable */
-                value |= FLD_VGA_AUTO_EN;
-
-                /* Write it back */
-                status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, value, 4);
-
-                /* Disable auto config of registers */
-                status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       MODE_CTRL, FLD_ACFG_DIS, cx231xx_set_field(FLD_ACFG_DIS, 1));
-
-                /* Set CVBS input mode */
-                status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       MODE_CTRL, FLD_INPUT_MODE,
-                                       cx231xx_set_field(FLD_INPUT_MODE, INPUT_MODE_CVBS_0));
-            }
-            break;
-        case CX231XX_VMUX_SVIDEO:
-            {
-                /* Disable the use of  DIF */
-
-                status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, &value, 4);
-
-                value &= (~(0x1FF8000));    /* set [24:23] [22:15] to 0 */
-                value |= 0x1000010;         /* set FUNC_MODE[24:23] = 2
-                                               IF_MOD[22:15] = 0 DCR_BYP_CH2[4:4] = 1; */
-                status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, value, 4);
-
-                /* Tell DIF object to go to baseband mode */
-                status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
-                if (status < 0) {
-                           cx231xx_errdev("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
-                                   __func__, status);
-                           return status;
-                   }
-
-                /* Read the DFE_CTRL1 register */
-                status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, &value, 4);
-
-                /* enable the VBI_GATE_EN */
-                value |= FLD_VBI_GATE_EN;
-
-                /* Enable the auto-VGA enable */
-                value |= FLD_VGA_AUTO_EN;
-
-                /* Write it back */
-                status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, value, 4);
-
-                /* Disable auto config of registers  */
-                status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       MODE_CTRL, FLD_ACFG_DIS, cx231xx_set_field(FLD_ACFG_DIS, 1));
-
-                /* Set YC input mode */
-                status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       MODE_CTRL, FLD_INPUT_MODE,
-                                       cx231xx_set_field(FLD_INPUT_MODE, INPUT_MODE_YC_1));
-
-                /* Chroma to ADC2 */
-                status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, &value, 4);
-                value |= FLD_CHROMA_IN_SEL;         /* set the chroma in select */
-
-                /* Clear VGA_SEL_CH2 and VGA_SEL_CH3 (bits 7 and 8)  This sets them to use video
-                   rather than audio.  Only one of the two will be in use. */
-                value &= ~(FLD_VGA_SEL_CH2 | FLD_VGA_SEL_CH3);
-
-                status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, value, 4);
-
-                status = cx231xx_colibri_set_mode(dev, AFE_MODE_BASEBAND);
-            }
-            break;
-        case CX231XX_VMUX_TELEVISION:
-        case CX231XX_VMUX_CABLE:
-        default:
-            {
-                switch(dev->model)  {
-                       case CX231XX_BOARD_CNXT_RDE_250:
-                       case CX231XX_BOARD_CNXT_RDU_250:
-                               {
-                                       /* Disable the use of  DIF   */
-
-                        status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, &value, 4);
-                                       value |= (0<<13)|(1<<4);
-                                       value  &= ~(1<<5);
-
-                                       value &= (~(0x1FF8000));    /* set [24:23] [22:15] to 0 */
-                                       value |= 0x1000000;         /* set FUNC_MODE[24:23] = 2 IF_MOD[22:15] = 0 */
-                        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, value, 4);
-
-                        status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, OUT_CTRL1, 2, &value, 4);
-                                       value |= (1<<7);
-                        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, OUT_CTRL1, 2, value, 4);
-
-                                       /* Set vip 1.1 output mode */
-                        status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       OUT_CTRL1, FLD_OUT_MODE, OUT_MODE_VIP11);
-
-                        /* Tell DIF object to go to baseband mode */
-                        status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
-                        if (status < 0) {
-                                   cx231xx_errdev("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
-                                           __func__, status);
-                                   return status;
-                           }
-
-                                       /* Read the DFE_CTRL1 register */
-                        status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, &value, 4);
-
-                                       /* enable the VBI_GATE_EN */
-                                       value |= FLD_VBI_GATE_EN;
-
-                                       /* Enable the auto-VGA enable */
-                                       value |= FLD_VGA_AUTO_EN;
-
-                                       /* Write it back */
-                        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, value, 4);
-
-                                       /* Disable auto config of registers */
-                        status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       MODE_CTRL, FLD_ACFG_DIS, cx231xx_set_field(FLD_ACFG_DIS, 1));
-
-                        /* Set CVBS input mode */
-                        status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       MODE_CTRL, FLD_INPUT_MODE,
-                                       cx231xx_set_field(FLD_INPUT_MODE, INPUT_MODE_CVBS_0));
-                               }
-                               break;
-                       default:
-                               {
-                                       /* Enable the DIF for the tuner */
-
-                                       /* Reinitialize the DIF */
-                        status = cx231xx_dif_set_standard(dev, dev->norm);
-                        if (status < 0) {
-                                   cx231xx_errdev("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
-                                           __func__, status);
-                                   return status;
-                           }
-
-                                       /* Make sure bypass is cleared */
-                        status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_MISC_CTRL, 2, &value, 4);
-
-                                       /* Clear the bypass bit */
-                                       value &= ~FLD_DIF_DIF_BYPASS;
-
-                                       /* Enable the use of the DIF block */
-                        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_MISC_CTRL, 2, value, 4);
-
-                                       /* Read the DFE_CTRL1 register */
-                        status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, &value, 4);
-
-                                       /* Disable the VBI_GATE_EN */
-                                       value &= ~FLD_VBI_GATE_EN;
-
-                                       /* Enable the auto-VGA enable, AGC, and set the skip count to 2 */
-                                       value |= FLD_VGA_AUTO_EN | FLD_AGC_AUTO_EN | 0x00200000;
-
-                                       /* Write it back */
-                        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, value, 4);
-
-                                       /* Wait 15 ms */
-                                       msleep(1);
-
-                                       /* Disable the auto-VGA enable AGC */
-                                       value &= ~(FLD_VGA_AUTO_EN);
-
-                                       /* Write it back */
-                        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, value, 4);
-
-                                       /* Enable Polaris B0 AGC output */
-                        status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PIN_CTRL, 2, &value, 4);
-                                       value |=(FLD_OEF_AGC_RF)|(FLD_OEF_AGC_IFVGA)|(FLD_OEF_AGC_IF);
-                        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PIN_CTRL, 2, value, 4);
-
-                                       /* Set vip 1.1 output mode */
-                        status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       OUT_CTRL1, FLD_OUT_MODE, OUT_MODE_VIP11);
-
-                                       /* Disable auto config of registers */
-                        status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       MODE_CTRL, FLD_ACFG_DIS, cx231xx_set_field(FLD_ACFG_DIS, 1));
-
-                                       /* Set CVBS input mode */
-                        status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       MODE_CTRL, FLD_INPUT_MODE,
-                                       cx231xx_set_field(FLD_INPUT_MODE, INPUT_MODE_CVBS_0));
-
-                                       /* Set some bits in AFE_CTRL so that channel 2 or 3 is ready to receive audio */
-                                       /* Clear clamp for channels 2 and 3      (bit 16-17) */
-                                       /* Clear droop comp                      (bit 19-20) */
-                                       /* Set VGA_SEL (for audio control)       (bit 7-8) */
-                        status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, &value, 4);
-
-                                       value |= FLD_VGA_SEL_CH3 | FLD_VGA_SEL_CH2;
-
-                        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, value, 4);
-                               }
-                               break;
-
-                       }
-            }
-            break;
-    }
+       int status = 0;
+       u32 value = 0;
+
+       if (pin_type != dev->video_input) {
+               status = cx231xx_colibri_adjust_ref_count(dev, pin_type);
+               if (status < 0) {
+                       cx231xx_errdev
+                           ("%s: cx231xx_colibri_adjust_ref_count :Failed to set Colibri input mux - errCode [%d]!\n",
+                            __func__, status);
+                       return status;
+               }
+       }
 
-    /* Set raw VBI mode */
-    status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       OUT_CTRL1, FLD_VBIHACTRAW_EN,
-                                       cx231xx_set_field(FLD_VBIHACTRAW_EN, 1));
-
-    status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, OUT_CTRL1, 2, &value, 4);
-    if(value & 0x02) {
-        value |=(1<<19);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, OUT_CTRL1, 2, value, 4);
-    }
-
-    return status;
+       /* call colibri block to set video inputs */
+       status = cx231xx_colibri_set_input_mux(dev, input);
+       if (status < 0) {
+               cx231xx_errdev
+                   ("%s: cx231xx_colibri_set_input_mux :Failed to set Colibri input mux - errCode [%d]!\n",
+                    __func__, status);
+               return status;
+       }
+
+       switch (pin_type) {
+       case CX231XX_VMUX_COMPOSITE1:
+               {
+                       status =
+                           cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                                 AFE_CTRL, 2, &value, 4);
+                       value |= (0 << 13) | (1 << 4);
+                       value &= ~(1 << 5);
+
+                       value &= (~(0x1FF8000));        /* set [24:23] [22:15] to 0  */
+                       value |= 0x1000000;     /* set FUNC_MODE[24:23] = 2 IF_MOD[22:15] = 0  */
+                       status =
+                           cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                                  AFE_CTRL, 2, value, 4);
+
+                       status =
+                           cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                                 OUT_CTRL1, 2, &value, 4);
+                       value |= (1 << 7);
+                       status =
+                           cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                                  OUT_CTRL1, 2, value, 4);
+
+                       /* Set vip 1.1 output mode */
+                       status =
+                           cx231xx_read_modify_write_i2c_dword(dev,
+                                                               HAMMERHEAD_I2C_ADDRESS,
+                                                               OUT_CTRL1,
+                                                               FLD_OUT_MODE,
+                                                               OUT_MODE_VIP11);
+
+                       /* Tell DIF object to go to baseband mode  */
+                       status =
+                           cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
+                       if (status < 0) {
+                               cx231xx_errdev
+                                   ("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
+                                    __func__, status);
+                               return status;
+                       }
+
+                       /* Read the DFE_CTRL1 register */
+                       status =
+                           cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                                 DFE_CTRL1, 2, &value, 4);
+
+                       /* enable the VBI_GATE_EN */
+                       value |= FLD_VBI_GATE_EN;
+
+                       /* Enable the auto-VGA enable */
+                       value |= FLD_VGA_AUTO_EN;
+
+                       /* Write it back */
+                       status =
+                           cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                                  DFE_CTRL1, 2, value, 4);
+
+                       /* Disable auto config of registers */
+                       status =
+                           cx231xx_read_modify_write_i2c_dword(dev,
+                                                               HAMMERHEAD_I2C_ADDRESS,
+                                                               MODE_CTRL,
+                                                               FLD_ACFG_DIS,
+                                                               cx231xx_set_field
+                                                               (FLD_ACFG_DIS,
+                                                                1));
+
+                       /* Set CVBS input mode */
+                       status =
+                           cx231xx_read_modify_write_i2c_dword(dev,
+                                                               HAMMERHEAD_I2C_ADDRESS,
+                                                               MODE_CTRL,
+                                                               FLD_INPUT_MODE,
+                                                               cx231xx_set_field
+                                                               (FLD_INPUT_MODE,
+                                                                INPUT_MODE_CVBS_0));
+               }
+               break;
+       case CX231XX_VMUX_SVIDEO:
+               {
+                       /* Disable the use of  DIF */
+
+                       status =
+                           cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                                 AFE_CTRL, 2, &value, 4);
+
+                       value &= (~(0x1FF8000));        /* set [24:23] [22:15] to 0 */
+                       value |= 0x1000010;     /* set FUNC_MODE[24:23] = 2
+                                                  IF_MOD[22:15] = 0 DCR_BYP_CH2[4:4] = 1; */
+                       status =
+                           cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                                  AFE_CTRL, 2, value, 4);
+
+                       /* Tell DIF object to go to baseband mode */
+                       status =
+                           cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
+                       if (status < 0) {
+                               cx231xx_errdev
+                                   ("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
+                                    __func__, status);
+                               return status;
+                       }
+
+                       /* Read the DFE_CTRL1 register */
+                       status =
+                           cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                                 DFE_CTRL1, 2, &value, 4);
+
+                       /* enable the VBI_GATE_EN */
+                       value |= FLD_VBI_GATE_EN;
+
+                       /* Enable the auto-VGA enable */
+                       value |= FLD_VGA_AUTO_EN;
+
+                       /* Write it back */
+                       status =
+                           cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                                  DFE_CTRL1, 2, value, 4);
+
+                       /* Disable auto config of registers  */
+                       status =
+                           cx231xx_read_modify_write_i2c_dword(dev,
+                                                               HAMMERHEAD_I2C_ADDRESS,
+                                                               MODE_CTRL,
+                                                               FLD_ACFG_DIS,
+                                                               cx231xx_set_field
+                                                               (FLD_ACFG_DIS,
+                                                                1));
+
+                       /* Set YC input mode */
+                       status =
+                           cx231xx_read_modify_write_i2c_dword(dev,
+                                                               HAMMERHEAD_I2C_ADDRESS,
+                                                               MODE_CTRL,
+                                                               FLD_INPUT_MODE,
+                                                               cx231xx_set_field
+                                                               (FLD_INPUT_MODE,
+                                                                INPUT_MODE_YC_1));
+
+                       /* Chroma to ADC2 */
+                       status =
+                           cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                                 AFE_CTRL, 2, &value, 4);
+                       value |= FLD_CHROMA_IN_SEL;     /* set the chroma in select */
+
+                       /* Clear VGA_SEL_CH2 and VGA_SEL_CH3 (bits 7 and 8)  This sets them to use video
+                          rather than audio.  Only one of the two will be in use. */
+                       value &= ~(FLD_VGA_SEL_CH2 | FLD_VGA_SEL_CH3);
+
+                       status =
+                           cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                                  AFE_CTRL, 2, value, 4);
+
+                       status =
+                           cx231xx_colibri_set_mode(dev, AFE_MODE_BASEBAND);
+               }
+               break;
+       case CX231XX_VMUX_TELEVISION:
+       case CX231XX_VMUX_CABLE:
+       default:
+               {
+                       switch (dev->model) {
+                       case CX231XX_BOARD_CNXT_RDE_250:
+                       case CX231XX_BOARD_CNXT_RDU_250:
+                               {
+                                       /* Disable the use of  DIF   */
+
+                                       status =
+                                           cx231xx_read_i2c_data(dev,
+                                                                 HAMMERHEAD_I2C_ADDRESS,
+                                                                 AFE_CTRL, 2,
+                                                                 &value, 4);
+                                       value |= (0 << 13) | (1 << 4);
+                                       value &= ~(1 << 5);
+
+                                       value &= (~(0x1FF8000));        /* set [24:23] [22:15] to 0 */
+                                       value |= 0x1000000;     /* set FUNC_MODE[24:23] = 2 IF_MOD[22:15] = 0 */
+                                       status =
+                                           cx231xx_write_i2c_data(dev,
+                                                                  HAMMERHEAD_I2C_ADDRESS,
+                                                                  AFE_CTRL, 2,
+                                                                  value, 4);
+
+                                       status =
+                                           cx231xx_read_i2c_data(dev,
+                                                                 HAMMERHEAD_I2C_ADDRESS,
+                                                                 OUT_CTRL1, 2,
+                                                                 &value, 4);
+                                       value |= (1 << 7);
+                                       status =
+                                           cx231xx_write_i2c_data(dev,
+                                                                  HAMMERHEAD_I2C_ADDRESS,
+                                                                  OUT_CTRL1, 2,
+                                                                  value, 4);
+
+                                       /* Set vip 1.1 output mode */
+                                       status =
+                                           cx231xx_read_modify_write_i2c_dword
+                                           (dev, HAMMERHEAD_I2C_ADDRESS,
+                                            OUT_CTRL1, FLD_OUT_MODE,
+                                            OUT_MODE_VIP11);
+
+                                       /* Tell DIF object to go to baseband mode */
+                                       status =
+                                           cx231xx_dif_set_standard(dev,
+                                                                    DIF_USE_BASEBAND);
+                                       if (status < 0) {
+                                               cx231xx_errdev
+                                                   ("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
+                                                    __func__, status);
+                                               return status;
+                                       }
+
+                                       /* Read the DFE_CTRL1 register */
+                                       status =
+                                           cx231xx_read_i2c_data(dev,
+                                                                 HAMMERHEAD_I2C_ADDRESS,
+                                                                 DFE_CTRL1, 2,
+                                                                 &value, 4);
+
+                                       /* enable the VBI_GATE_EN */
+                                       value |= FLD_VBI_GATE_EN;
+
+                                       /* Enable the auto-VGA enable */
+                                       value |= FLD_VGA_AUTO_EN;
+
+                                       /* Write it back */
+                                       status =
+                                           cx231xx_write_i2c_data(dev,
+                                                                  HAMMERHEAD_I2C_ADDRESS,
+                                                                  DFE_CTRL1, 2,
+                                                                  value, 4);
+
+                                       /* Disable auto config of registers */
+                                       status =
+                                           cx231xx_read_modify_write_i2c_dword
+                                           (dev, HAMMERHEAD_I2C_ADDRESS,
+                                            MODE_CTRL, FLD_ACFG_DIS,
+                                            cx231xx_set_field(FLD_ACFG_DIS,
+                                                              1));
+
+                                       /* Set CVBS input mode */
+                                       status =
+                                           cx231xx_read_modify_write_i2c_dword
+                                           (dev, HAMMERHEAD_I2C_ADDRESS,
+                                            MODE_CTRL, FLD_INPUT_MODE,
+                                            cx231xx_set_field(FLD_INPUT_MODE,
+                                                              INPUT_MODE_CVBS_0));
+                               }
+                               break;
+                       default:
+                               {
+                                       /* Enable the DIF for the tuner */
+
+                                       /* Reinitialize the DIF */
+                                       status =
+                                           cx231xx_dif_set_standard(dev,
+                                                                    dev->norm);
+                                       if (status < 0) {
+                                               cx231xx_errdev
+                                                   ("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
+                                                    __func__, status);
+                                               return status;
+                                       }
+
+                                       /* Make sure bypass is cleared */
+                                       status =
+                                           cx231xx_read_i2c_data(dev,
+                                                                 HAMMERHEAD_I2C_ADDRESS,
+                                                                 DIF_MISC_CTRL,
+                                                                 2, &value, 4);
+
+                                       /* Clear the bypass bit */
+                                       value &= ~FLD_DIF_DIF_BYPASS;
+
+                                       /* Enable the use of the DIF block */
+                                       status =
+                                           cx231xx_write_i2c_data(dev,
+                                                                  HAMMERHEAD_I2C_ADDRESS,
+                                                                  DIF_MISC_CTRL,
+                                                                  2, value, 4);
+
+                                       /* Read the DFE_CTRL1 register */
+                                       status =
+                                           cx231xx_read_i2c_data(dev,
+                                                                 HAMMERHEAD_I2C_ADDRESS,
+                                                                 DFE_CTRL1, 2,
+                                                                 &value, 4);
+
+                                       /* Disable the VBI_GATE_EN */
+                                       value &= ~FLD_VBI_GATE_EN;
+
+                                       /* Enable the auto-VGA enable, AGC, and set the skip count to 2 */
+                                       value |=
+                                           FLD_VGA_AUTO_EN | FLD_AGC_AUTO_EN |
+                                           0x00200000;
+
+                                       /* Write it back */
+                                       status =
+                                           cx231xx_write_i2c_data(dev,
+                                                                  HAMMERHEAD_I2C_ADDRESS,
+                                                                  DFE_CTRL1, 2,
+                                                                  value, 4);
+
+                                       /* Wait 15 ms */
+                                       msleep(1);
+
+                                       /* Disable the auto-VGA enable AGC */
+                                       value &= ~(FLD_VGA_AUTO_EN);
+
+                                       /* Write it back */
+                                       status =
+                                           cx231xx_write_i2c_data(dev,
+                                                                  HAMMERHEAD_I2C_ADDRESS,
+                                                                  DFE_CTRL1, 2,
+                                                                  value, 4);
+
+                                       /* Enable Polaris B0 AGC output */
+                                       status =
+                                           cx231xx_read_i2c_data(dev,
+                                                                 HAMMERHEAD_I2C_ADDRESS,
+                                                                 PIN_CTRL, 2,
+                                                                 &value, 4);
+                                       value |=
+                                           (FLD_OEF_AGC_RF) |
+                                           (FLD_OEF_AGC_IFVGA) |
+                                           (FLD_OEF_AGC_IF);
+                                       status =
+                                           cx231xx_write_i2c_data(dev,
+                                                                  HAMMERHEAD_I2C_ADDRESS,
+                                                                  PIN_CTRL, 2,
+                                                                  value, 4);
+
+                                       /* Set vip 1.1 output mode */
+                                       status =
+                                           cx231xx_read_modify_write_i2c_dword
+                                           (dev, HAMMERHEAD_I2C_ADDRESS,
+                                            OUT_CTRL1, FLD_OUT_MODE,
+                                            OUT_MODE_VIP11);
+
+                                       /* Disable auto config of registers */
+                                       status =
+                                           cx231xx_read_modify_write_i2c_dword
+                                           (dev, HAMMERHEAD_I2C_ADDRESS,
+                                            MODE_CTRL, FLD_ACFG_DIS,
+                                            cx231xx_set_field(FLD_ACFG_DIS,
+                                                              1));
+
+                                       /* Set CVBS input mode */
+                                       status =
+                                           cx231xx_read_modify_write_i2c_dword
+                                           (dev, HAMMERHEAD_I2C_ADDRESS,
+                                            MODE_CTRL, FLD_INPUT_MODE,
+                                            cx231xx_set_field(FLD_INPUT_MODE,
+                                                              INPUT_MODE_CVBS_0));
+
+                                       /* Set some bits in AFE_CTRL so that channel 2 or 3 is ready to receive audio */
+                                       /* Clear clamp for channels 2 and 3      (bit 16-17) */
+                                       /* Clear droop comp                      (bit 19-20) */
+                                       /* Set VGA_SEL (for audio control)       (bit 7-8) */
+                                       status =
+                                           cx231xx_read_i2c_data(dev,
+                                                                 HAMMERHEAD_I2C_ADDRESS,
+                                                                 AFE_CTRL, 2,
+                                                                 &value, 4);
+
+                                       value |=
+                                           FLD_VGA_SEL_CH3 | FLD_VGA_SEL_CH2;
+
+                                       status =
+                                           cx231xx_write_i2c_data(dev,
+                                                                  HAMMERHEAD_I2C_ADDRESS,
+                                                                  AFE_CTRL, 2,
+                                                                  value, 4);
+                               }
+                               break;
+
+                       }
+               }
+               break;
+       }
+
+       /* Set raw VBI mode */
+       status =
+           cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
+                                               OUT_CTRL1, FLD_VBIHACTRAW_EN,
+                                               cx231xx_set_field
+                                               (FLD_VBIHACTRAW_EN, 1));
+
+       status =
+           cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, OUT_CTRL1, 2,
+                                 &value, 4);
+       if (value & 0x02) {
+               value |= (1 << 19);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          OUT_CTRL1, 2, value, 4);
+       }
+
+       return status;
 }
 
 /*
@@ -718,207 +1026,310 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input)
  */
 int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev)
 {
-    int status = 0;
-
-    cx231xx_info("do_mode_ctrl_overrides : 0x%x\n", (unsigned int)dev->norm);
-
-    /* Change the DFE_CTRL3 bp_percent to fix flagging */
-    status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL3, 2, 0xCD3F0280, 4);
-
-    if( dev->norm & (V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_PAL_M) ) {
-        cx231xx_info("do_mode_ctrl_overrides NTSC\n");
-
-            /* Move the close caption lines out of active video, adjust the active video start point */
-            status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       VERT_TIM_CTRL, FLD_VBLANK_CNT,0x18);
-            status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       VERT_TIM_CTRL, FLD_VACTIVE_CNT,0x1E6000);
-            status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       VERT_TIM_CTRL, FLD_V656BLANK_CNT,0x1E000000);
-
-            status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       HORIZ_TIM_CTRL, FLD_HBLANK_CNT,
-                                       cx231xx_set_field(FLD_HBLANK_CNT, 0x79));
-    } else if ( dev->norm & ( V4L2_STD_PAL_B | V4L2_STD_PAL_G | V4L2_STD_PAL_D |
-        V4L2_STD_PAL_I | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc) ) {
-            cx231xx_info("do_mode_ctrl_overrides PAL\n");
-            status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       VERT_TIM_CTRL, FLD_VBLANK_CNT,0x24);
-            /* Adjust the active video horizontal start point */
-            status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       HORIZ_TIM_CTRL, FLD_HBLANK_CNT,
-                                       cx231xx_set_field(FLD_HBLANK_CNT, 0x85));
-    } else if (dev->norm & ( V4L2_STD_SECAM_B | V4L2_STD_SECAM_D | V4L2_STD_SECAM_G |
-                            V4L2_STD_SECAM_K | V4L2_STD_SECAM_K1 | V4L2_STD_SECAM_L |
-                            V4L2_STD_SECAM_LC) ) {
-            cx231xx_info("do_mode_ctrl_overrides SECAM\n");
-            status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       VERT_TIM_CTRL, FLD_VBLANK_CNT,0x24);
-            /* Adjust the active video horizontal start point */
-            status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                       HORIZ_TIM_CTRL, FLD_HBLANK_CNT,
-                                       cx231xx_set_field(FLD_HBLANK_CNT, 0x85));
-    }
-
-    return status;
+       int status = 0;
+
+       cx231xx_info("do_mode_ctrl_overrides : 0x%x\n",
+                    (unsigned int)dev->norm);
+
+       /* Change the DFE_CTRL3 bp_percent to fix flagging */
+       status =
+           cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL3, 2,
+                                  0xCD3F0280, 4);
+
+       if (dev->norm & (V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_PAL_M)) {
+               cx231xx_info("do_mode_ctrl_overrides NTSC\n");
+
+               /* Move the close caption lines out of active video, adjust the active video start point */
+               status =
+                   cx231xx_read_modify_write_i2c_dword(dev,
+                                                       HAMMERHEAD_I2C_ADDRESS,
+                                                       VERT_TIM_CTRL,
+                                                       FLD_VBLANK_CNT, 0x18);
+               status =
+                   cx231xx_read_modify_write_i2c_dword(dev,
+                                                       HAMMERHEAD_I2C_ADDRESS,
+                                                       VERT_TIM_CTRL,
+                                                       FLD_VACTIVE_CNT,
+                                                       0x1E6000);
+               status =
+                   cx231xx_read_modify_write_i2c_dword(dev,
+                                                       HAMMERHEAD_I2C_ADDRESS,
+                                                       VERT_TIM_CTRL,
+                                                       FLD_V656BLANK_CNT,
+                                                       0x1E000000);
+
+               status =
+                   cx231xx_read_modify_write_i2c_dword(dev,
+                                                       HAMMERHEAD_I2C_ADDRESS,
+                                                       HORIZ_TIM_CTRL,
+                                                       FLD_HBLANK_CNT,
+                                                       cx231xx_set_field
+                                                       (FLD_HBLANK_CNT, 0x79));
+       } else if (dev->
+                  norm & (V4L2_STD_PAL_B | V4L2_STD_PAL_G | V4L2_STD_PAL_D |
+                          V4L2_STD_PAL_I | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc)) {
+               cx231xx_info("do_mode_ctrl_overrides PAL\n");
+               status =
+                   cx231xx_read_modify_write_i2c_dword(dev,
+                                                       HAMMERHEAD_I2C_ADDRESS,
+                                                       VERT_TIM_CTRL,
+                                                       FLD_VBLANK_CNT, 0x24);
+               /* Adjust the active video horizontal start point */
+               status =
+                   cx231xx_read_modify_write_i2c_dword(dev,
+                                                       HAMMERHEAD_I2C_ADDRESS,
+                                                       HORIZ_TIM_CTRL,
+                                                       FLD_HBLANK_CNT,
+                                                       cx231xx_set_field
+                                                       (FLD_HBLANK_CNT, 0x85));
+       } else if (dev->
+                  norm & (V4L2_STD_SECAM_B | V4L2_STD_SECAM_D |
+                          V4L2_STD_SECAM_G | V4L2_STD_SECAM_K |
+                          V4L2_STD_SECAM_K1 | V4L2_STD_SECAM_L |
+                          V4L2_STD_SECAM_LC)) {
+               cx231xx_info("do_mode_ctrl_overrides SECAM\n");
+               status =
+                   cx231xx_read_modify_write_i2c_dword(dev,
+                                                       HAMMERHEAD_I2C_ADDRESS,
+                                                       VERT_TIM_CTRL,
+                                                       FLD_VBLANK_CNT, 0x24);
+               /* Adjust the active video horizontal start point */
+               status =
+                   cx231xx_read_modify_write_i2c_dword(dev,
+                                                       HAMMERHEAD_I2C_ADDRESS,
+                                                       HORIZ_TIM_CTRL,
+                                                       FLD_HBLANK_CNT,
+                                                       cx231xx_set_field
+                                                       (FLD_HBLANK_CNT, 0x85));
+       }
+
+       return status;
 }
 
 int cx231xx_set_audio_input(struct cx231xx *dev, u8 input)
 {
-    int status = 0;
-    enum AUDIO_INPUT ainput = AUDIO_INPUT_LINE;
-
-    switch(INPUT(input)->amux) {
-        case CX231XX_AMUX_VIDEO:
-            ainput = AUDIO_INPUT_TUNER_TV;
-            break;
-        case CX231XX_AMUX_LINE_IN:
-            status = cx231xx_flatiron_set_audio_input(dev, input);
-            ainput = AUDIO_INPUT_LINE;
-            break;
-        default:
-            break;
-    }
-
-    status = cx231xx_set_audio_decoder_input(dev, ainput);
-
-    return status;
+       int status = 0;
+       enum AUDIO_INPUT ainput = AUDIO_INPUT_LINE;
+
+       switch (INPUT(input)->amux) {
+       case CX231XX_AMUX_VIDEO:
+               ainput = AUDIO_INPUT_TUNER_TV;
+               break;
+       case CX231XX_AMUX_LINE_IN:
+               status = cx231xx_flatiron_set_audio_input(dev, input);
+               ainput = AUDIO_INPUT_LINE;
+               break;
+       default:
+               break;
+       }
+
+       status = cx231xx_set_audio_decoder_input(dev, ainput);
+
+       return status;
 }
 
-int cx231xx_set_audio_decoder_input(struct cx231xx *dev, enum AUDIO_INPUT audio_input)
+int cx231xx_set_audio_decoder_input(struct cx231xx *dev,
+                                   enum AUDIO_INPUT audio_input)
 {
-    u32 dwval;
-    int status;
-    u32 gen_ctrl;
-    u32 value = 0;
-
-    /* Put it in soft reset   */
-    status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2, &gen_ctrl, 1);
-    gen_ctrl |= 1;
-    status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2, gen_ctrl, 1);
-
-    switch(audio_input)
-    {
-    case AUDIO_INPUT_LINE:
-
-        /* setup AUD_IO control from Merlin paralle output */
-        value = cx231xx_set_field(FLD_AUD_CHAN1_SRC, AUD_CHAN_SRC_PARALLEL);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AUD_IO_CTRL, 2, value, 4);
-
-        /* setup input to Merlin, SRC2 connect to AC97
-           bypass upsample-by-2, slave mode, sony mode, left justify
-           adr 091c, dat 01000000 */
-        status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AC97_CTL, 2, &dwval, 4);
-
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AC97_CTL, 2, (dwval | FLD_AC97_UP2X_BYPASS), 4);
-
-        /* select the parallel1 and SRC3 */
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, BAND_OUT_SEL, 2,
-                     cx231xx_set_field(FLD_SRC3_IN_SEL, 0x0)|
-                     cx231xx_set_field(FLD_SRC3_CLK_SEL, 0x0)|
-                     cx231xx_set_field(FLD_PARALLEL1_SRC_SEL, 0x0), 4);
-
-        /* unmute all, AC97 in, independence mode
-          adr 08d0, data 0x00063073 */
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_CTL1, 2, 0x00063073, 4);
-
-        /* set AVC maximum threshold, adr 08d4, dat ffff0024 */
-        status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_VOL_CTL, 2, &dwval, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_VOL_CTL, 2,
-                            (dwval | FLD_PATH1_AVC_THRESHOLD), 4);
-
-        /* set SC maximum threshold, adr 08ec, dat ffffb3a3 */
-        status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_SC_CTL, 2, &dwval, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_SC_CTL, 2,
-                            (dwval | FLD_PATH1_SC_THRESHOLD), 4);
-        break;
-
-    case AUDIO_INPUT_TUNER_TV:
-    default:
-
-         /* Setup SRC sources and clocks */
-         status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, BAND_OUT_SEL, 2,
-                cx231xx_set_field(FLD_SRC6_IN_SEL, 0x00)|
-                cx231xx_set_field(FLD_SRC6_CLK_SEL, 0x01)|
-                cx231xx_set_field(FLD_SRC5_IN_SEL, 0x00)|
-                cx231xx_set_field(FLD_SRC5_CLK_SEL, 0x02)|
-                cx231xx_set_field(FLD_SRC4_IN_SEL, 0x02)|
-                cx231xx_set_field(FLD_SRC4_CLK_SEL, 0x03)|
-                cx231xx_set_field(FLD_SRC3_IN_SEL, 0x00)|
-                cx231xx_set_field(FLD_SRC3_CLK_SEL, 0x00)|
-                cx231xx_set_field(FLD_BASEBAND_BYPASS_CTL, 0x00)|
-                cx231xx_set_field(FLD_AC97_SRC_SEL, 0x03)|
-                cx231xx_set_field(FLD_I2S_SRC_SEL, 0x00)|
-                cx231xx_set_field(FLD_PARALLEL2_SRC_SEL, 0x02)|
-                cx231xx_set_field(FLD_PARALLEL1_SRC_SEL, 0x01) , 4);
-
-         /* Setup the AUD_IO control */
-         status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AUD_IO_CTRL, 2,
-                cx231xx_set_field(FLD_I2S_PORT_DIR, 0x00)|
-                cx231xx_set_field(FLD_I2S_OUT_SRC, 0x00)|
-                cx231xx_set_field(FLD_AUD_CHAN3_SRC,0x00)|
-                cx231xx_set_field(FLD_AUD_CHAN2_SRC, 0x00)|
-                cx231xx_set_field(FLD_AUD_CHAN1_SRC,0x03 ), 4);
-
-         status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_CTL1, 2, 0x1F063870, 4);
-
-         /* setAudioStandard(_audio_standard); */
-
-         status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_CTL1, 2, 0x00063870, 4);
-            switch(dev->model)
-            {
-                case CX231XX_BOARD_CNXT_RDE_250:
-                case CX231XX_BOARD_CNXT_RDU_250:
-                 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
-                                               CHIP_CTRL, FLD_SIF_EN,
-                                               cx231xx_set_field(FLD_SIF_EN, 1));
-                       break;
-                default:
-                break;
-            }
-         break;
-
-    case AUDIO_INPUT_TUNER_FM:
-        /*  use SIF for FM radio
-        setupFM();
-        setAudioStandard(_audio_standard);
-        */
-        break;
-
-    case AUDIO_INPUT_MUTE:
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_CTL1, 2, 0x1F011012, 4);
-        break;
-    }
-
-    /* Take it out of soft reset */
-    status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2, &gen_ctrl, 1);
-    gen_ctrl &= ~1;
-    status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2, gen_ctrl, 1);
-
-    return status;
-}
+       u32 dwval;
+       int status;
+       u32 gen_ctrl;
+       u32 value = 0;
+
+       /* Put it in soft reset   */
+       status =
+           cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2,
+                                 &gen_ctrl, 1);
+       gen_ctrl |= 1;
+       status =
+           cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2,
+                                  gen_ctrl, 1);
+
+       switch (audio_input) {
+       case AUDIO_INPUT_LINE:
+
+               /* setup AUD_IO control from Merlin paralle output */
+               value =
+                   cx231xx_set_field(FLD_AUD_CHAN1_SRC, AUD_CHAN_SRC_PARALLEL);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          AUD_IO_CTRL, 2, value, 4);
+
+               /* setup input to Merlin, SRC2 connect to AC97
+                  bypass upsample-by-2, slave mode, sony mode, left justify
+                  adr 091c, dat 01000000 */
+               status =
+                   cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AC97_CTL,
+                                         2, &dwval, 4);
+
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          AC97_CTL, 2,
+                                          (dwval | FLD_AC97_UP2X_BYPASS), 4);
+
+               /* select the parallel1 and SRC3 */
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          BAND_OUT_SEL, 2,
+                                          cx231xx_set_field(FLD_SRC3_IN_SEL,
+                                                            0x0) |
+                                          cx231xx_set_field(FLD_SRC3_CLK_SEL,
+                                                            0x0) |
+                                          cx231xx_set_field
+                                          (FLD_PARALLEL1_SRC_SEL, 0x0), 4);
+
+               /* unmute all, AC97 in, independence mode
+                  adr 08d0, data 0x00063073 */
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          PATH1_CTL1, 2, 0x00063073, 4);
+
+               /* set AVC maximum threshold, adr 08d4, dat ffff0024 */
+               status =
+                   cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                         PATH1_VOL_CTL, 2, &dwval, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          PATH1_VOL_CTL, 2,
+                                          (dwval | FLD_PATH1_AVC_THRESHOLD),
+                                          4);
+
+               /* set SC maximum threshold, adr 08ec, dat ffffb3a3 */
+               status =
+                   cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                         PATH1_SC_CTL, 2, &dwval, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          PATH1_SC_CTL, 2,
+                                          (dwval | FLD_PATH1_SC_THRESHOLD), 4);
+               break;
+
+       case AUDIO_INPUT_TUNER_TV:
+       default:
+
+               /* Setup SRC sources and clocks */
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          BAND_OUT_SEL, 2,
+                                          cx231xx_set_field(FLD_SRC6_IN_SEL,
+                                                            0x00) |
+                                          cx231xx_set_field(FLD_SRC6_CLK_SEL,
+                                                            0x01) |
+                                          cx231xx_set_field(FLD_SRC5_IN_SEL,
+                                                            0x00) |
+                                          cx231xx_set_field(FLD_SRC5_CLK_SEL,
+                                                            0x02) |
+                                          cx231xx_set_field(FLD_SRC4_IN_SEL,
+                                                            0x02) |
+                                          cx231xx_set_field(FLD_SRC4_CLK_SEL,
+                                                            0x03) |
+                                          cx231xx_set_field(FLD_SRC3_IN_SEL,
+                                                            0x00) |
+                                          cx231xx_set_field(FLD_SRC3_CLK_SEL,
+                                                            0x00) |
+                                          cx231xx_set_field
+                                          (FLD_BASEBAND_BYPASS_CTL,
+                                           0x00) |
+                                          cx231xx_set_field(FLD_AC97_SRC_SEL,
+                                                            0x03) |
+                                          cx231xx_set_field(FLD_I2S_SRC_SEL,
+                                                            0x00) |
+                                          cx231xx_set_field
+                                          (FLD_PARALLEL2_SRC_SEL,
+                                           0x02) |
+                                          cx231xx_set_field
+                                          (FLD_PARALLEL1_SRC_SEL, 0x01), 4);
+
+               /* Setup the AUD_IO control */
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          AUD_IO_CTRL, 2,
+                                          cx231xx_set_field(FLD_I2S_PORT_DIR,
+                                                            0x00) |
+                                          cx231xx_set_field(FLD_I2S_OUT_SRC,
+                                                            0x00) |
+                                          cx231xx_set_field(FLD_AUD_CHAN3_SRC,
+                                                            0x00) |
+                                          cx231xx_set_field(FLD_AUD_CHAN2_SRC,
+                                                            0x00) |
+                                          cx231xx_set_field(FLD_AUD_CHAN1_SRC,
+                                                            0x03), 4);
+
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          PATH1_CTL1, 2, 0x1F063870, 4);
+
+               /* setAudioStandard(_audio_standard); */
+
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          PATH1_CTL1, 2, 0x00063870, 4);
+               switch (dev->model) {
+               case CX231XX_BOARD_CNXT_RDE_250:
+               case CX231XX_BOARD_CNXT_RDU_250:
+                       status =
+                           cx231xx_read_modify_write_i2c_dword(dev,
+                                                               HAMMERHEAD_I2C_ADDRESS,
+                                                               CHIP_CTRL,
+                                                               FLD_SIF_EN,
+                                                               cx231xx_set_field
+                                                               (FLD_SIF_EN,
+                                                                1));
+                       break;
+               default:
+                       break;
+               }
+               break;
+
+       case AUDIO_INPUT_TUNER_FM:
+               /*  use SIF for FM radio
+                  setupFM();
+                  setAudioStandard(_audio_standard);
+                */
+               break;
+
+       case AUDIO_INPUT_MUTE:
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          PATH1_CTL1, 2, 0x1F011012, 4);
+               break;
+       }
 
+       /* Take it out of soft reset */
+       status =
+           cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2,
+                                 &gen_ctrl, 1);
+       gen_ctrl &= ~1;
+       status =
+           cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2,
+                                  gen_ctrl, 1);
 
+       return status;
+}
 
 /* Set resolution of the video */
 int cx231xx_resolution_set(struct cx231xx *dev)
 {
        int width, height;
-    u32 hscale, vscale;
-    int status = 0;
+       u32 hscale, vscale;
+       int status = 0;
 
        width = dev->width;
        height = dev->height;
 
-    get_scale(dev,width, height,&hscale, &vscale);
+       get_scale(dev, width, height, &hscale, &vscale);
 
-    /* set horzontal scale */
-    status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, HSCALE_CTRL, 2, hscale, 4);
+       /* set horzontal scale */
+       status =
+           cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, HSCALE_CTRL, 2,
+                                  hscale, 4);
 
-    /* set vertical scale */
-    status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, VSCALE_CTRL, 2, vscale, 4);
+       /* set vertical scale */
+       status =
+           cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, VSCALE_CTRL, 2,
+                                  vscale, 4);
 
-    return status;
+       return status;
 }
 
 /*************************************************************************************
@@ -926,397 +1337,697 @@ int cx231xx_resolution_set(struct cx231xx *dev)
  *************************************************************************************/
 int cx231xx_init_ctrl_pin_status(struct cx231xx *dev)
 {
-    u32 value;
-    int status = 0;
+       u32 value;
+       int status = 0;
 
-    status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PIN_CTRL, 2, &value, 4);
-    value |=(~dev->board.ctl_pin_status_mask);
-    status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PIN_CTRL, 2, value, 4);
+       status =
+           cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PIN_CTRL, 2,
+                                 &value, 4);
+       value |= (~dev->board.ctl_pin_status_mask);
+       status =
+           cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PIN_CTRL, 2,
+                                  value, 4);
 
-    return status;
+       return status;
 }
 
-int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev, u8 analog_or_digital)
+int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev,
+                                             u8 analog_or_digital)
 {
-    int status = 0;
+       int status = 0;
 
-    /* first set the direction to output */
-    status = cx231xx_set_gpio_direction(dev, dev->board.agc_analog_digital_select_gpio, 1);
+       /* first set the direction to output */
+       status =
+           cx231xx_set_gpio_direction(dev,
+                                      dev->board.
+                                      agc_analog_digital_select_gpio, 1);
 
-    /* 0 - demod ; 1 - Analog mode */
-    status = cx231xx_set_gpio_value(dev, dev->board.agc_analog_digital_select_gpio,
-                                    analog_or_digital);
+       /* 0 - demod ; 1 - Analog mode */
+       status =
+           cx231xx_set_gpio_value(dev,
+                                  dev->board.agc_analog_digital_select_gpio,
+                                  analog_or_digital);
 
-    return status;
+       return status;
 }
 
 int cx231xx_enable_i2c_for_tuner(struct cx231xx *dev, u8 I2CIndex)
 {
-    u8 value[4] ={0,0,0,0};
-    int status = 0;
+       u8 value[4] = { 0, 0, 0, 0 };
+       int status = 0;
 
-    cx231xx_info("Changing the i2c port for tuner to %d\n",I2CIndex);
+       cx231xx_info("Changing the i2c port for tuner to %d\n", I2CIndex);
 
-    status = cx231xx_read_ctrl_reg(dev,VRT_GET_REGISTER, PWR_CTL_EN, value, 4);
-    if(status < 0)
-        return status;
+       status =
+           cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, 4);
+       if (status < 0)
+               return status;
 
-    if(I2CIndex==I2C_1) {
-        if(value[0] & I2C_DEMOD_EN) {
-            value[0] &= ~I2C_DEMOD_EN;
-            status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-        }
-    } else  {
-        if(!(value[0] & I2C_DEMOD_EN)) {
-            value[0] |= I2C_DEMOD_EN;
-            status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-        }
-    }
+       if (I2CIndex == I2C_1) {
+               if (value[0] & I2C_DEMOD_EN) {
+                       value[0] &= ~I2C_DEMOD_EN;
+                       status =
+                           cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
+                                                  PWR_CTL_EN, value, 4);
+               }
+       } else {
+               if (!(value[0] & I2C_DEMOD_EN)) {
+                       value[0] |= I2C_DEMOD_EN;
+                       status =
+                           cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
+                                                  PWR_CTL_EN, value, 4);
+               }
+       }
 
-    return status;
+       return status;
 
 }
 
-
 /*************************************************************************************
  *                     D I F - B L O C K    C O N T R O L   functions                *
  *************************************************************************************/
 int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode,
-                                          u32 function_mode, u32 standard)
+                                         u32 function_mode, u32 standard)
 {
-    int status = 0;
-
-    if(mode == V4L2_TUNER_RADIO) {
-        /* C2HH */
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                            AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1);           /* lo if big signal */
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                            AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode); /* FUNC_MODE = DIF */
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                            AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xFF);          /* IF_MODE */
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                            AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1);             /* no inv */
-    }
-    else {
-        switch(standard) {
-            case V4L2_STD_NTSC_M:                                           /* 75 IRE Setup */
-            case V4L2_STD_NTSC_M_JP:                                        /* Japan,  0 IRE Setup */
-            case V4L2_STD_PAL_M:
-            case V4L2_STD_PAL_N:
-            case V4L2_STD_PAL_Nc:
-                 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                                AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1);           /* lo if big signal */
-                 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                                AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode); /* FUNC_MODE = DIF */
-                 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                                AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xb);           /* IF_MODE */
-                 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                                AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1);             /* no inv */
-                 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                                AUD_IO_CTRL, 0, 31, 0x00000003);                /* 0x124, AUD_CHAN1_SRC = 0x3 */
-            break;
-
-            case V4L2_STD_PAL_B:
-            case V4L2_STD_PAL_G:
-                 /* C2HH setup */
-                 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                                AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1);           /* lo if big signal */
-                 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                                AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode); /* FUNC_MODE = DIF */
-                 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                                AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xE);           /* IF_MODE */
-                 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                                AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1);             /* no inv */
-                 break;
-
-            case V4L2_STD_PAL_D:
-            case V4L2_STD_PAL_I:
-            case V4L2_STD_SECAM_L:
-            case V4L2_STD_SECAM_LC:
-            case V4L2_STD_SECAM_B:
-            case V4L2_STD_SECAM_D:
-            case V4L2_STD_SECAM_G:
-            case V4L2_STD_SECAM_K:
-            case V4L2_STD_SECAM_K1:
-                 /* C2HH setup */
-                 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                                AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1);           /* lo if big signal */
-                 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                                AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode); /* FUNC_MODE = DIF */
-                 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                                AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xF);           /* IF_MODE */
-                 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
-                                AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1);             /* no inv */
-                            break;
-
-            case DIF_USE_BASEBAND:
-            default:
-                /* do nothing to config C2HH for baseband */
-                break;
-        }
-    }
-
-    return status;
+       int status = 0;
+
+       if (mode == V4L2_TUNER_RADIO) {
+               /* C2HH */
+               status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1);  /* lo if big signal */
+               status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode);        /* FUNC_MODE = DIF */
+               status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xFF); /* IF_MODE */
+               status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1);    /* no inv */
+       } else {
+               switch (standard) {
+               case V4L2_STD_NTSC_M:   /* 75 IRE Setup */
+               case V4L2_STD_NTSC_M_JP:        /* Japan,  0 IRE Setup */
+               case V4L2_STD_PAL_M:
+               case V4L2_STD_PAL_N:
+               case V4L2_STD_PAL_Nc:
+                       status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1);  /* lo if big signal */
+                       status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode);        /* FUNC_MODE = DIF */
+                       status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xb);  /* IF_MODE */
+                       status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1);    /* no inv */
+                       status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AUD_IO_CTRL, 0, 31, 0x00000003);       /* 0x124, AUD_CHAN1_SRC = 0x3 */
+                       break;
+
+               case V4L2_STD_PAL_B:
+               case V4L2_STD_PAL_G:
+                       /* C2HH setup */
+                       status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1);  /* lo if big signal */
+                       status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode);        /* FUNC_MODE = DIF */
+                       status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xE);  /* IF_MODE */
+                       status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1);    /* no inv */
+                       break;
+
+               case V4L2_STD_PAL_D:
+               case V4L2_STD_PAL_I:
+               case V4L2_STD_SECAM_L:
+               case V4L2_STD_SECAM_LC:
+               case V4L2_STD_SECAM_B:
+               case V4L2_STD_SECAM_D:
+               case V4L2_STD_SECAM_G:
+               case V4L2_STD_SECAM_K:
+               case V4L2_STD_SECAM_K1:
+                       /* C2HH setup */
+                       status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1);  /* lo if big signal */
+                       status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode);        /* FUNC_MODE = DIF */
+                       status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xF);  /* IF_MODE */
+                       status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1);    /* no inv */
+                       break;
+
+               case DIF_USE_BASEBAND:
+               default:
+                       /* do nothing to config C2HH for baseband */
+                       break;
+               }
+       }
+
+       return status;
 }
 
 int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard)
 {
-    int status = 0;
-    u32 dif_misc_ctrl_value = 0;
-    u32 func_mode = 0;
-
-    cx231xx_info("%s: setStandard to %x\n",__func__,standard);
-
-    status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                     DIF_MISC_CTRL, 2, &dif_misc_ctrl_value, 4);
-    if(standard != DIF_USE_BASEBAND )
-        dev->norm = standard;
-
-    switch (dev->model) {
-       case CX231XX_BOARD_CNXT_RDE_250:
-       case CX231XX_BOARD_CNXT_RDU_250:
-            func_mode=0x03;
-            break;
-        default:
-            func_mode=0x01;
-    }
-
-    status = cx231xx_dif_configure_C2HH_for_low_IF(dev, dev->active_mode, func_mode, standard);
-
-
-    if(standard == DIF_USE_BASEBAND ) {  /* base band */
-
-        /* There is a different SRC_PHASE_INC value for baseband vs. DIF */
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_SRC_PHASE_INC, 2, 0xDF7DF83, 4);
-        status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_MISC_CTRL, 2, &dif_misc_ctrl_value, 4);
-        dif_misc_ctrl_value |= FLD_DIF_DIF_BYPASS;
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_MISC_CTRL, 2, dif_misc_ctrl_value, 4);
-
-    } else if ( standard & (V4L2_STD_PAL_B | V4L2_STD_PAL_G) ) {
-
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL, 0, 31,  0x6503bc0c);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL1, 0, 31,  0xbd038c85);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL2, 0, 31,  0x1db4640a);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL3, 0, 31,  0x00008800);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_IF_REF, 0, 31, 0x444C1380);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_CTRL_IF, 0, 31, 0xDA302600);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_CTRL_INT, 0, 31, 0xDA261700);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_CTRL_RF, 0, 31, 0xDA262600);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_IF_INT_CURRENT, 0, 31,  0x26001700);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_RF_CURRENT, 0, 31,  0x00002660);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_VIDEO_AGC_CTRL, 0, 31,  0x72500800);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_VID_AUD_OVERRIDE, 0, 31,  0x27000100);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AV_SEP_CTRL, 0, 31,  0x3F3530EC);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_COMP_FLT_CTRL, 0, 31,  0x00A653A8);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_SRC_PHASE_INC, 0, 31,  0x1befbf06);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_SRC_GAIN_CONTROL, 0, 31,  0x000035e8);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_RPT_VARIANCE, 0, 31,  0x00000000);
-        /* Save the Spec Inversion value */
-        dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
-        dif_misc_ctrl_value |=0x3a013F11;
-
-    } else if( standard & V4L2_STD_PAL_D ) {
-
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL, 0, 31,  0x6503bc0c);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL1, 0, 31,  0xbd038c85);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL2, 0, 31,  0x1db4640a);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL3, 0, 31,  0x00008800);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_IF_REF, 0, 31, 0x444C1380);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_CTRL_IF, 0, 31, 0xDA302600);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_CTRL_INT, 0, 31, 0xDA261700);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_CTRL_RF, 0, 31, 0xDA262600);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_IF_INT_CURRENT, 0, 31,  0x26001700);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_RF_CURRENT, 0, 31,  0x00002660);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_VIDEO_AGC_CTRL, 0, 31,  0x72500800);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_VID_AUD_OVERRIDE, 0, 31,  0x27000100);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AV_SEP_CTRL, 0, 31,   0x3F3934EA);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_COMP_FLT_CTRL, 0, 31,  0x00000000);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_SRC_PHASE_INC, 0, 31,  0x1befbf06);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_SRC_GAIN_CONTROL, 0, 31,  0x000035e8);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_RPT_VARIANCE, 0, 31,  0x00000000);
-        /* Save the Spec Inversion value */
-        dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
-        dif_misc_ctrl_value |=0x3a023F11;
-
-    } else if( standard & V4L2_STD_PAL_I ) {
-
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL, 0, 31,  0x6503bc0c);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL1, 0, 31,  0xbd038c85);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL2, 0, 31,  0x1db4640a);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL3, 0, 31,  0x00008800);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_IF_REF, 0, 31, 0x444C1380);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_CTRL_IF, 0, 31, 0xDA302600);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_CTRL_INT, 0, 31, 0xDA261700);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_CTRL_RF, 0, 31, 0xDA262600);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_IF_INT_CURRENT, 0, 31,  0x26001700);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_RF_CURRENT, 0, 31,  0x00002660);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_VIDEO_AGC_CTRL, 0, 31,  0x72500800);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_VID_AUD_OVERRIDE, 0, 31,  0x27000100);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AV_SEP_CTRL, 0, 31,   0x5F39A934);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_COMP_FLT_CTRL, 0, 31,  0x00000000);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_SRC_PHASE_INC, 0, 31,  0x1befbf06);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_SRC_GAIN_CONTROL, 0, 31,  0x000035e8);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_RPT_VARIANCE, 0, 31,  0x00000000);
-        /* Save the Spec Inversion value */
-        dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
-        dif_misc_ctrl_value |=0x3a033F11;
-
-    } else if( standard & V4L2_STD_PAL_M ) {
-
-        /* improved Low Frequency Phase Noise */
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_PLL_CTRL, 2, 0xFF01FF0C, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_PLL_CTRL1, 2, 0xbd038c85, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_PLL_CTRL2,  2, 0x1db4640a, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_PLL_CTRL3,  2, 0x00008800, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_AGC_IF_REF, 2, 0x444C1380, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_AGC_IF_INT_CURRENT,  2, 0x26001700, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_AGC_RF_CURRENT,  2, 0x00002660, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_VIDEO_AGC_CTRL,  2, 0x72500800, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_VID_AUD_OVERRIDE, 2, 0x27000100, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_AV_SEP_CTRL,  2, 0x012c405d, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_COMP_FLT_CTRL, 2, 0x009f50c1, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_SRC_PHASE_INC, 2, 0x1befbf06, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_SRC_GAIN_CONTROL, 2, 0x000035e8, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                 DIF_SOFT_RST_CTRL_REVB, 2, 0x00000000, 4);
-
-        /* Save the Spec Inversion value */
-        dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
-        dif_misc_ctrl_value |= 0x3A0A3F10;
-
-    } else if( standard & (V4L2_STD_PAL_N | V4L2_STD_PAL_Nc) ) {
-
-        /* improved Low Frequency Phase Noise */
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL, 2, 0xFF01FF0C, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL1, 2, 0xbd038c85, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL2, 2, 0x1db4640a, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL3, 2, 0x00008800, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_IF_REF, 2, 0x444C1380, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_IF_INT_CURRENT, 2, 0x26001700, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_RF_CURRENT, 2, 0x00002660, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_VIDEO_AGC_CTRL, 2, 0x72500800, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_VID_AUD_OVERRIDE, 2, 0x27000100, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AV_SEP_CTRL, 2, 0x012c405d, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_COMP_FLT_CTRL, 2, 0x009f50c1, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_SRC_PHASE_INC, 2, 0x1befbf06, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_SRC_GAIN_CONTROL, 2, 0x000035e8, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_SOFT_RST_CTRL_REVB, 2, 0x00000000, 4);
-
-        /* Save the Spec Inversion value */
-        dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
-        dif_misc_ctrl_value = 0x3A093F10;
-
-    } else if( standard & ( V4L2_STD_SECAM_B | V4L2_STD_SECAM_D | V4L2_STD_SECAM_G |
-                            V4L2_STD_SECAM_K | V4L2_STD_SECAM_K1) ) {
-
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL, 0, 31,  0x6503bc0c);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL1, 0, 31,  0xbd038c85);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL2, 0, 31,  0x1db4640a);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL3, 0, 31,  0x00008800);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_IF_REF, 0, 31, 0x888C0380);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_CTRL_IF, 0, 31, 0xe0262600);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_CTRL_INT, 0, 31, 0xc2171700);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_CTRL_RF, 0, 31, 0xc2262600);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_IF_INT_CURRENT, 0, 31,  0x26001700);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_RF_CURRENT, 0, 31,  0x00002660);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_VID_AUD_OVERRIDE, 0, 31,  0x27000100);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AV_SEP_CTRL, 0, 31,   0x3F3530ec);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_COMP_FLT_CTRL, 0, 31,  0x00000000);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_SRC_PHASE_INC, 0, 31,  0x1befbf06);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_SRC_GAIN_CONTROL, 0, 31,  0x000035e8);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_RPT_VARIANCE, 0, 31,  0x00000000);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_VIDEO_AGC_CTRL, 0, 31,  0xf4000000);
-
-        /* Save the Spec Inversion value */
-        dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
-        dif_misc_ctrl_value |=0x3a023F11;
-
-    } else if( standard & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC) ) {
-
-        /* Is it SECAM_L1? */
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL, 0, 31,  0x6503bc0c);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL1, 0, 31,  0xbd038c85);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL2, 0, 31,  0x1db4640a);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_PLL_CTRL3, 0, 31,  0x00008800);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_IF_REF, 0, 31, 0x888C0380);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_CTRL_IF, 0, 31, 0xe0262600);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_CTRL_INT, 0, 31, 0xc2171700);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_CTRL_RF, 0, 31, 0xc2262600);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_IF_INT_CURRENT, 0, 31,  0x26001700);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AGC_RF_CURRENT, 0, 31,  0x00002660);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_VID_AUD_OVERRIDE, 0, 31,  0x27000100);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_AV_SEP_CTRL, 0, 31,   0x3F3530ec);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_COMP_FLT_CTRL, 0, 31,  0x00000000);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_SRC_PHASE_INC, 0, 31,  0x1befbf06);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_SRC_GAIN_CONTROL, 0, 31,  0x000035e8);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_RPT_VARIANCE, 0, 31,  0x00000000);
-        status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS,  32, DIF_VIDEO_AGC_CTRL, 0, 31,  0xf2560000);
-
-        /* Save the Spec Inversion value */
-        dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
-        dif_misc_ctrl_value |=0x3a023F11;
-
-    } else  { /* V4L2_STD_NTSC_M (75 IRE Setup) Or  V4L2_STD_NTSC_M_JP (Japan,  0 IRE Setup) */
-
-        /* For NTSC the centre frequency of video coming out of sidewinder is
-           around 7.1MHz or 3.6MHz depending on the spectral inversion.
-           so for a non spectrally inverted channel the pll freq word is 0x03420c49
-        */
-
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL, 2, 0x6503BC0C, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL1, 2, 0xBD038C85, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL2, 2, 0x1DB4640A, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL3, 2, 0x00008800, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_IF_REF, 2, 0x444C0380, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_IF_INT_CURRENT, 2, 0x26001700, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_RF_CURRENT, 2, 0x00002660, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_VIDEO_AGC_CTRL, 2, 0x04000800, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_VID_AUD_OVERRIDE, 2, 0x27000100, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AV_SEP_CTRL, 2, 0x01296e1f, 4);
-
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_COMP_FLT_CTRL, 2, 0x009f50c1, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_SRC_PHASE_INC, 2, 0x1befbf06, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_SRC_GAIN_CONTROL, 2, 0x000035e8, 4);
-
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_CTRL_IF, 2, 0xC2262600, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_CTRL_INT, 2, 0xC2262600, 4);
-        status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_CTRL_RF, 2, 0xC2262600, 4);
-
-        /* Save the Spec Inversion value */
-        dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
-        dif_misc_ctrl_value |= 0x3a003F10;
-
-    }
-
-    /* The AGC values should be the same for all standards,
-       AUD_SRC_SEL[19] should always be disabled    */
-    dif_misc_ctrl_value &= ~FLD_DIF_AUD_SRC_SEL;
-
-    /* It is still possible to get Set Standard calls even when we are in FM mode
-       This is done to override the value for FM. */
-    if (dev->active_mode == V4L2_TUNER_RADIO)
-        dif_misc_ctrl_value = 0x7a080000;
-
-    /* Write the calculated value for misc ontrol register     */
-    status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_MISC_CTRL, 2, dif_misc_ctrl_value, 4);
-
-    return status;
+       int status = 0;
+       u32 dif_misc_ctrl_value = 0;
+       u32 func_mode = 0;
+
+       cx231xx_info("%s: setStandard to %x\n", __func__, standard);
+
+       status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                      DIF_MISC_CTRL, 2, &dif_misc_ctrl_value,
+                                      4);
+       if (standard != DIF_USE_BASEBAND)
+               dev->norm = standard;
+
+       switch (dev->model) {
+       case CX231XX_BOARD_CNXT_RDE_250:
+       case CX231XX_BOARD_CNXT_RDU_250:
+               func_mode = 0x03;
+               break;
+       default:
+               func_mode = 0x01;
+       }
+
+       status =
+           cx231xx_dif_configure_C2HH_for_low_IF(dev, dev->active_mode,
+                                                 func_mode, standard);
+
+       if (standard == DIF_USE_BASEBAND) {     /* base band */
+
+               /* There is a different SRC_PHASE_INC value for baseband vs. DIF */
+               status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                               DIF_SRC_PHASE_INC, 2, 0xDF7DF83,
+                                               4);
+               status =
+                   cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                         DIF_MISC_CTRL, 2,
+                                         &dif_misc_ctrl_value, 4);
+               dif_misc_ctrl_value |= FLD_DIF_DIF_BYPASS;
+               status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                               DIF_MISC_CTRL, 2,
+                                               dif_misc_ctrl_value, 4);
+
+       } else if (standard & (V4L2_STD_PAL_B | V4L2_STD_PAL_G)) {
+
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL, 0, 31, 0x6503bc0c);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL1, 0, 31, 0xbd038c85);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL2, 0, 31, 0x1db4640a);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL3, 0, 31, 0x00008800);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_IF_REF, 0, 31, 0x444C1380);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_CTRL_IF, 0, 31, 0xDA302600);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_CTRL_INT, 0, 31, 0xDA261700);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_CTRL_RF, 0, 31, 0xDA262600);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_IF_INT_CURRENT, 0, 31,
+                                          0x26001700);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_RF_CURRENT, 0, 31,
+                                          0x00002660);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_VIDEO_AGC_CTRL, 0, 31,
+                                          0x72500800);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_VID_AUD_OVERRIDE, 0, 31,
+                                          0x27000100);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AV_SEP_CTRL, 0, 31, 0x3F3530EC);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_COMP_FLT_CTRL, 0, 31,
+                                          0x00A653A8);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_SRC_PHASE_INC, 0, 31,
+                                          0x1befbf06);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_SRC_GAIN_CONTROL, 0, 31,
+                                          0x000035e8);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_RPT_VARIANCE, 0, 31, 0x00000000);
+               /* Save the Spec Inversion value */
+               dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
+               dif_misc_ctrl_value |= 0x3a013F11;
+
+       } else if (standard & V4L2_STD_PAL_D) {
+
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL, 0, 31, 0x6503bc0c);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL1, 0, 31, 0xbd038c85);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL2, 0, 31, 0x1db4640a);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL3, 0, 31, 0x00008800);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_IF_REF, 0, 31, 0x444C1380);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_CTRL_IF, 0, 31, 0xDA302600);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_CTRL_INT, 0, 31, 0xDA261700);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_CTRL_RF, 0, 31, 0xDA262600);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_IF_INT_CURRENT, 0, 31,
+                                          0x26001700);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_RF_CURRENT, 0, 31,
+                                          0x00002660);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_VIDEO_AGC_CTRL, 0, 31,
+                                          0x72500800);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_VID_AUD_OVERRIDE, 0, 31,
+                                          0x27000100);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AV_SEP_CTRL, 0, 31, 0x3F3934EA);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_COMP_FLT_CTRL, 0, 31,
+                                          0x00000000);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_SRC_PHASE_INC, 0, 31,
+                                          0x1befbf06);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_SRC_GAIN_CONTROL, 0, 31,
+                                          0x000035e8);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_RPT_VARIANCE, 0, 31, 0x00000000);
+               /* Save the Spec Inversion value */
+               dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
+               dif_misc_ctrl_value |= 0x3a023F11;
+
+       } else if (standard & V4L2_STD_PAL_I) {
+
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL, 0, 31, 0x6503bc0c);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL1, 0, 31, 0xbd038c85);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL2, 0, 31, 0x1db4640a);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL3, 0, 31, 0x00008800);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_IF_REF, 0, 31, 0x444C1380);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_CTRL_IF, 0, 31, 0xDA302600);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_CTRL_INT, 0, 31, 0xDA261700);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_CTRL_RF, 0, 31, 0xDA262600);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_IF_INT_CURRENT, 0, 31,
+                                          0x26001700);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_RF_CURRENT, 0, 31,
+                                          0x00002660);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_VIDEO_AGC_CTRL, 0, 31,
+                                          0x72500800);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_VID_AUD_OVERRIDE, 0, 31,
+                                          0x27000100);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AV_SEP_CTRL, 0, 31, 0x5F39A934);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_COMP_FLT_CTRL, 0, 31,
+                                          0x00000000);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_SRC_PHASE_INC, 0, 31,
+                                          0x1befbf06);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_SRC_GAIN_CONTROL, 0, 31,
+                                          0x000035e8);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_RPT_VARIANCE, 0, 31, 0x00000000);
+               /* Save the Spec Inversion value */
+               dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
+               dif_misc_ctrl_value |= 0x3a033F11;
+
+       } else if (standard & V4L2_STD_PAL_M) {
+
+               /* improved Low Frequency Phase Noise */
+               status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                               DIF_PLL_CTRL, 2, 0xFF01FF0C, 4);
+               status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                               DIF_PLL_CTRL1, 2, 0xbd038c85,
+                                               4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_PLL_CTRL2, 2, 0x1db4640a, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_PLL_CTRL3, 2, 0x00008800, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_AGC_IF_REF, 2, 0x444C1380, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_AGC_IF_INT_CURRENT, 2,
+                                          0x26001700, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_AGC_RF_CURRENT, 2, 0x00002660,
+                                          4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_VIDEO_AGC_CTRL, 2, 0x72500800,
+                                          4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_VID_AUD_OVERRIDE, 2, 0x27000100,
+                                          4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_AV_SEP_CTRL, 2, 0x012c405d, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_COMP_FLT_CTRL, 2, 0x009f50c1, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_SRC_PHASE_INC, 2, 0x1befbf06, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_SRC_GAIN_CONTROL, 2, 0x000035e8,
+                                          4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_SOFT_RST_CTRL_REVB, 2,
+                                          0x00000000, 4);
+
+               /* Save the Spec Inversion value */
+               dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
+               dif_misc_ctrl_value |= 0x3A0A3F10;
+
+       } else if (standard & (V4L2_STD_PAL_N | V4L2_STD_PAL_Nc)) {
+
+               /* improved Low Frequency Phase Noise */
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_PLL_CTRL, 2, 0xFF01FF0C, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_PLL_CTRL1, 2, 0xbd038c85, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_PLL_CTRL2, 2, 0x1db4640a, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_PLL_CTRL3, 2, 0x00008800, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_AGC_IF_REF, 2, 0x444C1380, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_AGC_IF_INT_CURRENT, 2,
+                                          0x26001700, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_AGC_RF_CURRENT, 2, 0x00002660,
+                                          4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_VIDEO_AGC_CTRL, 2, 0x72500800,
+                                          4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_VID_AUD_OVERRIDE, 2, 0x27000100,
+                                          4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_AV_SEP_CTRL, 2, 0x012c405d, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_COMP_FLT_CTRL, 2, 0x009f50c1, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_SRC_PHASE_INC, 2, 0x1befbf06, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_SRC_GAIN_CONTROL, 2, 0x000035e8,
+                                          4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_SOFT_RST_CTRL_REVB, 2,
+                                          0x00000000, 4);
+
+               /* Save the Spec Inversion value */
+               dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
+               dif_misc_ctrl_value = 0x3A093F10;
+
+       } else if (standard &
+                  (V4L2_STD_SECAM_B | V4L2_STD_SECAM_D | V4L2_STD_SECAM_G |
+                   V4L2_STD_SECAM_K | V4L2_STD_SECAM_K1)) {
+
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL, 0, 31, 0x6503bc0c);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL1, 0, 31, 0xbd038c85);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL2, 0, 31, 0x1db4640a);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL3, 0, 31, 0x00008800);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_IF_REF, 0, 31, 0x888C0380);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_CTRL_IF, 0, 31, 0xe0262600);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_CTRL_INT, 0, 31, 0xc2171700);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_CTRL_RF, 0, 31, 0xc2262600);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_IF_INT_CURRENT, 0, 31,
+                                          0x26001700);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_RF_CURRENT, 0, 31,
+                                          0x00002660);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_VID_AUD_OVERRIDE, 0, 31,
+                                          0x27000100);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AV_SEP_CTRL, 0, 31, 0x3F3530ec);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_COMP_FLT_CTRL, 0, 31,
+                                          0x00000000);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_SRC_PHASE_INC, 0, 31,
+                                          0x1befbf06);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_SRC_GAIN_CONTROL, 0, 31,
+                                          0x000035e8);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_RPT_VARIANCE, 0, 31, 0x00000000);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_VIDEO_AGC_CTRL, 0, 31,
+                                          0xf4000000);
+
+               /* Save the Spec Inversion value */
+               dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
+               dif_misc_ctrl_value |= 0x3a023F11;
+
+       } else if (standard & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC)) {
+
+               /* Is it SECAM_L1? */
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL, 0, 31, 0x6503bc0c);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL1, 0, 31, 0xbd038c85);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL2, 0, 31, 0x1db4640a);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_PLL_CTRL3, 0, 31, 0x00008800);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_IF_REF, 0, 31, 0x888C0380);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_CTRL_IF, 0, 31, 0xe0262600);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_CTRL_INT, 0, 31, 0xc2171700);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_CTRL_RF, 0, 31, 0xc2262600);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_IF_INT_CURRENT, 0, 31,
+                                          0x26001700);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AGC_RF_CURRENT, 0, 31,
+                                          0x00002660);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_VID_AUD_OVERRIDE, 0, 31,
+                                          0x27000100);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_AV_SEP_CTRL, 0, 31, 0x3F3530ec);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_COMP_FLT_CTRL, 0, 31,
+                                          0x00000000);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_SRC_PHASE_INC, 0, 31,
+                                          0x1befbf06);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_SRC_GAIN_CONTROL, 0, 31,
+                                          0x000035e8);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_RPT_VARIANCE, 0, 31, 0x00000000);
+               status =
+                   cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
+                                          DIF_VIDEO_AGC_CTRL, 0, 31,
+                                          0xf2560000);
+
+               /* Save the Spec Inversion value */
+               dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
+               dif_misc_ctrl_value |= 0x3a023F11;
+
+       } else {                /* V4L2_STD_NTSC_M (75 IRE Setup) Or  V4L2_STD_NTSC_M_JP (Japan,  0 IRE Setup) */
+
+               /* For NTSC the centre frequency of video coming out of sidewinder is
+                  around 7.1MHz or 3.6MHz depending on the spectral inversion.
+                  so for a non spectrally inverted channel the pll freq word is 0x03420c49
+                */
+
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_PLL_CTRL, 2, 0x6503BC0C, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_PLL_CTRL1, 2, 0xBD038C85, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_PLL_CTRL2, 2, 0x1DB4640A, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_PLL_CTRL3, 2, 0x00008800, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_AGC_IF_REF, 2, 0x444C0380, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_AGC_IF_INT_CURRENT, 2,
+                                          0x26001700, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_AGC_RF_CURRENT, 2, 0x00002660,
+                                          4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_VIDEO_AGC_CTRL, 2, 0x04000800,
+                                          4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_VID_AUD_OVERRIDE, 2, 0x27000100,
+                                          4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_AV_SEP_CTRL, 2, 0x01296e1f, 4);
+
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_COMP_FLT_CTRL, 2, 0x009f50c1, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_SRC_PHASE_INC, 2, 0x1befbf06, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_SRC_GAIN_CONTROL, 2, 0x000035e8,
+                                          4);
+
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_AGC_CTRL_IF, 2, 0xC2262600, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_AGC_CTRL_INT, 2, 0xC2262600, 4);
+               status =
+                   cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                          DIF_AGC_CTRL_RF, 2, 0xC2262600, 4);
+
+               /* Save the Spec Inversion value */
+               dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
+               dif_misc_ctrl_value |= 0x3a003F10;
+
+       }
+
+       /* The AGC values should be the same for all standards,
+          AUD_SRC_SEL[19] should always be disabled    */
+       dif_misc_ctrl_value &= ~FLD_DIF_AUD_SRC_SEL;
+
+       /* It is still possible to get Set Standard calls even when we are in FM mode
+          This is done to override the value for FM. */
+       if (dev->active_mode == V4L2_TUNER_RADIO)
+               dif_misc_ctrl_value = 0x7a080000;
+
+       /* Write the calculated value for misc ontrol register      */
+       status =
+           cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_MISC_CTRL,
+                                  2, dif_misc_ctrl_value, 4);
+
+       return status;
 }
 
 int cx231xx_tuner_pre_channel_change(struct cx231xx *dev)
@@ -1325,101 +2036,103 @@ int cx231xx_tuner_pre_channel_change(struct cx231xx *dev)
        u32 dwval;
 
        /* Set the RF and IF k_agc values to 3 */
-    status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                     DIF_AGC_IF_REF, 2, &dwval, 4);
+       status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                      DIF_AGC_IF_REF, 2, &dwval, 4);
        dwval &= ~(FLD_DIF_K_AGC_RF | FLD_DIF_K_AGC_IF);
        dwval |= 0x33000000;
 
-    status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                     DIF_AGC_IF_REF, 2, dwval, 4);
+       status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                       DIF_AGC_IF_REF, 2, dwval, 4);
 
-    return status;
+       return status;
 }
 
 int cx231xx_tuner_post_channel_change(struct cx231xx *dev)
 {
-    int status = 0;
+       int status = 0;
        u32 dwval;
 
-    /* Set the RF and IF k_agc values to 4 for PAL/NTSC and 8 for SECAM */
-    status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                     DIF_AGC_IF_REF, 2, &dwval, 4);
-    dwval &= ~(FLD_DIF_K_AGC_RF | FLD_DIF_K_AGC_IF);
+       /* Set the RF and IF k_agc values to 4 for PAL/NTSC and 8 for SECAM */
+       status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                      DIF_AGC_IF_REF, 2, &dwval, 4);
+       dwval &= ~(FLD_DIF_K_AGC_RF | FLD_DIF_K_AGC_IF);
 
-    if(dev->norm & ( V4L2_STD_SECAM_L | V4L2_STD_SECAM_B | V4L2_STD_SECAM_D) ) {
-        dwval |= 0x88000000;
-    } else {
-        dwval |= 0x44000000;
-    }
+       if (dev->
+           norm & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_B | V4L2_STD_SECAM_D)) {
+               dwval |= 0x88000000;
+       } else {
+               dwval |= 0x44000000;
+       }
 
-    status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
-                                     DIF_AGC_IF_REF, 2, dwval, 4);
+       status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
+                                       DIF_AGC_IF_REF, 2, dwval, 4);
 
-    return status;
+       return status;
 }
 
-
-
 /*************************************************************************************
  *            F L A T I R O N - B L O C K    C O N T R O L   functions               *
  *************************************************************************************/
 int cx231xx_flatiron_initialize(struct cx231xx *dev)
 {
-    int status = 0;
-    u32 value;
-
-    status = cx231xx_read_i2c_data(dev, Flatrion_DEVICE_ADDRESS, CH_PWR_CTRL1, 1, &value, 1);
-    /* enables clock to delta-sigma and decimation filter */
-    value |= 0x80;
-    status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
-                                     CH_PWR_CTRL1, 1, value, 1);
-    /* power up all channel */
-    status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
-                                     CH_PWR_CTRL2, 1, 0x00, 1);
-
-    return status;
+       int status = 0;
+       u32 value;
+
+       status =
+           cx231xx_read_i2c_data(dev, Flatrion_DEVICE_ADDRESS, CH_PWR_CTRL1, 1,
+                                 &value, 1);
+       /* enables clock to delta-sigma and decimation filter */
+       value |= 0x80;
+       status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
+                                       CH_PWR_CTRL1, 1, value, 1);
+       /* power up all channel */
+       status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
+                                       CH_PWR_CTRL2, 1, 0x00, 1);
+
+       return status;
 }
 
 int cx231xx_flatiron_update_power_control(struct cx231xx *dev, AV_MODE avmode)
 {
-    int status = 0;
-    u32 value=0;
-
-    if(avmode!=POLARIS_AVMODE_ENXTERNAL_AV) {
-        status = cx231xx_read_i2c_data(dev, Flatrion_DEVICE_ADDRESS, CH_PWR_CTRL2, 1, &value, 1);
-        value |= 0xfe;
-        status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
-                                     CH_PWR_CTRL2, 1, value, 1);
-    }
-    else {
-        status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
-                                     CH_PWR_CTRL2, 1, 0x00, 1);
-    }
-
-    return status;
+       int status = 0;
+       u32 value = 0;
+
+       if (avmode != POLARIS_AVMODE_ENXTERNAL_AV) {
+               status =
+                   cx231xx_read_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
+                                         CH_PWR_CTRL2, 1, &value, 1);
+               value |= 0xfe;
+               status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
+                                               CH_PWR_CTRL2, 1, value, 1);
+       } else {
+               status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
+                                               CH_PWR_CTRL2, 1, 0x00, 1);
+       }
+
+       return status;
 }
 
 /* set flatiron for audio input types */
 int cx231xx_flatiron_set_audio_input(struct cx231xx *dev, u8 audio_input)
 {
-    int status = 0;
-
-    switch(audio_input) {
-        case CX231XX_AMUX_LINE_IN:
+       int status = 0;
 
-            status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
-                                     CH_PWR_CTRL2, 1, 0x00, 1);
-            status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
-                                     CH_PWR_CTRL1, 1, 0x80, 1);
-            break;
-        case CX231XX_AMUX_VIDEO:
-        default:
-            break;
-    }
+       switch (audio_input) {
+       case CX231XX_AMUX_LINE_IN:
+
+               status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
+                                               CH_PWR_CTRL2, 1, 0x00, 1);
+               status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
+                                               CH_PWR_CTRL1, 1, 0x80, 1);
+               break;
+       case CX231XX_AMUX_VIDEO:
+       default:
+               break;
+       }
 
-    dev->ctl_ainput = audio_input;
+       dev->ctl_ainput = audio_input;
 
-    return status;
+       return status;
 }
 
 /*************************************************************************************
@@ -1427,438 +2140,467 @@ int cx231xx_flatiron_set_audio_input(struct cx231xx *dev, u8 audio_input)
  *************************************************************************************/
 int cx231xx_set_power_mode(struct cx231xx *dev, AV_MODE mode)
 {
-    u8 value[4] ={0,0,0,0};
-    u32 tmp = 0;
-    int status = 0;
-
-    if(dev->power_mode != mode)
-        dev->power_mode = mode;
-    else {
-        cx231xx_info(" setPowerMode::mode = %d, No Change req.\n",mode);
-        return 0;
-    }
-
-    cx231xx_info(" setPowerMode::mode = %d\n",mode);
-
-    status = cx231xx_read_ctrl_reg(dev,VRT_GET_REGISTER, PWR_CTL_EN, value, 4);
-    if(status < 0)
-        return status;
-
-    tmp = *((u32 *)value);
-
-    switch(mode)  {
-        case POLARIS_AVMODE_ENXTERNAL_AV:
-
-            tmp &= (~PWR_MODE_MASK);
-
-            tmp |= PWR_AV_EN;
-            value[0]=(u8)tmp;
-            value[1]=(u8)(tmp>>8);
-            value[2]=(u8)(tmp>>16);
-            value[3]=(u8)(tmp>>24);
-            status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-            msleep(PWR_SLEEP_INTERVAL);
-
-            tmp |= PWR_ISO_EN;
-            value[0]=(u8)tmp;
-            value[1]=(u8)(tmp>>8);
-            value[2]=(u8)(tmp>>16);
-            value[3]=(u8)(tmp>>24);
-            status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-            msleep(PWR_SLEEP_INTERVAL);
-
-            tmp |=POLARIS_AVMODE_ENXTERNAL_AV;
-            value[0]=(u8)tmp;
-            value[1]=(u8)(tmp>>8);
-            value[2]=(u8)(tmp>>16);
-            value[3]=(u8)(tmp>>24);
-            status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-
-            dev->xc_fw_load_done = 0; /* reset state of xceive tuner */
-            break;
-
-        case POLARIS_AVMODE_ANALOGT_TV:
-
-            tmp &= (~PWR_DEMOD_EN);
-            tmp |= (I2C_DEMOD_EN);
-            value[0]=(u8)tmp;
-            value[1]=(u8)(tmp>>8);
-            value[2]=(u8)(tmp>>16);
-            value[3]=(u8)(tmp>>24);
-            status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-            msleep(PWR_SLEEP_INTERVAL);
-
-            if(!(tmp & PWR_TUNER_EN)) {
-                tmp |= (PWR_TUNER_EN);
-                value[0]=(u8)tmp;
-                value[1]=(u8)(tmp>>8);
-                value[2]=(u8)(tmp>>16);
-                value[3]=(u8)(tmp>>24);
-                status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-                msleep(PWR_SLEEP_INTERVAL);
-            }
-
-            if(!(tmp & PWR_AV_EN)) {
-                tmp |= PWR_AV_EN;
-                value[0]=(u8)tmp;
-                value[1]=(u8)(tmp>>8);
-                value[2]=(u8)(tmp>>16);
-                value[3]=(u8)(tmp>>24);
-                status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-                msleep(PWR_SLEEP_INTERVAL);
-            }
-            if(!(tmp & PWR_ISO_EN )) {
-                tmp |= PWR_ISO_EN;
-                value[0]=(u8)tmp;
-                value[1]=(u8)(tmp>>8);
-                value[2]=(u8)(tmp>>16);
-                value[3]=(u8)(tmp>>24);
-                status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-                msleep(PWR_SLEEP_INTERVAL);
-            }
-
-            if(!(tmp & POLARIS_AVMODE_ANALOGT_TV )) {
-                tmp |= POLARIS_AVMODE_ANALOGT_TV;
-                value[0]=(u8)tmp;
-                value[1]=(u8)(tmp>>8);
-                value[2]=(u8)(tmp>>16);
-                value[3]=(u8)(tmp>>24);
-                status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-                msleep(PWR_SLEEP_INTERVAL);
-            }
-
-            if( (dev->model == CX231XX_BOARD_CNXT_RDE_250) ||
-                (dev->model == CX231XX_BOARD_CNXT_RDU_250)) {
-
-                    /* tuner path to channel 1 from port 3 */
-                    cx231xx_enable_i2c_for_tuner(dev, I2C_3);
-
-                    if(dev->cx231xx_reset_analog_tuner)
-                        dev->cx231xx_reset_analog_tuner(dev);
-            }
-            break;
-
-        case POLARIS_AVMODE_DIGITAL:
-
-            if(!(tmp & PWR_TUNER_EN)) {
-                tmp |= (PWR_TUNER_EN);
-                value[0]=(u8)tmp;
-                value[1]=(u8)(tmp>>8);
-                value[2]=(u8)(tmp>>16);
-                value[3]=(u8)(tmp>>24);
-                status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-                msleep(PWR_SLEEP_INTERVAL);
-            }
-            if(!(tmp & PWR_AV_EN)) {
-                tmp |= PWR_AV_EN;
-                value[0]=(u8)tmp;
-                value[1]=(u8)(tmp>>8);
-                value[2]=(u8)(tmp>>16);
-                value[3]=(u8)(tmp>>24);
-                status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-                msleep(PWR_SLEEP_INTERVAL);
-            }
-            if(!(tmp & PWR_ISO_EN)) {
-                tmp |= PWR_ISO_EN;
-                value[0]=(u8)tmp;
-                value[1]=(u8)(tmp>>8);
-                value[2]=(u8)(tmp>>16);
-                value[3]=(u8)(tmp>>24);
-                status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-                msleep(PWR_SLEEP_INTERVAL);
-            }
-
-            tmp |= POLARIS_AVMODE_DIGITAL|I2C_DEMOD_EN;
-            value[0]=(u8)tmp;
-            value[1]=(u8)(tmp>>8);
-            value[2]=(u8)(tmp>>16);
-            value[3]=(u8)(tmp>>24);
-            status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-            msleep(PWR_SLEEP_INTERVAL);
-
-            if(!(tmp & PWR_DEMOD_EN)) {
-                tmp |= PWR_DEMOD_EN;
-                value[0]=(u8)tmp;
-                value[1]=(u8)(tmp>>8);
-                value[2]=(u8)(tmp>>16);
-                value[3]=(u8)(tmp>>24);
-                status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-                msleep(PWR_SLEEP_INTERVAL);
-            }
-
-            if( (dev->model == CX231XX_BOARD_CNXT_RDE_250) ||
-                (dev->model == CX231XX_BOARD_CNXT_RDU_250)) {
-
-                    /* tuner path to channel 1 from port 3 */
-                    cx231xx_enable_i2c_for_tuner(dev, I2C_3);
-
-                    if(dev->cx231xx_reset_analog_tuner)
-                        dev->cx231xx_reset_analog_tuner(dev);
-            }
-            break;
-
-        default:
-            break;
-    }
-
-    msleep(PWR_SLEEP_INTERVAL);
-
-    /* For power saving, only enable Pwr_resetout_n when digital TV is selected. */
-    if(mode == POLARIS_AVMODE_DIGITAL) {
-        tmp |= PWR_RESETOUT_EN;
-        value[0]=(u8)tmp;
-        value[1]=(u8)(tmp>>8);
-        value[2]=(u8)(tmp>>16);
-        value[3]=(u8)(tmp>>24);
-        status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
-        msleep(PWR_SLEEP_INTERVAL);
-    }
-
-    /* update power control for colibri */
-    status = cx231xx_colibri_update_power_control(dev, mode);
-
-    /* update power control for flatiron */
-    status = cx231xx_flatiron_update_power_control(dev, mode);
-
-    status = cx231xx_read_ctrl_reg(dev,VRT_GET_REGISTER, PWR_CTL_EN, value, 4);
-    cx231xx_info(" The data of PWR_CTL_EN register 0x74=0x%0x,0x%0x,0x%0x,0x%0x\n",value[0],value[1],value[2],value[3]);
-
-    return status;
+       u8 value[4] = { 0, 0, 0, 0 };
+       u32 tmp = 0;
+       int status = 0;
+
+       if (dev->power_mode != mode)
+               dev->power_mode = mode;
+       else {
+               cx231xx_info(" setPowerMode::mode = %d, No Change req.\n",
+                            mode);
+               return 0;
+       }
+
+       cx231xx_info(" setPowerMode::mode = %d\n", mode);
+
+       status =
+           cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, 4);
+       if (status < 0)
+               return status;
+
+       tmp = *((u32 *) value);
+
+       switch (mode) {
+       case POLARIS_AVMODE_ENXTERNAL_AV:
+
+               tmp &= (~PWR_MODE_MASK);
+
+               tmp |= PWR_AV_EN;
+               value[0] = (u8) tmp;
+               value[1] = (u8) (tmp >> 8);
+               value[2] = (u8) (tmp >> 16);
+               value[3] = (u8) (tmp >> 24);
+               status =
+                   cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN,
+                                          value, 4);
+               msleep(PWR_SLEEP_INTERVAL);
+
+               tmp |= PWR_ISO_EN;
+               value[0] = (u8) tmp;
+               value[1] = (u8) (tmp >> 8);
+               value[2] = (u8) (tmp >> 16);
+               value[3] = (u8) (tmp >> 24);
+               status =
+                   cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN,
+                                          value, 4);
+               msleep(PWR_SLEEP_INTERVAL);
+
+               tmp |= POLARIS_AVMODE_ENXTERNAL_AV;
+               value[0] = (u8) tmp;
+               value[1] = (u8) (tmp >> 8);
+               value[2] = (u8) (tmp >> 16);
+               value[3] = (u8) (tmp >> 24);
+               status =
+                   cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN,
+                                          value, 4);
+
+               dev->xc_fw_load_done = 0;       /* reset state of xceive tuner */
+               break;
+
+       case POLARIS_AVMODE_ANALOGT_TV:
+
+               tmp &= (~PWR_DEMOD_EN);
+               tmp |= (I2C_DEMOD_EN);
+               value[0] = (u8) tmp;
+               value[1] = (u8) (tmp >> 8);
+               value[2] = (u8) (tmp >> 16);
+               value[3] = (u8) (tmp >> 24);
+               status =
+                   cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN,
+                                          value, 4);
+               msleep(PWR_SLEEP_INTERVAL);
+
+               if (!(tmp & PWR_TUNER_EN)) {
+                       tmp |= (PWR_TUNER_EN);
+                       value[0] = (u8) tmp;
+                       value[1] = (u8) (tmp >> 8);
+                       value[2] = (u8) (tmp >> 16);
+                       value[3] = (u8) (tmp >> 24);
+                       status =
+                           cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
+                                                  PWR_CTL_EN, value, 4);
+                       msleep(PWR_SLEEP_INTERVAL);
+               }
+
+               if (!(tmp & PWR_AV_EN)) {
+                       tmp |= PWR_AV_EN;
+                       value[0] = (u8) tmp;
+                       value[1] = (u8) (tmp >> 8);
+                       value[2] = (u8) (tmp >> 16);
+                       value[3] = (u8) (tmp >> 24);
+                       status =
+                           cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
+                                                  PWR_CTL_EN, value, 4);
+                       msleep(PWR_SLEEP_INTERVAL);
+               }
+               if (!(tmp & PWR_ISO_EN)) {
+                       tmp |= PWR_ISO_EN;
+                       value[0] = (u8) tmp;
+                       value[1] = (u8) (tmp >> 8);
+                       value[2] = (u8) (tmp >> 16);
+                       value[3] = (u8) (tmp >> 24);
+                       status =
+                           cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
+                                                  PWR_CTL_EN, value, 4);
+                       msleep(PWR_SLEEP_INTERVAL);
+               }
+
+               if (!(tmp & POLARIS_AVMODE_ANALOGT_TV)) {
+                       tmp |= POLARIS_AVMODE_ANALOGT_TV;
+                       value[0] = (u8) tmp;
+                       value[1] = (u8) (tmp >> 8);
+                       value[2] = (u8) (tmp >> 16);
+                       value[3] = (u8) (tmp >> 24);
+                       status =
+                           cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
+                                                  PWR_CTL_EN, value, 4);
+                       msleep(PWR_SLEEP_INTERVAL);
+               }
+
+               if ((dev->model == CX231XX_BOARD_CNXT_RDE_250) ||
+                   (dev->model == CX231XX_BOARD_CNXT_RDU_250)) {
+
+                       /* tuner path to channel 1 from port 3 */
+                       cx231xx_enable_i2c_for_tuner(dev, I2C_3);
+
+                       if (dev->cx231xx_reset_analog_tuner)
+                               dev->cx231xx_reset_analog_tuner(dev);
+               }
+               break;
+
+       case POLARIS_AVMODE_DIGITAL:
+
+               if (!(tmp & PWR_TUNER_EN)) {
+                       tmp |= (PWR_TUNER_EN);
+                       value[0] = (u8) tmp;
+                       value[1] = (u8) (tmp >> 8);
+                       value[2] = (u8) (tmp >> 16);
+                       value[3] = (u8) (tmp >> 24);
+                       status =
+                           cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
+                                                  PWR_CTL_EN, value, 4);
+                       msleep(PWR_SLEEP_INTERVAL);
+               }
+               if (!(tmp & PWR_AV_EN)) {
+                       tmp |= PWR_AV_EN;
+                       value[0] = (u8) tmp;
+                       value[1] = (u8) (tmp >> 8);
+                       value[2] = (u8) (tmp >> 16);
+                       value[3] = (u8) (tmp >> 24);
+                       status =
+                           cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
+                                                  PWR_CTL_EN, value, 4);
+                       msleep(PWR_SLEEP_INTERVAL);
+               }
+               if (!(tmp & PWR_ISO_EN)) {
+                       tmp |= PWR_ISO_EN;
+                       value[0] = (u8) tmp;
+                       value[1] = (u8) (tmp >> 8);
+                       value[2] = (u8) (tmp >> 16);
+                       value[3] = (u8) (tmp >> 24);
+                       status =
+                           cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
+                                                  PWR_CTL_EN, value, 4);
+                       msleep(PWR_SLEEP_INTERVAL);
+               }
+
+               tmp |= POLARIS_AVMODE_DIGITAL | I2C_DEMOD_EN;
+               value[0] = (u8) tmp;
+               value[1] = (u8) (tmp >> 8);
+               value[2] = (u8) (tmp >> 16);
+               value[3] = (u8) (tmp >> 24);
+               status =
+                   cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN,
+                                          value, 4);
+               msleep(PWR_SLEEP_INTERVAL);
+
+               if (!(tmp & PWR_DEMOD_EN)) {
+                       tmp |= PWR_DEMOD_EN;
+                       value[0] = (u8) tmp;
+                       value[1] = (u8) (tmp >> 8);
+                       value[2] = (u8) (tmp >> 16);
+                       value[3] = (u8) (tmp >> 24);
+                       status =
+                           cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
+                                                  PWR_CTL_EN, value, 4);
+                       msleep(PWR_SLEEP_INTERVAL);
+               }
+
+               if ((dev->model == CX231XX_BOARD_CNXT_RDE_250) ||
+                   (dev->model == CX231XX_BOARD_CNXT_RDU_250)) {
+
+                       /* tuner path to channel 1 from port 3 */
+                       cx231xx_enable_i2c_for_tuner(dev, I2C_3);
+
+                       if (dev->cx231xx_reset_analog_tuner)
+                               dev->cx231xx_reset_analog_tuner(dev);
+               }
+               break;
+
+       default:
+               break;
+       }
+
+       msleep(PWR_SLEEP_INTERVAL);
+
+       /* For power saving, only enable Pwr_resetout_n when digital TV is selected. */
+       if (mode == POLARIS_AVMODE_DIGITAL) {
+               tmp |= PWR_RESETOUT_EN;
+               value[0] = (u8) tmp;
+               value[1] = (u8) (tmp >> 8);
+               value[2] = (u8) (tmp >> 16);
+               value[3] = (u8) (tmp >> 24);
+               status =
+                   cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN,
+                                          value, 4);
+               msleep(PWR_SLEEP_INTERVAL);
+       }
+
+       /* update power control for colibri */
+       status = cx231xx_colibri_update_power_control(dev, mode);
+
+       /* update power control for flatiron */
+       status = cx231xx_flatiron_update_power_control(dev, mode);
+
+       status =
+           cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, 4);
+       cx231xx_info
+           (" The data of PWR_CTL_EN register 0x74=0x%0x,0x%0x,0x%0x,0x%0x\n",
+            value[0], value[1], value[2], value[3]);
+
+       return status;
 }
 
 int cx231xx_power_suspend(struct cx231xx *dev)
 {
-    u8 value[4] ={0,0,0,0};
-    u32 tmp = 0;
-    int status = 0;
+       u8 value[4] = { 0, 0, 0, 0 };
+       u32 tmp = 0;
+       int status = 0;
 
-    status = cx231xx_read_ctrl_reg(dev,VRT_GET_REGISTER, PWR_CTL_EN, value, 4);
-    if(status > 0)
-        return status;
+       status =
+           cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, 4);
+       if (status > 0)
+               return status;
 
-    tmp = *((u32 *)value);
-    tmp &= (~PWR_MODE_MASK);
+       tmp = *((u32 *) value);
+       tmp &= (~PWR_MODE_MASK);
 
-    value[0]=(u8)tmp;
-    value[1]=(u8)(tmp>>8);
-    value[2]=(u8)(tmp>>16);
-    value[3]=(u8)(tmp>>24);
-    status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4);
+       value[0] = (u8) tmp;
+       value[1] = (u8) (tmp >> 8);
+       value[2] = (u8) (tmp >> 16);
+       value[3] = (u8) (tmp >> 24);
+       status =
+           cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN, value, 4);
 
-    return status;
+       return status;
 }
 
-
 /*************************************************************************************
  *                      S T R E A M    C O N T R O L   functions                     *
  *************************************************************************************/
 int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask)
 {
-       u8  value[4] = {0x0, 0x0, 0x0, 0x0};
-    u32 tmp =0;
-    int status = 0;
+       u8 value[4] = { 0x0, 0x0, 0x0, 0x0 };
+       u32 tmp = 0;
+       int status = 0;
 
-    cx231xx_info("cx231xx_start_stream():: ep_mask = %x\n", ep_mask);
-    status = cx231xx_read_ctrl_reg(dev,VRT_GET_REGISTER, EP_MODE_SET,value,4);
-    if(status < 0)
-        return status;
+       cx231xx_info("cx231xx_start_stream():: ep_mask = %x\n", ep_mask);
+       status =
+           cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, value, 4);
+       if (status < 0)
+               return status;
 
-    tmp = *((u32 *)value);
-    tmp |= ep_mask;
-    value[0]=(u8) tmp;
-    value[1]=(u8)(tmp>>8);
-    value[2]=(u8)(tmp>>16);
-    value[3]=(u8)(tmp>>24);
+       tmp = *((u32 *) value);
+       tmp |= ep_mask;
+       value[0] = (u8) tmp;
+       value[1] = (u8) (tmp >> 8);
+       value[2] = (u8) (tmp >> 16);
+       value[3] = (u8) (tmp >> 24);
 
-    status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, EP_MODE_SET,value,4);
+       status =
+           cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, EP_MODE_SET, value,
+                                  4);
 
-    return status;
+       return status;
 }
 
 int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask)
 {
-    u8  value[4] = {0x0, 0x0, 0x0, 0x0};
-    u32 tmp =0;
-    int status = 0;
+       u8 value[4] = { 0x0, 0x0, 0x0, 0x0 };
+       u32 tmp = 0;
+       int status = 0;
 
-    cx231xx_info("cx231xx_stop_stream():: ep_mask = %x\n", ep_mask);
-    status = cx231xx_read_ctrl_reg(dev,VRT_GET_REGISTER, EP_MODE_SET,value,4);
-    if(status < 0)
-        return status;
+       cx231xx_info("cx231xx_stop_stream():: ep_mask = %x\n", ep_mask);
+       status =
+           cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, value, 4);
+       if (status < 0)
+               return status;
 
-    tmp = *((u32 *)value);
-    tmp&= (~ep_mask);
-    value[0]=(u8) tmp;
-    value[1]=(u8)(tmp>>8);
-    value[2]=(u8)(tmp>>16);
-    value[3]=(u8)(tmp>>24);
+       tmp = *((u32 *) value);
+       tmp &= (~ep_mask);
+       value[0] = (u8) tmp;
+       value[1] = (u8) (tmp >> 8);
+       value[2] = (u8) (tmp >> 16);
+       value[3] = (u8) (tmp >> 24);
 
-    status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, EP_MODE_SET,value,4);
+       status =
+           cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, EP_MODE_SET, value,
+                                  4);
 
-    return status;
+       return status;
 }
 
 int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type)
 {
-    int status = 0;
-
-    if(dev->udev->speed == USB_SPEED_HIGH)
-    {
-        switch(media_type)
-        {
-            case 81: /* audio */
-                cx231xx_info("%s: Audio enter HANC\n",__func__);
-                status = cx231xx_mode_register(dev, TS_MODE_REG, 0x9300);
-                break;
-
-            case 2: /* vbi */
-                cx231xx_info("%s: set vanc registers\n",__func__);
-                status = cx231xx_mode_register(dev, TS_MODE_REG, 0x300);
-                break;
-
-            case 3: /* sliced cc */
-                cx231xx_info("%s: set hanc registers\n",__func__);
-                status = cx231xx_mode_register(dev, TS_MODE_REG, 0x1300);
-                break;
-
-            case 0: /* video */
-                cx231xx_info("%s: set video registers\n",__func__);
-                status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
-                break;
-
-            case 4: /* ts1 */
-                cx231xx_info("%s: set ts1 registers\n",__func__);
-                status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101);
-                status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400);
-                break;
-            case 6: /* ts1 parallel mode */
-                cx231xx_info("%s: set ts1 parrallel mode registers\n",__func__);
-                status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
-                status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400);
-                break;
-        }
-    }
-    else
-    {
-        status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101);
-    }
-
-    return status;
-}
-
+       int status = 0;
 
+       if (dev->udev->speed == USB_SPEED_HIGH) {
+               switch (media_type) {
+               case 81:        /* audio */
+                       cx231xx_info("%s: Audio enter HANC\n", __func__);
+                       status =
+                           cx231xx_mode_register(dev, TS_MODE_REG, 0x9300);
+                       break;
+
+               case 2: /* vbi */
+                       cx231xx_info("%s: set vanc registers\n", __func__);
+                       status = cx231xx_mode_register(dev, TS_MODE_REG, 0x300);
+                       break;
+
+               case 3: /* sliced cc */
+                       cx231xx_info("%s: set hanc registers\n", __func__);
+                       status =
+                           cx231xx_mode_register(dev, TS_MODE_REG, 0x1300);
+                       break;
+
+               case 0: /* video */
+                       cx231xx_info("%s: set video registers\n", __func__);
+                       status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
+                       break;
+
+               case 4: /* ts1 */
+                       cx231xx_info("%s: set ts1 registers\n", __func__);
+                       status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101);
+                       status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400);
+                       break;
+               case 6: /* ts1 parallel mode */
+                       cx231xx_info("%s: set ts1 parrallel mode registers\n",
+                                    __func__);
+                       status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
+                       status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400);
+                       break;
+               }
+       } else {
+               status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101);
+       }
 
+       return status;
+}
 
 int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type)
 {
        int rc;
-    u32 ep_mask = -1;
-    PPCB_CONFIG pcb_config;
-
-    /* get EP for media type */
-    pcb_config  = &dev->current_pcb_config;
-
-    if(pcb_config->config_num==1)
-    {
-        switch (media_type)
-        {
-            case 0:                     /* Video */
-                ep_mask =ENABLE_EP4;    /* ep4  [00:1000] */
-                break;
-            case 1:                     /* Audio */
-                ep_mask =ENABLE_EP3;    /* ep3  [00:0100] */
-                break;
-            case 2:                     /* Vbi */
-                ep_mask = ENABLE_EP5;   /* ep5 [01:0000] */
-                break;
-            case 3:                     /* Sliced_cc */
-                ep_mask = ENABLE_EP6;   /* ep6 [10:0000] */
-                break;
-            case 4:                     /* ts1 */
-            case 6:                     /* ts1 parallel mode */
-                ep_mask = ENABLE_EP1;   /* ep1 [00:0001] */
-                break;
-            case 5:                     /* ts2 */
-                ep_mask = ENABLE_EP2;   /* ep2 [00:0010] */
-                break;
-            }
-
-    }
-    else if(pcb_config->config_num>1)
-    {
-        switch (media_type)
-        {
-            case 0:                     /* Video */
-                ep_mask = ENABLE_EP4;   /* ep4  [00:1000] */
-                break;
-            case 1:                     /* Audio */
-                ep_mask = ENABLE_EP3;   /* ep3  [00:0100] */
-                break;
-            case 2:                     /* Vbi */
-                ep_mask = ENABLE_EP5;   /* ep5 [01:0000] */
-                break;
-            case 3:                     /* Sliced_cc */
-                ep_mask = ENABLE_EP6;   /* ep6 [10:0000] */
-                break;
-            case 4:                     /* ts1 */
-            case 6:                     /* ts1 parallel mode */
-                ep_mask = ENABLE_EP1;   /* ep1 [00:0001] */
-                break;
-            case 5:                     /* ts2 */
-                ep_mask = ENABLE_EP2;   /* ep2 [00:0010] */
-                break;
-            }
-
-    }
-
-    if(start) {
-        rc = cx231xx_initialize_stream_xfer(dev, media_type);
-
-        if(rc < 0) {
-            return rc;
-        }
-
-        /* enable video capture */
-        if(ep_mask > 0 )
-            rc = cx231xx_start_stream(dev, ep_mask);
-    }
-    else {
-        /* disable video capture */
-        if(ep_mask > 0 )
-            rc = cx231xx_stop_stream(dev, ep_mask);
-    }
-
-    if (dev->mode == CX231XX_ANALOG_MODE){
-        /* do any in Analog mode */
-    }
-    else {
-        /* do any in digital mode */
-    }
+       u32 ep_mask = -1;
+       PPCB_CONFIG pcb_config;
+
+       /* get EP for media type */
+       pcb_config = &dev->current_pcb_config;
+
+       if (pcb_config->config_num == 1) {
+               switch (media_type) {
+               case 0: /* Video */
+                       ep_mask = ENABLE_EP4;   /* ep4  [00:1000] */
+                       break;
+               case 1: /* Audio */
+                       ep_mask = ENABLE_EP3;   /* ep3  [00:0100] */
+                       break;
+               case 2: /* Vbi */
+                       ep_mask = ENABLE_EP5;   /* ep5 [01:0000] */
+                       break;
+               case 3: /* Sliced_cc */
+                       ep_mask = ENABLE_EP6;   /* ep6 [10:0000] */
+                       break;
+               case 4: /* ts1 */
+               case 6: /* ts1 parallel mode */
+                       ep_mask = ENABLE_EP1;   /* ep1 [00:0001] */
+                       break;
+               case 5: /* ts2 */
+                       ep_mask = ENABLE_EP2;   /* ep2 [00:0010] */
+                       break;
+               }
+
+       } else if (pcb_config->config_num > 1) {
+               switch (media_type) {
+               case 0: /* Video */
+                       ep_mask = ENABLE_EP4;   /* ep4  [00:1000] */
+                       break;
+               case 1: /* Audio */
+                       ep_mask = ENABLE_EP3;   /* ep3  [00:0100] */
+                       break;
+               case 2: /* Vbi */
+                       ep_mask = ENABLE_EP5;   /* ep5 [01:0000] */
+                       break;
+               case 3: /* Sliced_cc */
+                       ep_mask = ENABLE_EP6;   /* ep6 [10:0000] */
+                       break;
+               case 4: /* ts1 */
+               case 6: /* ts1 parallel mode */
+                       ep_mask = ENABLE_EP1;   /* ep1 [00:0001] */
+                       break;
+               case 5: /* ts2 */
+                       ep_mask = ENABLE_EP2;   /* ep2 [00:0010] */
+                       break;
+               }
+
+       }
+
+       if (start) {
+               rc = cx231xx_initialize_stream_xfer(dev, media_type);
+
+               if (rc < 0) {
+                       return rc;
+               }
+
+               /* enable video capture */
+               if (ep_mask > 0)
+                       rc = cx231xx_start_stream(dev, ep_mask);
+       } else {
+               /* disable video capture */
+               if (ep_mask > 0)
+                       rc = cx231xx_stop_stream(dev, ep_mask);
+       }
+
+       if (dev->mode == CX231XX_ANALOG_MODE) {
+               /* do any in Analog mode */
+       } else {
+               /* do any in digital mode */
+       }
 
        return rc;
 }
-EXPORT_SYMBOL_GPL(cx231xx_capture_start);
 
+EXPORT_SYMBOL_GPL(cx231xx_capture_start);
 
 /************************************************************************************
 *                       G P I O   B I T control functions                           *
 *************************************************************************************/
-int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8* gpio_val)
+int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 * gpio_val)
 {
-    int status = 0;
+       int status = 0;
 
-    status = cx231xx_send_gpio_cmd(dev, gpio_bit, gpio_val, 4, 0, 0);
+       status = cx231xx_send_gpio_cmd(dev, gpio_bit, gpio_val, 4, 0, 0);
 
-    return status;
+       return status;
 }
 
-int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8* gpio_val)
+int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 * gpio_val)
 {
-    int status = 0;
+       int status = 0;
 
-    status = cx231xx_send_gpio_cmd(dev, gpio_bit, gpio_val, 4, 0, 1);
+       status = cx231xx_send_gpio_cmd(dev, gpio_bit, gpio_val, 4, 0, 1);
 
-    return status;
+       return status;
 }
 
 /*
@@ -1873,32 +2615,30 @@ int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8* gpio_val)
 *                      1 = Output direction
 */
 int cx231xx_set_gpio_direction(struct cx231xx *dev,
-        int    pin_number,
-        int    pin_value)
+                              int pin_number, int pin_value)
 {
        int status = 0;
-    u32 value = 0;
+       u32 value = 0;
 
-    /* Check for valid pin_number - if 32 , bail out */
-    if (pin_number >= 32) {
-        return -EINVAL;
-    }
+       /* Check for valid pin_number - if 32 , bail out */
+       if (pin_number >= 32) {
+               return -EINVAL;
+       }
 
-    if (pin_value == 0) {                           /* input */
-        value = dev->gpio_dir &(~(1<<pin_number)) ; /* clear */
-    } else {
-        value = dev->gpio_dir | (1<<pin_number) ;
-    }
+       if (pin_value == 0) {   /* input */
+               value = dev->gpio_dir & (~(1 << pin_number));   /* clear */
+       } else {
+               value = dev->gpio_dir | (1 << pin_number);
+       }
 
-       status = cx231xx_set_gpio_bit(dev, value, (u8*) & dev->gpio_val);
+       status = cx231xx_set_gpio_bit(dev, value, (u8 *) & dev->gpio_val);
 
-    /* cache the value for future */
+       /* cache the value for future */
        dev->gpio_dir = value;
 
-    return status;
+       return status;
 }
 
-
 /*
 * SetGpioPinLogicValue
 *      Sets the value of the GPIO pin to Logic high or low. The Pin under
@@ -1910,43 +2650,42 @@ int cx231xx_set_gpio_direction(struct cx231xx *dev,
 *                      0 = set it to 0
 *                      1 = set it to 1
 */
-int cx231xx_set_gpio_value(struct cx231xx *dev,
-        int    pin_number,
-        int    pin_value)
+int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value)
 {
-    int status = 0;
-    u32 value = 0;
-
-    /* Check for valid pin_number - if 0xFF , bail out */
-    if (pin_number >= 32)
-        return -EINVAL;
-
-    /* first do a sanity check - if the Pin is not output, make it output */
-    if ((dev->gpio_dir & (1<<pin_number)) == 0x00)
-    {
-        /* It was in input mode */
-        value = dev->gpio_dir | (1<<pin_number) ;
-        dev->gpio_dir = value;
-        status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+       int status = 0;
+       u32 value = 0;
+
+       /* Check for valid pin_number - if 0xFF , bail out */
+       if (pin_number >= 32)
+               return -EINVAL;
+
+       /* first do a sanity check - if the Pin is not output, make it output */
+       if ((dev->gpio_dir & (1 << pin_number)) == 0x00) {
+               /* It was in input mode */
+               value = dev->gpio_dir | (1 << pin_number);
+               dev->gpio_dir = value;
+               status =
+                   cx231xx_set_gpio_bit(dev, dev->gpio_dir,
+                                        (u8 *) & dev->gpio_val);
                value = 0;
-    }
+       }
 
-    if (pin_value == 0) {
-        value = dev->gpio_val & (~(1<<pin_number));
-    } else {
-        value = dev->gpio_val | (1<<pin_number);
-    }
+       if (pin_value == 0) {
+               value = dev->gpio_val & (~(1 << pin_number));
+       } else {
+               value = dev->gpio_val | (1 << pin_number);
+       }
 
-    /* store the value */
-    dev->gpio_val=value;
+       /* store the value */
+       dev->gpio_val = value;
 
-    /* toggle bit0 of GP_IO */
-    status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+       /* toggle bit0 of GP_IO */
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
 
-    return status;
+       return status;
 }
 
-
 /************************************************************************************
 *                          G P I O I2C related functions                            *
 *************************************************************************************/
@@ -1955,140 +2694,162 @@ int cx231xx_gpio_i2c_start(struct cx231xx *dev)
        int status = 0;
 
        /* set SCL to output 1 ; set SDA to output 1 */
-       dev->gpio_dir |= 1<< dev->board.tuner_scl_gpio;
-       dev->gpio_dir |= 1<<dev->board.tuner_sda_gpio;
-       dev->gpio_val |= 1<<dev->board.tuner_scl_gpio;
-       dev->gpio_val |= 1<<dev->board.tuner_sda_gpio;
-
-    status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
-    if(status < 0){
+       dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio;
+       dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio;
+       dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
+       dev->gpio_val |= 1 << dev->board.tuner_sda_gpio;
+
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
+       if (status < 0) {
                return -EINVAL;
        }
 
        /* set SCL to output 1; set SDA to output 0 */
-       dev->gpio_val |= 1<<dev->board.tuner_scl_gpio;
-       dev->gpio_val &= ~(1<<dev->board.tuner_sda_gpio);
+       dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
+       dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
 
-    status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
-    if(status < 0){
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
+       if (status < 0) {
                return -EINVAL;
        }
 
-       /* set SCL to output 0; set SDA to output 0      */
-       dev->gpio_val &= ~(1<<dev->board.tuner_scl_gpio);
-       dev->gpio_val &= ~(1<<dev->board.tuner_sda_gpio);
+       /* set SCL to output 0; set SDA to output 0      */
+       dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
+       dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
 
-    status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
-    if(status < 0){
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
+       if (status < 0) {
                return -EINVAL;
        }
 
        return status;
 }
 
-
 int cx231xx_gpio_i2c_end(struct cx231xx *dev)
 {
-    int status = 0;
+       int status = 0;
 
-       /* set SCL to output 0; set SDA to output 0      */
-       dev->gpio_dir |= 1<<dev->board.tuner_scl_gpio;
-       dev->gpio_dir |= 1<<dev->board.tuner_sda_gpio;
+       /* set SCL to output 0; set SDA to output 0      */
+       dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio;
+       dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio;
 
-       dev->gpio_val &= ~(1<<dev->board.tuner_scl_gpio);
-       dev->gpio_val &= ~(1<<dev->board.tuner_sda_gpio);
+       dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
+       dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
 
-    status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
-    if(status < 0){
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
+       if (status < 0) {
                return -EINVAL;
        }
 
-       /* set SCL to output 1; set SDA to output 0      */
-       dev->gpio_val |= 1<<dev->board.tuner_scl_gpio;
-       dev->gpio_val &= ~(1<<dev->board.tuner_sda_gpio);
+       /* set SCL to output 1; set SDA to output 0      */
+       dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
+       dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
 
-       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
-    if(status < 0){
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
+       if (status < 0) {
                return -EINVAL;
        }
 
        /* set SCL to input ,release SCL cable control
           set SDA to input ,release SDA cable control */
-       dev->gpio_dir &= ~(1<<dev->board.tuner_scl_gpio);
-       dev->gpio_dir &= ~(1<<dev->board.tuner_sda_gpio);
+       dev->gpio_dir &= ~(1 << dev->board.tuner_scl_gpio);
+       dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio);
 
-    status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
-    if(status < 0){
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
+       if (status < 0) {
                return -EINVAL;
        }
        return status;
 }
 
-
 int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data)
 {
-       int  status = 0;
-    u8 i;
+       int status = 0;
+       u8 i;
 
        /* set SCL to output ; set SDA to output */
-       dev->gpio_dir |= 1<<dev->board.tuner_scl_gpio;
-       dev->gpio_dir |= 1<<dev->board.tuner_sda_gpio;
-
-       for(i = 0;i<8;i++) {
-               if(((data<<i) & 0x80) == 0) {
-                       /* set SCL to output 0; set SDA to output 0     */
-                       dev->gpio_val  &= ~(1<<dev->board.tuner_scl_gpio);
-                       dev->gpio_val &= ~(1<<dev->board.tuner_sda_gpio);
-                       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
-
-                       /* set SCL to output 1; set SDA to output 0     */
-                       dev->gpio_val  |= 1<<dev->board.tuner_scl_gpio;
-                       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
-
-                       /* set SCL to output 0; set SDA to output 0     */
-                       dev->gpio_val  &= ~(1<<dev->board.tuner_scl_gpio);
-                       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+       dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio;
+       dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio;
+
+       for (i = 0; i < 8; i++) {
+               if (((data << i) & 0x80) == 0) {
+                       /* set SCL to output 0; set SDA to output 0     */
+                       dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
+                       dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
+                       status =
+                           cx231xx_set_gpio_bit(dev, dev->gpio_dir,
+                                                (u8 *) & dev->gpio_val);
+
+                       /* set SCL to output 1; set SDA to output 0     */
+                       dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
+                       status =
+                           cx231xx_set_gpio_bit(dev, dev->gpio_dir,
+                                                (u8 *) & dev->gpio_val);
+
+                       /* set SCL to output 0; set SDA to output 0     */
+                       dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
+                       status =
+                           cx231xx_set_gpio_bit(dev, dev->gpio_dir,
+                                                (u8 *) & dev->gpio_val);
                } else {
-                       /* set SCL to output 0; set SDA to output 1     */
-                       dev->gpio_val  &= ~(1<<dev->board.tuner_scl_gpio);
-                       dev->gpio_val |= 1<<dev->board.tuner_sda_gpio;
-                       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
-
-                       /* set SCL to output 1; set SDA to output 1     */
-                       dev->gpio_val  |= 1<<dev->board.tuner_scl_gpio;
-                       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
-
-                       /* set SCL to output 0; set SDA to output 1     */
-                       dev->gpio_val  &= ~(1<<dev->board.tuner_scl_gpio);
-                       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
-        }
+                       /* set SCL to output 0; set SDA to output 1     */
+                       dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
+                       dev->gpio_val |= 1 << dev->board.tuner_sda_gpio;
+                       status =
+                           cx231xx_set_gpio_bit(dev, dev->gpio_dir,
+                                                (u8 *) & dev->gpio_val);
+
+                       /* set SCL to output 1; set SDA to output 1     */
+                       dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
+                       status =
+                           cx231xx_set_gpio_bit(dev, dev->gpio_dir,
+                                                (u8 *) & dev->gpio_val);
+
+                       /* set SCL to output 0; set SDA to output 1     */
+                       dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
+                       status =
+                           cx231xx_set_gpio_bit(dev, dev->gpio_dir,
+                                                (u8 *) & dev->gpio_val);
+               }
        }
        return status;
 }
 
-int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf)
+int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 * buf)
 {
        u8 value = 0;
-       int  status = 0;
-       u32 gpio_logic_value =0;
-    u8 i;
+       int status = 0;
+       u32 gpio_logic_value = 0;
+       u8 i;
 
        /* read byte */
-    for(i=0;i<8;i++) {      /* send write I2c addr */
+       for (i = 0; i < 8; i++) {       /* send write I2c addr */
 
                /* set SCL to output 0; set SDA to input */
-               dev->gpio_val  &= ~(1<<dev->board.tuner_scl_gpio);
-               status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+               dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
+               status =
+                   cx231xx_set_gpio_bit(dev, dev->gpio_dir,
+                                        (u8 *) & dev->gpio_val);
 
                /* set SCL to output 1; set SDA to input */
-               dev->gpio_val  |= 1<<dev->board.tuner_scl_gpio;
-               status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+               dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
+               status =
+                   cx231xx_set_gpio_bit(dev, dev->gpio_dir,
+                                        (u8 *) & dev->gpio_val);
 
                /* get SDA data bit */
                gpio_logic_value = dev->gpio_val;
-               status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
-               if((dev->gpio_val & (1<<dev->board.tuner_sda_gpio)) != 0) {
-                       value |= (1<<(8-i-1));
+               status =
+                   cx231xx_get_gpio_bit(dev, dev->gpio_dir,
+                                        (u8 *) & dev->gpio_val);
+               if ((dev->gpio_val & (1 << dev->board.tuner_sda_gpio)) != 0) {
+                       value |= (1 << (8 - i - 1));
                }
 
                dev->gpio_val = gpio_logic_value;
@@ -2096,146 +2857,160 @@ int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf)
 
        /* set SCL to output 0,finish the read latest SCL signal.
           !!!set SDA to input,never to modify SDA direction at the same times */
-       dev->gpio_val  &= ~(1<<dev->board.tuner_scl_gpio);
-       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+       dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
 
-    /* store the value */
-    *buf = value & 0xff;
+       /* store the value */
+       *buf = value & 0xff;
 
        return status;
 }
 
 int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev)
 {
-       int  status = 0;
+       int status = 0;
        u32 gpio_logic_value = 0;
-    int nCnt=10;
-    int nInit=nCnt;
+       int nCnt = 10;
+       int nInit = nCnt;
 
        /* clock stretch; set SCL to input; set SDA to input; get SCL value till SCL = 1 */
-       dev->gpio_dir &= ~(1<<dev->board.tuner_sda_gpio);
-       dev->gpio_dir &= ~(1<<dev->board.tuner_scl_gpio);
+       dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio);
+       dev->gpio_dir &= ~(1 << dev->board.tuner_scl_gpio);
 
        gpio_logic_value = dev->gpio_val;
-       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
 
-    do{
+       do {
                msleep(2);
-               status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
-        nCnt--;
-       }while(((dev->gpio_val & (1<<dev->board.tuner_scl_gpio)) == 0) && (nCnt>0));
-
-    if(nCnt==0) {
-        cx231xx_info("No ACK after %d msec for clock stretch. GPIO I2C operation failed!",nInit*10);
-    }
+               status =
+                   cx231xx_get_gpio_bit(dev, dev->gpio_dir,
+                                        (u8 *) & dev->gpio_val);
+               nCnt--;
+       } while (((dev->gpio_val & (1 << dev->board.tuner_scl_gpio)) == 0)
+                && (nCnt > 0));
+
+       if (nCnt == 0) {
+               cx231xx_info
+                   ("No ACK after %d msec for clock stretch. GPIO I2C operation failed!",
+                    nInit * 10);
+       }
 
        /* readAck
           throuth clock stretch ,slave has given a SCL signal,so the SDA data can be directly read.  */
-       status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+       status =
+           cx231xx_get_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
 
-       if((dev->gpio_val & 1<< dev->board.tuner_sda_gpio) == 0){
+       if ((dev->gpio_val & 1 << dev->board.tuner_sda_gpio) == 0) {
                dev->gpio_val = gpio_logic_value;
-               dev->gpio_val &= ~(1<< dev->board.tuner_sda_gpio);
+               dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
                status = 0;
        } else {
                dev->gpio_val = gpio_logic_value;
-               dev->gpio_val |= (1<< dev->board.tuner_sda_gpio);
+               dev->gpio_val |= (1 << dev->board.tuner_sda_gpio);
        }
 
        /* read SDA end, set the SCL to output 0, after this operation, SDA direction can be changed. */
        dev->gpio_val = gpio_logic_value;
-       dev->gpio_dir |= (1<<dev->board.tuner_scl_gpio);
-       dev->gpio_val  &= ~(1<<dev->board.tuner_scl_gpio);
-       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+       dev->gpio_dir |= (1 << dev->board.tuner_scl_gpio);
+       dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
 
        return status;
 }
 
-
 int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev)
 {
-       int  status = 0;
+       int status = 0;
 
        /* set SDA to ouput */
-       dev->gpio_dir |= 1<<dev->board.tuner_sda_gpio;
-       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+       dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio;
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
 
        /* set SCL = 0 (output); set SDA = 0 (output) */
-       dev->gpio_val &= ~(1<<dev->board.tuner_sda_gpio);
-       dev->gpio_val  &= ~(1<<dev->board.tuner_scl_gpio);
-       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+       dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
+       dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
 
        /* set SCL = 1 (output); set SDA = 0 (output) */
-       dev->gpio_val  |= 1<<dev->board.tuner_scl_gpio;
-       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+       dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
 
        /* set SCL = 0 (output); set SDA = 0 (output) */
-       dev->gpio_val  &= ~(1<<dev->board.tuner_scl_gpio);
-       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+       dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
 
        /* set SDA to input,and then the slave will read data from SDA. */
-       dev->gpio_dir  &= ~(1<<dev->board.tuner_sda_gpio);
-       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+       dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio);
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
 
        return status;
 }
 
 int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev)
 {
-       int  status = 0;
+       int status = 0;
 
        /* set scl to output ; set sda to input */
-       dev->gpio_dir |= 1<<dev->board.tuner_scl_gpio;
-       dev->gpio_dir &= ~(1<<dev->board.tuner_sda_gpio);
-       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+       dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio;
+       dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio);
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
 
        /* set scl to output 0; set sda to input */
-       dev->gpio_val  &= ~(1<<dev->board.tuner_scl_gpio);
-       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+       dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
 
        /* set scl to output 1; set sda to input */
-       dev->gpio_val  |= 1<<dev->board.tuner_scl_gpio;
-       status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val);
+       dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
+       status =
+           cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
 
        return status;
 }
 
-
-
 /************************************************************************************
 *                          G P I O I2C related functions                            *
 *************************************************************************************/
 /* cx231xx_gpio_i2c_read
  * Function to read data from gpio based I2C interface
  */
-int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf ,u8 len)
+int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 * buf, u8 len)
 {
-       int  status = 0;
-    int i = 0;
+       int status = 0;
+       int i = 0;
 
-    /* get the lock */
+       /* get the lock */
        mutex_lock(&dev->gpio_i2c_lock);
 
        /* start */
        status = cx231xx_gpio_i2c_start(dev);
 
        /* write dev_addr */
-       status = cx231xx_gpio_i2c_write_byte(dev, (dev_addr << 1) +1);
+       status = cx231xx_gpio_i2c_write_byte(dev, (dev_addr << 1) + 1);
 
        /* readAck */
        status = cx231xx_gpio_i2c_read_ack(dev);
 
-    /* read data */
-    for(i = 0; i < len; i++ ) {
-        /* read data */
-        buf[i] = 0;
-           status = cx231xx_gpio_i2c_read_byte(dev, & buf[i]);
+       /* read data */
+       for (i = 0; i < len; i++) {
+               /* read data */
+               buf[i] = 0;
+               status = cx231xx_gpio_i2c_read_byte(dev, &buf[i]);
 
-        if( (i+1) != len) {
-               /* only do write ack if we more length */
-               status = cx231xx_gpio_i2c_write_ack(dev);
-        }
-    }
+               if ((i + 1) != len) {
+                       /* only do write ack if we more length */
+                       status = cx231xx_gpio_i2c_write_ack(dev);
+               }
+       }
 
        /* write NAK - inform reads are complete */
        status = cx231xx_gpio_i2c_write_nak(dev);
@@ -2249,14 +3024,13 @@ int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf ,u8 len)
        return status;
 }
 
-
 /* cx231xx_gpio_i2c_write
  * Function to write data to gpio based I2C interface
  */
-int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf ,u8 len)
+int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 * buf, u8 len)
 {
-       int  status = 0;
-       int i=0;
+       int status = 0;
+       int i = 0;
 
        /* get the lock */
        mutex_lock(&dev->gpio_i2c_lock);
@@ -2268,17 +3042,17 @@ int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf ,u8 len)
        status = cx231xx_gpio_i2c_write_byte(dev, dev_addr << 1);
 
        /* read Ack */
-    status = cx231xx_gpio_i2c_read_ack(dev);
+       status = cx231xx_gpio_i2c_read_ack(dev);
 
-    for(i = 0; i < len; i++ ) {
+       for (i = 0; i < len; i++) {
                /* Write data */
-        status = cx231xx_gpio_i2c_write_byte(dev, buf[i]);
+               status = cx231xx_gpio_i2c_write_byte(dev, buf[i]);
 
-           /* read Ack */
-        status = cx231xx_gpio_i2c_read_ack(dev);
-    }
+               /* read Ack */
+               status = cx231xx_gpio_i2c_read_ack(dev);
+       }
 
-    /* write End */
+       /* write End */
        status = cx231xx_gpio_i2c_end(dev);
 
        /* release the lock */
@@ -2286,4 +3060,3 @@ int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf ,u8 len)
 
        return 0;
 }
-
index c567e5a..a1f6ed6 100644 (file)
@@ -2,7 +2,7 @@
    cx231xx-cards.c - driver for Conexant Cx23100/101/102 USB video capture devices
 
    Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
-        Based on em28xx driver
+       Based on em28xx driver
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
@@ -50,131 +50,151 @@ static unsigned long cx231xx_devused;
  */
 
 static struct cx231xx_reg_seq RDE250_XCV_TUNER[] = {
-    { 0x03, 0x01, 10 },
-    { 0x03, 0x00, 30 },
-    { 0x03, 0x01, 10 },
-    {   -1,   -1, -1 },
+       {0x03, 0x01, 10},
+       {0x03, 0x00, 30},
+       {0x03, 0x01, 10},
+       {-1, -1, -1},
 };
 
-
-
 /*
  *  Board definitions
  */
 struct cx231xx_board cx231xx_boards[] = {
 
        [CX231XX_BOARD_UNKNOWN] = {
-               .name          = "Unknown CX231xx video grabber",
-               .tuner_type    = TUNER_ABSENT,
-        .input        = { {
-                       .type     = CX231XX_VMUX_TELEVISION,
-                       .vmux     = CX231XX_VIN_3_1,
-                       .amux     = CX231XX_AMUX_VIDEO,
-                       .gpio     = 0,
-               }, {
-                       .type     = CX231XX_VMUX_COMPOSITE1,
-                       .vmux     = CX231XX_VIN_2_1,
-                       .amux     = CX231XX_AMUX_LINE_IN,
-                       .gpio     = 0,
-               }, {
-                       .type     = CX231XX_VMUX_SVIDEO,
-                       .vmux     = CX231XX_VIN_1_1 | (CX231XX_VIN_1_2 << 8 ) |
-                                           CX25840_SVIDEO_ON,
-                       .amux     = CX231XX_AMUX_LINE_IN,
-                       .gpio     = 0,
-               } },
-       },
+                                  .name = "Unknown CX231xx video grabber",
+                                  .tuner_type = TUNER_ABSENT,
+                                  .input = {{
+                                             .type = CX231XX_VMUX_TELEVISION,
+                                             .vmux = CX231XX_VIN_3_1,
+                                             .amux = CX231XX_AMUX_VIDEO,
+                                             .gpio = 0,
+                                             }, {
+                                                 .type =
+                                                 CX231XX_VMUX_COMPOSITE1,
+                                                 .vmux = CX231XX_VIN_2_1,
+                                                 .amux = CX231XX_AMUX_LINE_IN,
+                                                 .gpio = 0,
+                                                 }, {
+                                                     .type =
+                                                     CX231XX_VMUX_SVIDEO,
+                                                     .vmux =
+                                                     CX231XX_VIN_1_1 |
+                                                     (CX231XX_VIN_1_2 << 8) |
+                                                     CX25840_SVIDEO_ON,
+                                                     .amux =
+                                                     CX231XX_AMUX_LINE_IN,
+                                                     .gpio = 0,
+                                                     }},
+                                  },
 
        [CX231XX_BOARD_CNXT_RDE_250] = {
-               .name         = "Conexant Hybrid TV - RDE250",
-               .valid        = CX231XX_BOARD_VALIDATED,
-               .tuner_type   = TUNER_XC5000,
-        .tuner_addr   = 0x61,
-               .tuner_gpio   = RDE250_XCV_TUNER,
-        .tuner_sif_gpio = 0x05,
-               .tuner_scl_gpio = 0x1a,
-        .tuner_sda_gpio = 0x1b,
-        .decoder      = CX231XX_AVDECODER,
-        .demod_xfer_mode                = 0,
-        .ctl_pin_status_mask            = 0xFFFFFFC4,
-        .agc_analog_digital_select_gpio = 0x0c,
-        .gpio_pin_status_mask           = 0x4001000,
-        .tuner_i2c_master               = 1,
-        .demod_i2c_master               = 2,
-               .has_dvb      = 1,
-        .demod_addr   = 0x02,
-        .norm         = V4L2_STD_PAL,
-
-               .input        = { {
-                       .type     = CX231XX_VMUX_TELEVISION,
-                       .vmux     = CX231XX_VIN_3_1,
-                       .amux     = CX231XX_AMUX_VIDEO,
-                       .gpio     = 0,
-               }, {
-                       .type     = CX231XX_VMUX_COMPOSITE1,
-                       .vmux     = CX231XX_VIN_2_1,
-                       .amux     = CX231XX_AMUX_LINE_IN,
-                       .gpio     = 0,
-               }, {
-                       .type     = CX231XX_VMUX_SVIDEO,
-                       .vmux     = CX231XX_VIN_1_1 | (CX231XX_VIN_1_2 << 8 ) |
-                                           CX25840_SVIDEO_ON,
-                       .amux     = CX231XX_AMUX_LINE_IN,
-                       .gpio     = 0,
-               } },
-       },
-
-    [CX231XX_BOARD_CNXT_RDU_250] = {
-               .name         = "Conexant Hybrid TV - RDU250",
-               .valid        = CX231XX_BOARD_VALIDATED,
-               .tuner_type   = TUNER_XC5000,
-        .tuner_addr   = 0x61,
-               .tuner_gpio   = RDE250_XCV_TUNER,
-        .tuner_sif_gpio = 0x05,
-               .tuner_scl_gpio = 0x1a,
-        .tuner_sda_gpio = 0x1b,
-        .decoder      = CX231XX_AVDECODER,
-        .demod_xfer_mode                = 0,
-        .ctl_pin_status_mask            = 0xFFFFFFC4,
-        .agc_analog_digital_select_gpio = 0x0c,
-        .gpio_pin_status_mask           = 0x4001000,
-        .tuner_i2c_master               = 1,
-        .demod_i2c_master               = 2,
-               .has_dvb      = 1,
-        .demod_addr   = 0x32,
-        .norm         = V4L2_STD_NTSC,
-
-               .input        = { {
-                       .type     = CX231XX_VMUX_TELEVISION,
-                       .vmux     = CX231XX_VIN_3_1,
-                       .amux     = CX231XX_AMUX_VIDEO,
-                       .gpio     = 0,
-               }, {
-                       .type     = CX231XX_VMUX_COMPOSITE1,
-                       .vmux     = CX231XX_VIN_2_1,
-                       .amux     = CX231XX_AMUX_LINE_IN,
-                       .gpio     = 0,
-               }, {
-                       .type     = CX231XX_VMUX_SVIDEO,
-                       .vmux     = CX231XX_VIN_1_1 | (CX231XX_VIN_1_2 << 8 ) |
-                                           CX25840_SVIDEO_ON,
-                       .amux     = CX231XX_AMUX_LINE_IN,
-                       .gpio     = 0,
-               } },
-       },
+                                       .name = "Conexant Hybrid TV - RDE250",
+                                       .valid = CX231XX_BOARD_VALIDATED,
+                                       .tuner_type = TUNER_XC5000,
+                                       .tuner_addr = 0x61,
+                                       .tuner_gpio = RDE250_XCV_TUNER,
+                                       .tuner_sif_gpio = 0x05,
+                                       .tuner_scl_gpio = 0x1a,
+                                       .tuner_sda_gpio = 0x1b,
+                                       .decoder = CX231XX_AVDECODER,
+                                       .demod_xfer_mode = 0,
+                                       .ctl_pin_status_mask = 0xFFFFFFC4,
+                                       .agc_analog_digital_select_gpio = 0x0c,
+                                       .gpio_pin_status_mask = 0x4001000,
+                                       .tuner_i2c_master = 1,
+                                       .demod_i2c_master = 2,
+                                       .has_dvb = 1,
+                                       .demod_addr = 0x02,
+                                       .norm = V4L2_STD_PAL,
+
+                                       .input = {{
+                                                  .type =
+                                                  CX231XX_VMUX_TELEVISION,
+                                                  .vmux = CX231XX_VIN_3_1,
+                                                  .amux = CX231XX_AMUX_VIDEO,
+                                                  .gpio = 0,
+                                                  }, {
+                                                      .type =
+                                                      CX231XX_VMUX_COMPOSITE1,
+                                                      .vmux = CX231XX_VIN_2_1,
+                                                      .amux =
+                                                      CX231XX_AMUX_LINE_IN,
+                                                      .gpio = 0,
+                                                      }, {
+                                                          .type =
+                                                          CX231XX_VMUX_SVIDEO,
+                                                          .vmux =
+                                                          CX231XX_VIN_1_1 |
+                                                          (CX231XX_VIN_1_2 <<
+                                                           8) |
+                                                          CX25840_SVIDEO_ON,
+                                                          .amux =
+                                                          CX231XX_AMUX_LINE_IN,
+                                                          .gpio = 0,
+                                                          }},
+                                       },
+
+       [CX231XX_BOARD_CNXT_RDU_250] = {
+                                       .name = "Conexant Hybrid TV - RDU250",
+                                       .valid = CX231XX_BOARD_VALIDATED,
+                                       .tuner_type = TUNER_XC5000,
+                                       .tuner_addr = 0x61,
+                                       .tuner_gpio = RDE250_XCV_TUNER,
+                                       .tuner_sif_gpio = 0x05,
+                                       .tuner_scl_gpio = 0x1a,
+                                       .tuner_sda_gpio = 0x1b,
+                                       .decoder = CX231XX_AVDECODER,
+                                       .demod_xfer_mode = 0,
+                                       .ctl_pin_status_mask = 0xFFFFFFC4,
+                                       .agc_analog_digital_select_gpio = 0x0c,
+                                       .gpio_pin_status_mask = 0x4001000,
+                                       .tuner_i2c_master = 1,
+                                       .demod_i2c_master = 2,
+                                       .has_dvb = 1,
+                                       .demod_addr = 0x32,
+                                       .norm = V4L2_STD_NTSC,
+
+                                       .input = {{
+                                                  .type =
+                                                  CX231XX_VMUX_TELEVISION,
+                                                  .vmux = CX231XX_VIN_3_1,
+                                                  .amux = CX231XX_AMUX_VIDEO,
+                                                  .gpio = 0,
+                                                  }, {
+                                                      .type =
+                                                      CX231XX_VMUX_COMPOSITE1,
+                                                      .vmux = CX231XX_VIN_2_1,
+                                                      .amux =
+                                                      CX231XX_AMUX_LINE_IN,
+                                                      .gpio = 0,
+                                                      }, {
+                                                          .type =
+                                                          CX231XX_VMUX_SVIDEO,
+                                                          .vmux =
+                                                          CX231XX_VIN_1_1 |
+                                                          (CX231XX_VIN_1_2 <<
+                                                           8) |
+                                                          CX25840_SVIDEO_ON,
+                                                          .amux =
+                                                          CX231XX_AMUX_LINE_IN,
+                                                          .gpio = 0,
+                                                          }},
+                                       },
 };
 const unsigned int cx231xx_bcount = ARRAY_SIZE(cx231xx_boards);
 
 /* table of devices that work with this driver */
-struct usb_device_id cx231xx_id_table [] = {
-       { USB_DEVICE(0x0572, 0x58A0),
-                       .driver_info = CX231XX_BOARD_UNKNOWN },
-       { USB_DEVICE(0x0572, 0x58A2),
-                       .driver_info = CX231XX_BOARD_CNXT_RDE_250 },
-    { USB_DEVICE(0x0572, 0x5A3C),
-                       .driver_info = CX231XX_BOARD_CNXT_RDU_250 },
-       { },
+struct usb_device_id cx231xx_id_table[] = {
+       {USB_DEVICE(0x0572, 0x58A0),
+        .driver_info = CX231XX_BOARD_UNKNOWN},
+       {USB_DEVICE(0x0572, 0x58A2),
+        .driver_info = CX231XX_BOARD_CNXT_RDE_250},
+       {USB_DEVICE(0x0572, 0x5A3C),
+        .driver_info = CX231XX_BOARD_CNXT_RDU_250},
+       {},
 };
+
 MODULE_DEVICE_TABLE(usb, cx231xx_id_table);
 
 /* cx231xx_tuner_callback
@@ -186,21 +206,26 @@ int cx231xx_tuner_callback(void *ptr, int component, int command, int arg)
        int rc = 0;
        struct cx231xx *dev = ptr;
 
-    if (dev->tuner_type == TUNER_XC5000) {
-        if (command == XC5000_TUNER_RESET) {
-            cx231xx_info("Tuner Call back : RESET : command %d : tuner type %d \n",
-                command, dev->tuner_type);
-
-            cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,1);
-            msleep(10);
-            cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,0);
-            msleep(330);
-            cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,1);
-            msleep(10);
-        }
-    }
+       if (dev->tuner_type == TUNER_XC5000) {
+               if (command == XC5000_TUNER_RESET) {
+                       cx231xx_info
+                           ("Tuner Call back : RESET : command %d : tuner type %d \n",
+                            command, dev->tuner_type);
+
+                       cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,
+                                              1);
+                       msleep(10);
+                       cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,
+                                              0);
+                       msleep(330);
+                       cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,
+                                              1);
+                       msleep(10);
+               }
+       }
        return rc;
 }
+
 EXPORT_SYMBOL_GPL(cx231xx_tuner_callback);
 
 static void inline cx231xx_set_model(struct cx231xx *dev)
@@ -217,34 +242,34 @@ void cx231xx_pre_card_setup(struct cx231xx *dev)
        cx231xx_set_model(dev);
 
        cx231xx_info("Identified as %s (card=%d)\n",
-                   dev->board.name, dev->model);
+                    dev->board.name, dev->model);
 
        /* Do card specific if any */
        switch (dev->model) {
-        case CX231XX_BOARD_CNXT_RDE_250:
-            /* do card specific GPIO settings if required */
-            cx231xx_info("Precard: Board is Conexnat RDE 250\n");
-            /* set the direction for GPIO pins */
-            cx231xx_set_gpio_direction(dev, dev->board.tuner_gpio->bit,1);
-            cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,1);
-            cx231xx_set_gpio_direction(dev, dev->board.tuner_sif_gpio,1);
-            break;
-        case CX231XX_BOARD_CNXT_RDU_250:
-            /* do card specific GPIO settings if required */
-            cx231xx_info("Precard: Board is Conexnat RDU 250\n");
-            /* set the direction for GPIO pins */
-            cx231xx_set_gpio_direction(dev, dev->board.tuner_gpio->bit,1);
-            cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,1);
-            cx231xx_set_gpio_direction(dev, dev->board.tuner_sif_gpio,1);
-            break;
+       case CX231XX_BOARD_CNXT_RDE_250:
+               /* do card specific GPIO settings if required */
+               cx231xx_info("Precard: Board is Conexnat RDE 250\n");
+               /* set the direction for GPIO pins */
+               cx231xx_set_gpio_direction(dev, dev->board.tuner_gpio->bit, 1);
+               cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit, 1);
+               cx231xx_set_gpio_direction(dev, dev->board.tuner_sif_gpio, 1);
+               break;
+       case CX231XX_BOARD_CNXT_RDU_250:
+               /* do card specific GPIO settings if required */
+               cx231xx_info("Precard: Board is Conexnat RDU 250\n");
+               /* set the direction for GPIO pins */
+               cx231xx_set_gpio_direction(dev, dev->board.tuner_gpio->bit, 1);
+               cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit, 1);
+               cx231xx_set_gpio_direction(dev, dev->board.tuner_sif_gpio, 1);
+               break;
        }
 
        /* request some modules if any required */
 
-    /* reset the Tuner */
+       /* reset the Tuner */
        cx231xx_gpio_set(dev, dev->board.tuner_gpio);
 
-    /* set the mode to Analog mode initially */
+       /* set the mode to Analog mode initially */
        cx231xx_set_mode(dev, CX231XX_ANALOG_MODE);
 
        /* Unlock device */
@@ -256,8 +281,8 @@ void cx231xx_pre_card_setup(struct cx231xx *dev)
 
 static void cx231xx_config_tuner(struct cx231xx *dev)
 {
-       struct tuner_setup           tun_setup;
-       struct v4l2_frequency        f;
+       struct tuner_setup tun_setup;
+       struct v4l2_frequency f;
 
        if (dev->tuner_type == TUNER_ABSENT)
                return;
@@ -267,26 +292,28 @@ static void cx231xx_config_tuner(struct cx231xx *dev)
        tun_setup.addr = dev->tuner_addr;
        tun_setup.tuner_callback = cx231xx_tuner_callback;
 
-       cx231xx_i2c_call_clients(&dev->i2c_bus[1], TUNER_SET_TYPE_ADDR, &tun_setup);
+       cx231xx_i2c_call_clients(&dev->i2c_bus[1], TUNER_SET_TYPE_ADDR,
+                                &tun_setup);
 #if 0
-    if (tun_setup.type == TUNER_XC5000) {
+       if (tun_setup.type == TUNER_XC5000) {
                static struct xc2028_ctrl ctrl = {
                        .fname = XC5000_DEFAULT_FIRMWARE,
                        .max_len = 64,
-            .demod = 0;
+                       .demod = 0;
                };
                struct v4l2_priv_tun_config cfg = {
                        .tuner = dev->tuner_type,
                        .priv = &ctrl,
                };
-               cx231xx_i2c_call_clients(&dev->i2c_bus[1], TUNER_SET_CONFIG, &cfg);
+               cx231xx_i2c_call_clients(&dev->i2c_bus[1], TUNER_SET_CONFIG,
+                                        &cfg);
        }
 #endif
 
        /* configure tuner */
        f.tuner = 0;
        f.type = V4L2_TUNER_ANALOG_TV;
-       f.frequency = 9076;     /* just a magic number */
+       f.frequency = 9076;     /* just a magic number */
        dev->ctl_freq = f.frequency;
        cx231xx_i2c_call_clients(&dev->i2c_bus[1], VIDIOC_S_FREQUENCY, &f);
 }
@@ -298,18 +325,18 @@ void cx231xx_set_ir(struct cx231xx *dev, struct IR_i2c *ir)
 {
        if (disable_ir) {
                ir->get_key = NULL;
-               return ;
+               return;
        }
 
        /* detect & configure */
        switch (dev->model) {
 
-        case CX231XX_BOARD_CNXT_RDE_250:
-            break;
-        case CX231XX_BOARD_CNXT_RDU_250:
-            break;
-        default:
-                   break;
+       case CX231XX_BOARD_CNXT_RDE_250:
+               break;
+       case CX231XX_BOARD_CNXT_RDU_250:
+               break;
+       default:
+               break;
        }
 }
 
@@ -321,58 +348,55 @@ void cx231xx_card_setup(struct cx231xx *dev)
        if (cx231xx_boards[dev->model].tuner_addr)
                dev->tuner_addr = cx231xx_boards[dev->model].tuner_addr;
 
-    cx231xx_info(": tuner type %d, tuner address %d \n",
-        dev->tuner_type, dev->tuner_addr);
+       cx231xx_info(": tuner type %d, tuner address %d \n",
+                    dev->tuner_type, dev->tuner_addr);
 
        /* Do card specific if any */
        switch (dev->model) {
-        case CX231XX_BOARD_CNXT_RDE_250:
-            /* do card specific GPIO settings if required */
-            cx231xx_info("Board is Conexnat RDE 250\n");
-            break;
-        case CX231XX_BOARD_CNXT_RDU_250:
-            /* do card specific GPIO settings if required */
-            cx231xx_info("Board is Conexnat RDU 250\n");
-            break;
+       case CX231XX_BOARD_CNXT_RDE_250:
+               /* do card specific GPIO settings if required */
+               cx231xx_info("Board is Conexnat RDE 250\n");
+               break;
+       case CX231XX_BOARD_CNXT_RDU_250:
+               /* do card specific GPIO settings if required */
+               cx231xx_info("Board is Conexnat RDU 250\n");
+               break;
        }
 
        if (dev->board.valid == CX231XX_BOARD_NOT_VALIDATED) {
                cx231xx_errdev("\n\n");
                cx231xx_errdev("The support for this board weren't "
-                             "valid yet.\n");
+                              "valid yet.\n");
                cx231xx_errdev("Please send a report of having this working\n");
                cx231xx_errdev("not to V4L mailing list (and/or to other "
-                               "addresses)\n\n");
+                              "addresses)\n\n");
        }
 
-
        /* request some modules */
-    if (dev->board.decoder == CX231XX_AVDECODER) {
-        cx231xx_info(": Requesting cx25840 module\n");
+       if (dev->board.decoder == CX231XX_AVDECODER) {
+               cx231xx_info(": Requesting cx25840 module\n");
                request_module("cx25840");
-    }
+       }
 #if 0
-    if (dev->board.tuner_type != TUNER_ABSENT) {
-        cx231xx_info(": Requesting Tuner module\n");
+       if (dev->board.tuner_type != TUNER_ABSENT) {
+               cx231xx_info(": Requesting Tuner module\n");
                request_module("tuner");
-    }
+       }
 
        cx231xx_config_tuner(dev);
 
-    /* TBD  IR will be added later */
+       /* TBD  IR will be added later */
        cx231xx_ir_init(dev);
 #endif
 }
 
-
-
 /*
  * cx231xx_config()
  * inits registers with sane defaults
  */
 int cx231xx_config(struct cx231xx *dev)
 {
-    /* TBD need to add cx231xx specific code */
+       /* TBD need to add cx231xx specific code */
        dev->mute = 1;          /* maybe not the right place... */
        dev->volume = 0x1f;
 
@@ -401,30 +425,29 @@ void cx231xx_config_i2c(struct cx231xx *dev)
 void cx231xx_release_resources(struct cx231xx *dev)
 {
 
-#if 0 /* TBD IR related  */
+#if 0          /* TBD IR related  */
        if (dev->ir)
                cx231xx_ir_fini(dev);
 #endif
 
        cx231xx_release_analog_resources(dev);
 
-    cx231xx_remove_from_devlist(dev);
+       cx231xx_remove_from_devlist(dev);
 
-    cx231xx_dev_uninit(dev);
+       cx231xx_dev_uninit(dev);
 
        usb_put_dev(dev->udev);
 
        /* Mark device as unused */
-       cx231xx_devused &= ~(1<<dev->devno);
+       cx231xx_devused &= ~(1 << dev->devno);
 }
 
-
 /*
  * cx231xx_init_dev()
  * allocates and inits the device structs, registers i2c bus and v4l device
  */
 static int cx231xx_init_dev(struct cx231xx **devhandle, struct usb_device *udev,
-                          int minor)
+                           int minor)
 {
        struct cx231xx *dev = *devhandle;
        int retval = -ENOMEM;
@@ -434,26 +457,26 @@ static int cx231xx_init_dev(struct cx231xx **devhandle, struct usb_device *udev,
        dev->udev = udev;
        mutex_init(&dev->lock);
        mutex_init(&dev->ctrl_urb_lock);
-    mutex_init(&dev->gpio_i2c_lock);
+       mutex_init(&dev->gpio_i2c_lock);
 
-    spin_lock_init(&dev->video_mode.slock);
-    spin_lock_init(&dev->vbi_mode.slock);
-    spin_lock_init(&dev->sliced_cc_mode.slock);
+       spin_lock_init(&dev->video_mode.slock);
+       spin_lock_init(&dev->vbi_mode.slock);
+       spin_lock_init(&dev->sliced_cc_mode.slock);
 
        init_waitqueue_head(&dev->open);
        init_waitqueue_head(&dev->wait_frame);
        init_waitqueue_head(&dev->wait_stream);
 
-    dev->cx231xx_read_ctrl_reg = cx231xx_read_ctrl_reg;
-    dev->cx231xx_write_ctrl_reg = cx231xx_write_ctrl_reg;
-    dev->cx231xx_send_usb_command = cx231xx_send_usb_command;
-    dev->cx231xx_gpio_i2c_read = cx231xx_gpio_i2c_read;
-    dev->cx231xx_gpio_i2c_write = cx231xx_gpio_i2c_write;
+       dev->cx231xx_read_ctrl_reg = cx231xx_read_ctrl_reg;
+       dev->cx231xx_write_ctrl_reg = cx231xx_write_ctrl_reg;
+       dev->cx231xx_send_usb_command = cx231xx_send_usb_command;
+       dev->cx231xx_gpio_i2c_read = cx231xx_gpio_i2c_read;
+       dev->cx231xx_gpio_i2c_write = cx231xx_gpio_i2c_write;
 
-    /* Query cx231xx to find what pcb config it is related to */
-    initialize_cx231xx(dev);
+       /* Query cx231xx to find what pcb config it is related to */
+       initialize_cx231xx(dev);
 
-    /* Cx231xx pre card setup */
+       /* Cx231xx pre card setup */
        cx231xx_pre_card_setup(dev);
 
        errCode = cx231xx_config(dev);
@@ -462,14 +485,14 @@ static int cx231xx_init_dev(struct cx231xx **devhandle, struct usb_device *udev,
                return -ENOMEM;
        }
 
-    /* set default norm */
+       /* set default norm */
        dev->norm = dev->board.norm;
 
        /* register i2c bus */
        errCode = cx231xx_dev_init(dev);
        if (errCode < 0) {
                cx231xx_errdev("%s: cx231xx_i2c_register - errCode [%d]!\n",
-                       __func__, errCode);
+                              __func__, errCode);
                return errCode;
        }
 
@@ -493,7 +516,7 @@ static int cx231xx_init_dev(struct cx231xx **devhandle, struct usb_device *udev,
        errCode = cx231xx_config(dev);
        if (errCode < 0) {
                cx231xx_errdev("%s: cx231xx_config - errCode [%d]!\n",
-                       __func__, errCode);
+                              __func__, errCode);
                return errCode;
        }
 
@@ -501,13 +524,13 @@ static int cx231xx_init_dev(struct cx231xx **devhandle, struct usb_device *udev,
        INIT_LIST_HEAD(&dev->video_mode.vidq.active);
        INIT_LIST_HEAD(&dev->video_mode.vidq.queued);
 
-    /* init vbi dma queues */
+       /* init vbi dma queues */
        INIT_LIST_HEAD(&dev->vbi_mode.vidq.active);
        INIT_LIST_HEAD(&dev->vbi_mode.vidq.queued);
 
        /* Reset other chips required if they are tied up with GPIO pins */
 
-    cx231xx_add_into_devlist(dev);
+       cx231xx_add_into_devlist(dev);
 
        retval = cx231xx_register_analog_devices(dev);
        if (retval < 0) {
@@ -519,7 +542,7 @@ static int cx231xx_init_dev(struct cx231xx **devhandle, struct usb_device *udev,
 
        return 0;
 
-fail_reg_devices:
+      fail_reg_devices:
        mutex_unlock(&dev->lock);
        return retval;
 }
@@ -528,8 +551,7 @@ fail_reg_devices:
 static void request_module_async(struct work_struct *work)
 {
        struct cx231xx *dev = container_of(work,
-                            struct cx231xx, request_module_wk);
-
+                                          struct cx231xx, request_module_wk);
 
        if (dev->has_alsa_audio)
                request_module("cx231xx-alsa");
@@ -548,130 +570,130 @@ static void request_modules(struct cx231xx *dev)
 #define request_modules(dev)
 #endif /* CONFIG_MODULES */
 
-
-
 /*
  * cx231xx_usb_probe()
  * checks for supported devices
  */
 static int cx231xx_usb_probe(struct usb_interface *interface,
-                           const struct usb_device_id *id)
+                            const struct usb_device_id *id)
 {
        struct usb_device *udev;
        struct usb_interface *uif;
        struct cx231xx *dev = NULL;
        int retval = -ENODEV;
-    int nr, ifnum;
+       int nr, ifnum;
        int i, isoc_pipe = 0;
        char *speed;
        char descr[255] = "";
-    struct usb_interface *lif = NULL;
-    int skip_interface = 0;
-    struct usb_interface_assoc_descriptor *assoc_desc;
+       struct usb_interface *lif = NULL;
+       int skip_interface = 0;
+       struct usb_interface_assoc_descriptor *assoc_desc;
 
        udev = usb_get_dev(interface_to_usbdev(interface));
        ifnum = interface->altsetting[0].desc.bInterfaceNumber;
 
-    cx231xx_info(": Interface Number %d\n", ifnum);
-
-    /* Interface number 0 - IR interface */
-    if(ifnum == 0 ){
-        /* Check to see next free device and mark as used */
-           nr = find_first_zero_bit(&cx231xx_devused, CX231XX_MAXBOARDS);
-           cx231xx_devused |= 1<<nr;
-
-        if (nr >= CX231XX_MAXBOARDS) {
-                   cx231xx_info(": Supports only %i cx231xx boards.\n",
-                                   CX231XX_MAXBOARDS);
-                   cx231xx_devused &= ~(1<<nr);
-                   return -ENOMEM;
-           }
-
-        /* allocate memory for our device state and initialize it */
-           dev = kzalloc(sizeof(*dev), GFP_KERNEL);
-           if (dev == NULL) {
-                   cx231xx_err(DRIVER_NAME ": out of memory!\n");
-                   cx231xx_devused &= ~(1<<nr);
-                   return -ENOMEM;
-           }
-
-           snprintf(dev->name, 29, "cx231xx #%d", nr);
-           dev->devno = nr;
-           dev->model = id->driver_info;
-           dev->video_mode.alt   = -1;
-        dev->interface_count++;
-
-        /* reset gpio dir and value */
-        dev->gpio_dir = 0;
-        dev->gpio_val = 0;
-        dev->xc_fw_load_done = 0;
+       cx231xx_info(": Interface Number %d\n", ifnum);
+
+       /* Interface number 0 - IR interface */
+       if (ifnum == 0) {
+               /* Check to see next free device and mark as used */
+               nr = find_first_zero_bit(&cx231xx_devused, CX231XX_MAXBOARDS);
+               cx231xx_devused |= 1 << nr;
+
+               if (nr >= CX231XX_MAXBOARDS) {
+                       cx231xx_info(": Supports only %i cx231xx boards.\n",
+                                    CX231XX_MAXBOARDS);
+                       cx231xx_devused &= ~(1 << nr);
+                       return -ENOMEM;
+               }
+
+               /* allocate memory for our device state and initialize it */
+               dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+               if (dev == NULL) {
+                       cx231xx_err(DRIVER_NAME ": out of memory!\n");
+                       cx231xx_devused &= ~(1 << nr);
+                       return -ENOMEM;
+               }
+
+               snprintf(dev->name, 29, "cx231xx #%d", nr);
+               dev->devno = nr;
+               dev->model = id->driver_info;
+               dev->video_mode.alt = -1;
+               dev->interface_count++;
+
+               /* reset gpio dir and value */
+               dev->gpio_dir = 0;
+               dev->gpio_val = 0;
+               dev->xc_fw_load_done = 0;
                dev->has_alsa_audio = 1;
-        dev->power_mode = -1;
-
-        dev->vbi_or_sliced_cc_mode = 0; /* 0 - vbi ; 1 -sliced cc mode */
-
-        /* get maximum no.of IAD interfaces */
-        assoc_desc = udev->actconfig->intf_assoc[0];
-        dev->max_iad_interface_count  = assoc_desc->bInterfaceCount;
-        cx231xx_info(": Found IAD interface count %d\n", dev->max_iad_interface_count);
-
-        /* init CIR module TBD */
-
-        /* store the current interface */
-        lif = interface;
-
-    }
-    else if(ifnum == 1 ){
-
-        /* Get dev structure first */
-        dev = usb_get_intfdata(udev->actconfig->interface[0]);
-        if(dev == NULL){
-                   cx231xx_err(DRIVER_NAME ": out of first interface!\n");
-                   return -ENODEV;
-           }
-
-        /* store the interface 0 back */
-        lif = udev->actconfig->interface[0];
-
-        /* increment interface count */
-        dev->interface_count++;
-
-        /* get device number */
-        nr = dev->devno;
-
-        assoc_desc = udev->actconfig->intf_assoc[0];
-        if(assoc_desc->bFirstInterface == ifnum){
-            cx231xx_info(": Found IAD interface match: AV Descriptor Start!! \n");
-        } else {
-            cx231xx_err(DRIVER_NAME " Not found matching interface\n");
-            return -ENODEV;
-        }
-
-    }
-    else if(ifnum >= 2) {
-        /* Get dev structure first */
-        dev = usb_get_intfdata(udev->actconfig->interface[0]);
-        if(dev == NULL){
-                   cx231xx_err(DRIVER_NAME ": out of first interface!\n");
-                   return -ENODEV;
-           }
-
-        /* store the interface 0 back */
-        lif = udev->actconfig->interface[0];
-
-        /* increment interface count */
-        dev->interface_count++;
-
-        /* get device number */
-        nr = dev->devno;
-
-        /* set skip interface */
-        if((dev->interface_count -1) != dev->max_iad_interface_count )
-            skip_interface = 1; /* set skipping */
-        else{
-            cx231xx_info(": Found IAD interface number match with AV Device number!! \n");
-        }
-    }
+               dev->power_mode = -1;
+
+               dev->vbi_or_sliced_cc_mode = 0; /* 0 - vbi ; 1 -sliced cc mode */
+
+               /* get maximum no.of IAD interfaces */
+               assoc_desc = udev->actconfig->intf_assoc[0];
+               dev->max_iad_interface_count = assoc_desc->bInterfaceCount;
+           &nbs