ARM: tegra: usb_phy: Fix remotewakeup resume code
Vinod Atyam [Thu, 26 Jul 2012 09:21:33 +0000 (14:21 +0530)]
1) After remote wakeup resume code is not waiting until
RESUME and SUSPEND bit cleared.  Instead it is waiting
for RESUME bit to get set. This is updated properly now.
2) During resume, no need to depend on port speed to
take HSIC in high speed.

Bug 1019619

Change-Id: I3d06255da65045bdf5c6a4deb10a3c6f96aef661
Signed-off-by: Vinod Atyam <vatyam@nvidia.com>
Reviewed-on: http://git-master/r/118582
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

arch/arm/mach-tegra/tegra3_usb_phy.c

index 171e2ec..b471663 100644 (file)
@@ -988,7 +988,8 @@ static int usb_phy_bringup_host_controller(struct tegra_usb_phy *phy)
                /* Program the field PTC based on the saved speed mode */
                val = readl(base + USB_PORTSC);
                val &= ~USB_PORTSC_PTC(~0);
-               if (phy->port_speed == USB_PHY_PORT_SPEED_HIGH)
+               if ((phy->port_speed == USB_PHY_PORT_SPEED_HIGH) ||
+                       (phy->pdata->phy_intf == TEGRA_USB_PHY_INTF_HSIC))
                        val |= USB_PORTSC_PTC(5);
                else if (phy->port_speed == USB_PHY_PORT_SPEED_FULL)
                        val |= USB_PORTSC_PTC(6);
@@ -2019,7 +2020,7 @@ static void uhsic_phy_restore_end(struct tegra_usb_phy *phy)
 
        unsigned long val;
        void __iomem *base = phy->regs;
-       int wait_time_us = 3000; /* FPR should be set by this time */
+       int wait_time_us = 25000; /* FPR should be set by this time */
 
        DBG("%s(%d)\n", __func__, __LINE__);
 
@@ -2035,7 +2036,8 @@ static void uhsic_phy_restore_end(struct tegra_usb_phy *phy)
                                return;
                        }
                        wait_time_us--;
-               } while (!(val & USB_PORTSC_RESUME));
+               } while (val & (USB_PORTSC_RESUME | USB_PORTSC_SUSP));
+
                /* wait for 25 ms to port resume complete */
                msleep(25);
                /* disable PMC master control */