arm: tegra: pcie: WAR to avoid hang on PCIe device
Jay Agarwal [Thu, 16 Aug 2012 12:38:12 +0000 (17:38 +0530)]
Setting DFPCI_RSPPASSPW bit in AFI_CONFIGURATION
register to avoid instant hang on CPU read/write
while gpu transfers are in progress.

Bug 1034443

Change-Id: I40c99588753b8b2cb2d418b54c6ac73f7b8ddc13
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/124037
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

arch/arm/mach-tegra/pcie.c

index eef215b..04d3a5d 100644 (file)
 
 #define AFI_CONFIGURATION                                              0xac
 #define AFI_CONFIGURATION_EN_FPCI                              (1 << 0)
+#define AFI_CONFIGURATION_DFPCI_RSPPASSPW                      (1 << 2)
 
 #define AFI_FPCI_ERROR_MASKS                                           0xb0
 
@@ -876,8 +877,11 @@ static void tegra_pcie_enable_controller(void)
        /* Take the PCIe interface module out of reset */
        tegra_periph_reset_deassert(tegra_pcie.pcie_xclk);
 
+       /* WAR avoid hang on CPU read/write while gpu transfers in progress */
+       val = afi_readl(AFI_CONFIGURATION) | AFI_CONFIGURATION_DFPCI_RSPPASSPW;
+
        /* Finally enable PCIe */
-       val = afi_readl(AFI_CONFIGURATION) | AFI_CONFIGURATION_EN_FPCI;
+       val |=  AFI_CONFIGURATION_EN_FPCI;
        afi_writel(val, AFI_CONFIGURATION);
 
        val = (AFI_INTR_EN_INI_SLVERR | AFI_INTR_EN_INI_DECERR |