Blackfin: SIC: cut down on IAR MMR reads a bit
Mike Frysinger [Thu, 22 Apr 2010 21:15:00 +0000 (21:15 +0000)]
Tweak the for loops that operate on the SIC IAR system MMRs to avoid
re-reading them multiple times in a row.  System MMRs are a little
slower to access, so avoid the penalty when possible.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

arch/blackfin/mach-common/ints-priority.c

index ce98871..1c8c4c7 100644 (file)
@@ -92,26 +92,29 @@ static void __init search_IAR(void)
 {
        unsigned ivg, irq_pos = 0;
        for (ivg = 0; ivg <= IVG13 - IVG7; ivg++) {
-               int irqn;
+               int irqN;
 
                ivg7_13[ivg].istop = ivg7_13[ivg].ifirst = &ivg_table[irq_pos];
 
-               for (irqn = 0; irqn < NR_PERI_INTS; irqn++) {
-                       int iar_shift = (irqn & 7) * 4;
-                               if (ivg == (0xf &
-#if defined(CONFIG_BF52x) || defined(CONFIG_BF538) \
-       || defined(CONFIG_BF539) || defined(CONFIG_BF51x)
-                            bfin_read32((unsigned long *)SIC_IAR0 +
-                                        ((irqn % 32) >> 3) + ((irqn / 32) *
-                                        ((SIC_IAR4 - SIC_IAR0) / 4))) >> iar_shift)) {
+               for (irqN = 0; irqN < NR_PERI_INTS; irqN += 4) {
+                       int irqn;
+                       u32 iar = bfin_read32((unsigned long *)SIC_IAR0 +
+#if defined(CONFIG_BF51x) || defined(CONFIG_BF52x) || \
+       defined(CONFIG_BF538) || defined(CONFIG_BF539)
+                               ((irqN % 32) >> 3) + ((irqN / 32) * ((SIC_IAR4 - SIC_IAR0) / 4))
 #else
-                            bfin_read32((unsigned long *)SIC_IAR0 +
-                                        (irqn >> 3)) >> iar_shift)) {
+                               (irqN >> 3)
 #endif
-                               ivg_table[irq_pos].irqno = IVG7 + irqn;
-                               ivg_table[irq_pos].isrflag = 1 << (irqn % 32);
-                               ivg7_13[ivg].istop++;
-                               irq_pos++;
+                               );
+
+                       for (irqn = irqN; irqn < irqN + 4; ++irqn) {
+                               int iar_shift = (irqn & 7) * 4;
+                               if (ivg == (0xf & (iar >> iar_shift))) {
+                                       ivg_table[irq_pos].irqno = IVG7 + irqn;
+                                       ivg_table[irq_pos].isrflag = 1 << (irqn % 32);
+                                       ivg7_13[ivg].istop++;
+                                       irq_pos++;
+                               }
                        }
                }
        }