arm: tegra: enterprise: Configure pmu int on active low
Laxman Dewangan [Tue, 21 Jun 2011 14:28:22 +0000 (19:28 +0530)]
The PMU generates interrupt as active low. So configuring the
Power management unit to have the active low interrupt from PMU_INT
pin.

bug 839238

Original-Change-Id: I69e5cfb756d3b9e39fe7515cf8126753800cda03
Reviewed-on: http://git-master/r/37670
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com>

Rebase-Id: R4e0d333cc9dc2186ecc8b651c127912964769ff9

arch/arm/mach-tegra/board-enterprise-power.c

index 8283d3c..b42940e 100644 (file)
@@ -37,6 +37,9 @@
 #include "pm.h"
 #include "wakeups-t3.h"
 
+#define PMC_CTRL               0x0
+#define PMC_CTRL_INTR_LOW      (1 << 17)
+
 /************************ TPS80031 based regulator ****************/
 static struct regulator_consumer_supply tps80031_vio_supply[] = {
        REGULATOR_SUPPLY("vio_1v8", NULL),
@@ -339,6 +342,15 @@ static int __init enterprise_gpio_switch_regulator_init(void)
 
 int __init enterprise_regulator_init(void)
 {
+       void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
+       u32 pmc_ctrl;
+
+       /* configure the power management controller to trigger PMU
+        * interrupts when low */
+
+       pmc_ctrl = readl(pmc + PMC_CTRL);
+       writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
+
        i2c_register_board_info(4, enterprise_regulators, 1);
        enterprise_gpio_switch_regulator_init();
        return 0;