ARM: tegra: clock: Remove Tegra3 initial pll_m refcount
Alex Frid [Tue, 25 Oct 2011 01:51:32 +0000 (18:51 -0700)]
Removed Tegra3 pll_m refcount from common and board initialization.
As a result pll_m is turned off when all client clocks are disabled.
Added pll_m disable/enable control via PMC registers - this one
actually works on Tegra3; kept clock register control in place, just
in case.

Originally implemented in dee91eaf47a7e6b392e9663170dcfdcdde73446c.

Bug 888476

Change-Id: Ifa70d25ce8d93abc12c741d3a51b32110db3f7dd
Reviewed-on: http://git-master/r/60129
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R8de74a2b14d06ef754ba043f07a95ad636924c65

arch/arm/mach-tegra/board-cardhu.c

index d078068..76e8cb6 100644 (file)
@@ -185,7 +185,7 @@ static inline void tegra_setup_bluesleep(void) { }
 
 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
        /* name         parent          rate            enabled */
-       { "pll_m",      NULL,           0,              true},
+       { "pll_m",      NULL,           0,              false},
        { "hda",        "pll_p",        108000000,      false},
        { "hda2codec_2x","pll_p",       48000000,       false},
        { "pwm",        "pll_p",        3187500,        false},