arm: tegra: dalmore: Enable one-shot sharp 25x16
Animesh Kishore [Thu, 22 Aug 2013 12:01:42 +0000 (17:01 +0530)]
Bug 1347805

Change-Id: I5e7bda240e07ab1e6e92de5061ba5031b273752b
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-on: http://git-master/r/261060
(cherry picked from commit 28271dac436ab11378248ee54b09c16951c2613c)
Reviewed-on: http://git-master/r/265489
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit

arch/arm/mach-tegra/panel-s-wqxga-10-1.c

index d2e3471..ecd6f9b 100644 (file)
 #define DSI_PANEL_RST_GPIO     TEGRA_GPIO_PH3
 #define DSI_PANEL_BL_PWM       TEGRA_GPIO_PH1
 
+#define CONTINUOUS_MODE 1
+
+#if CONTINUOUS_MODE
 #define DC_CTRL_MODE   TEGRA_DC_OUT_CONTINUOUS_MODE
+#else
+#define DC_CTRL_MODE   (TEGRA_DC_OUT_ONE_SHOT_MODE |\
+                       TEGRA_DC_OUT_ONE_SHOT_LP_MODE)
+#endif
 
 #define en_vdd_bl      TEGRA_GPIO_PG0
 #define lvds_en                TEGRA_GPIO_PG3
@@ -137,18 +144,26 @@ static struct tegra_dsi_out dsi_s_wqxga_10_1_pdata = {
 #endif
 
        .n_data_lanes = 8,
-       .video_burst_mode = TEGRA_DSI_VIDEO_NONE_BURST_MODE,
+
+#if DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE
+       .video_data_type = TEGRA_DSI_VIDEO_TYPE_COMMAND_MODE,
+       .ganged_type = TEGRA_DSI_GANGED_SYMMETRIC_LEFT_RIGHT,
+       .suspend_aggr = DSI_HOST_SUSPEND_LV2,
+#else
        .ganged_type = TEGRA_DSI_GANGED_SYMMETRIC_EVEN_ODD,
+       .video_data_type = TEGRA_DSI_VIDEO_TYPE_VIDEO_MODE,
+       .video_burst_mode = TEGRA_DSI_VIDEO_NONE_BURST_MODE,
+#endif
 
        .pixel_format = TEGRA_DSI_PIXEL_FORMAT_24BIT_P,
-       .refresh_rate = 60,
+       .refresh_rate = 62,
+       .rated_refresh_rate = 60,
        .virtual_channel = TEGRA_DSI_VIRTUAL_CHANNEL_0,
 
-       .dsi_instance = DSI_INSTANCE_0,
+       .te_polarity_low = true,
 
        .panel_reset = DSI_PANEL_RESET,
        .power_saving_suspend = true,
-       .video_data_type = TEGRA_DSI_VIDEO_TYPE_VIDEO_MODE,
        .video_clock_mode = TEGRA_DSI_VIDEO_CLOCK_TX_ONLY,
        .dsi_init_cmd = dsi_s_wqxga_10_1_init_cmd,
        .n_init_cmd = ARRAY_SIZE(dsi_s_wqxga_10_1_init_cmd),
@@ -394,7 +409,11 @@ static int dsi_s_wqxga_10_1_postsuspend(void)
 
 static struct tegra_dc_mode dsi_s_wqxga_10_1_modes[] = {
        {
-               .pclk = 268460000,
+#if DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE
+               .pclk = 292915280,
+#else
+               .pclk = 277412800,
+#endif
                .h_ref_to_sync = 4,
                .v_ref_to_sync = 1,
                .h_sync_width = 16,
@@ -403,7 +422,11 @@ static struct tegra_dc_mode dsi_s_wqxga_10_1_modes[] = {
                .v_back_porch = 33,
                .h_active = 2560,
                .v_active = 1600,
+#if DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE
+               .h_front_porch = 280,
+#else
                .h_front_porch = 128,
+#endif
                .v_front_porch = 10,
        },
 };