ARM: tegra: power: fix incorrect register usage
Jay Cheng [Thu, 8 Aug 2013 00:27:51 +0000 (20:27 -0400)]
r3 is timeout target for loop, so can't later be used to store
I2C_STATUS register value.

update loop_i2c_status_suspend subroutine sequence.

bug 1344148

Change-Id: I66c47699cae520ad3c1f39529317011bafc93ae1
Signed-off-by: Jay Cheng <jacheng@nvidia.com>
Reviewed-on: http://git-master/r/259389
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Karthik Ramakrishnan <karthikr@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>

arch/arm/mach-tegra/sleep-t3.S

index e3d5355..472cdf3 100644 (file)
@@ -490,8 +490,8 @@ loop_i2c_status_resume:
        cmp r3, r1
        beq lp1_voltset
 
-       ldr r3, [r4, #I2C_STATUS]
-       cmp r3, #0
+       ldr r8, [r4, #I2C_STATUS]
+       cmp r8, #0
        bne loop_i2c_status_resume
 
 lp1_voltskip_resume:
@@ -804,9 +804,9 @@ lp1_clocks_prepare:
        add r3, r2, r3
 loop_i2c_status_suspend:
        add r2, r2, #0xFA /* Check status every 250us */
+       wait_until r2, r7, r9
        cmp r3, r2
        beq lp1_volt_skip  /* Waited for 2ms, I2C transaction didn't take place */
-       wait_until r2, r7, r9
 
        ldr r0, [r1, #I2C_STATUS]
        cmp r0, #0