video: tegra: camera: set iso EMC clock
Jihoon Bang [Fri, 8 Mar 2013 00:20:35 +0000 (16:20 -0800)]
Take into account iso efficiency of 35% in T114/vi
until isomgr is enabled.

Bug 1231863
Bug 1246180

Change-Id: I1994d54e51ed81631d0411bec49ca90059ef693a
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/207352
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

drivers/video/tegra/camera/camera_clk.c

index e395020..7bbb73c 100644 (file)
@@ -109,15 +109,25 @@ int tegra_camera_clk_set_rate(struct tegra_camera *camera)
                         * When emc_clock is set through TEGRA_CAMERA_EMC_CLK,
                         * info->rate has peak memory bandwidth in Bps.
                         */
-                       unsigned long bw = info->rate >> 10;
+                       unsigned long bw = info->rate / 1000;
 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
                        int ret = 0;
 #endif
-                       clk_set_rate(clk, tegra_emc_bw_to_freq_req(bw) << 10);
 
-                       dev_dbg(camera->dev, "%s: bw=%lu, emc_clk=%d\n",
-                               __func__, bw,
-                               tegra_emc_bw_to_freq_req(bw) << 10);
+                       dev_dbg(camera->dev, "%s: bw=%lu\n",
+                               __func__, bw);
+
+#ifdef CONFIG_ARCH_TEGRA_11x_SOC
+                       /*
+                        * Take into account iso client efficiency here until
+                        * isomgr is alive. It's 35%.
+                        */
+                       clk_set_rate(clk,
+                       ((100*tegra_emc_bw_to_freq_req(bw)) / 35) * 1000);
+#else
+                       clk_set_rate(clk, tegra_emc_bw_to_freq_req(bw) * 1000);
+#endif
+
 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
                        /*
                         * There is no way to figure out what latency