agp/intel: Fix missed cached memory flags setting in i965_write_entry()
Chris Wilson [Tue, 14 Dec 2010 11:29:23 +0000 (11:29 +0000)]
This fixes regression from a6963596a13e62f8e65b1cf3403a330ff2db407c,
that missed to set cached memory type in GTT entry.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

drivers/char/agp/intel-gtt.c

index 16a2847..29ac6d4 100644 (file)
@@ -1192,12 +1192,19 @@ static void i9xx_chipset_flush(void)
                writel(1, intel_private.i9xx_flush_page);
 }
 
-static void i965_write_entry(dma_addr_t addr, unsigned int entry,
+static void i965_write_entry(dma_addr_t addr,
+                            unsigned int entry,
                             unsigned int flags)
 {
+       u32 pte_flags;
+
+       pte_flags = I810_PTE_VALID;
+       if (flags == AGP_USER_CACHED_MEMORY)
+               pte_flags |= I830_PTE_SYSTEM_CACHED;
+
        /* Shift high bits down */
        addr |= (addr >> 28) & 0xf0;
-       writel(addr | I810_PTE_VALID, intel_private.gtt + entry);
+       writel(addr | pte_flags, intel_private.gtt + entry);
 }
 
 static bool gen6_check_flags(unsigned int flags)