arm: tegra: cardhu: supporting hdmi
mohit singh [Mon, 31 Jan 2011 15:19:47 +0000 (20:19 +0530)]
Adding support for the hdmi and hot plugin for cardhu.

Bug 783375.

Original-Change-Id: I3d1b4cecfa422fc9da453870af677a5065b3c255
Reviewed-on: http://git-master/r/16878
Tested-by: Mohit Singh <mpsingh@nvidia.com>
Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com>
Original-Change-Id: I11bfd1464fb4eaab466cf91ff1b36c0654d0ef05

Rebase-Id: Rcac1db545449ea5ff632ed1c986c8b2681af7b4a

arch/arm/mach-tegra/board-cardhu-panel.c
arch/arm/mach-tegra/board-cardhu-pinmux.c [changed mode: 0755->0644]

index 31236e9..8df1d2d 100644 (file)
 
 #define cardhu_lvds_shutdown   TEGRA_GPIO_PL2
 #define cardhu_bl_enb          TEGRA_GPIO_PH2
+#define cardhu_hdmi_hpd                TEGRA_GPIO_PN7
+#define cardhu_hdmi_enb                TEGRA_GPIO_PT0
+
+static struct regulator *cardhu_hdmi_reg = NULL;
+static struct regulator *cardhu_hdmi_pll = NULL;
 
 static int cardhu_backlight_init(struct device *dev) {
        int ret;
@@ -108,6 +113,54 @@ static int cardhu_panel_disable(void)
        return 0;
 }
 
+static int cardhu_hdmi_enable(void)
+{
+       int ret;
+       gpio_set_value(cardhu_hdmi_enb, 1);
+       if (!cardhu_hdmi_reg) {
+               cardhu_hdmi_reg = regulator_get(NULL, "avdd_hdmi");
+               if (IS_ERR_OR_NULL(cardhu_hdmi_reg)) {
+                       pr_err("hdmi: couldn't get regulator avdd_hdmi\n");
+                       cardhu_hdmi_reg = NULL;
+                       return PTR_ERR(cardhu_hdmi_reg);
+               }
+       }
+       ret = regulator_enable(cardhu_hdmi_reg);
+       if (ret < 0) {
+               pr_err("hdmi: couldn't enable regulator avdd_hdmi\n");
+               return ret;
+       }
+       if (!cardhu_hdmi_pll) {
+               cardhu_hdmi_pll = regulator_get(NULL, "avdd_hdmi_pll");
+               if (IS_ERR_OR_NULL(cardhu_hdmi_pll)) {
+                       pr_err("hdmi: couldn't get regulator avdd_hdmi_pll\n");
+                       cardhu_hdmi_pll = NULL;
+                       regulator_put(cardhu_hdmi_reg);
+                       cardhu_hdmi_reg = NULL;
+                       return PTR_ERR(cardhu_hdmi_pll);
+               }
+       }
+       ret = regulator_enable(cardhu_hdmi_pll);
+       if (ret < 0) {
+               pr_err("hdmi: couldn't enable regulator avdd_hdmi_pll\n");
+               return ret;
+       }
+       return 0;
+}
+
+static int cardhu_hdmi_disable(void)
+{
+       gpio_set_value(cardhu_hdmi_enb, 0);
+
+       regulator_disable(cardhu_hdmi_reg);
+       regulator_put(cardhu_hdmi_reg);
+       cardhu_hdmi_reg = NULL;
+
+       regulator_disable(cardhu_hdmi_pll);
+       regulator_put(cardhu_hdmi_pll);
+       cardhu_hdmi_pll = NULL;
+       return 0;
+}
 static struct resource cardhu_disp1_resources[] = {
        {
                .name   = "irq",
@@ -129,6 +182,33 @@ static struct resource cardhu_disp1_resources[] = {
        },
 };
 
+static struct resource cardhu_disp2_resources[] = {
+       {
+               .name   = "irq",
+               .start  = INT_DISPLAY_B_GENERAL,
+               .end    = INT_DISPLAY_B_GENERAL,
+               .flags  = IORESOURCE_IRQ,
+       },
+       {
+               .name   = "regs",
+               .start  = TEGRA_DISPLAY2_BASE,
+               .end    = TEGRA_DISPLAY2_BASE + TEGRA_DISPLAY2_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               .name   = "fbmem",
+               .flags  = IORESOURCE_MEM,
+               .start  = 0,
+               .end    = 0,
+       },
+       {
+               .name   = "hdmi_regs",
+               .start  = TEGRA_HDMI_BASE,
+               .end    = TEGRA_HDMI_BASE + TEGRA_HDMI_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+};
+
 static struct tegra_dc_mode cardhu_panel_modes[] = {
        {
                /* 1366x768@62.3Hz */
@@ -153,6 +233,12 @@ static struct tegra_fb_data cardhu_fb_data = {
        .bits_per_pixel = 16,
 };
 
+static struct tegra_fb_data cardhu_hdmi_fb_data = {
+       .win            = 0,
+       .xres           = 1366,
+       .yres           = 768,
+       .bits_per_pixel = 16,
+};
 static struct tegra_dc_out cardhu_disp1_out = {
        .type           = TEGRA_DC_OUT_RGB,
 
@@ -166,12 +252,31 @@ static struct tegra_dc_out cardhu_disp1_out = {
        .disable        = cardhu_panel_disable,
 };
 
+static struct tegra_dc_out cardhu_disp2_out = {
+       .type           = TEGRA_DC_OUT_HDMI,
+       .flags          = TEGRA_DC_OUT_HOTPLUG_HIGH,
+
+       .dcc_bus        = 3,
+       .hotplug_gpio   = cardhu_hdmi_hpd,
+
+       .align          = TEGRA_DC_ALIGN_MSB,
+       .order          = TEGRA_DC_ORDER_RED_BLUE,
+
+       .enable         = cardhu_hdmi_enable,
+       .disable        = cardhu_hdmi_disable,
+};
 static struct tegra_dc_platform_data cardhu_disp1_pdata = {
        .flags          = TEGRA_DC_FLAG_ENABLED,
        .default_out    = &cardhu_disp1_out,
        .fb             = &cardhu_fb_data,
 };
 
+static struct tegra_dc_platform_data cardhu_disp2_pdata = {
+       .flags          = 0,
+       .default_out    = &cardhu_disp2_out,
+       .fb             = &cardhu_hdmi_fb_data,
+};
+
 static struct nvhost_device cardhu_disp1_device = {
        .name           = "tegradc",
        .id             = 0,
@@ -182,6 +287,16 @@ static struct nvhost_device cardhu_disp1_device = {
        },
 };
 
+static struct nvhost_device cardhu_disp2_device = {
+       .name           = "tegradc",
+       .id             = 1,
+       .resource       = cardhu_disp2_resources,
+       .num_resources  = ARRAY_SIZE(cardhu_disp2_resources),
+       .dev = {
+               .platform_data = &cardhu_disp2_pdata,
+       },
+};
+
 static struct nvmap_platform_carveout cardhu_carveouts[] = {
        [0] = {
                .name           = "iram",
@@ -228,6 +343,13 @@ int __init cardhu_panel_init(void)
        cardhu_carveouts[1].base = tegra_carveout_start;
        cardhu_carveouts[1].size = tegra_carveout_size;
 
+       tegra_gpio_enable(cardhu_hdmi_enb);
+       gpio_request(cardhu_hdmi_enb, "hdmi_5v_en");
+       gpio_direction_output(cardhu_hdmi_enb, 1);
+
+       tegra_gpio_enable(cardhu_hdmi_hpd);
+       gpio_request(cardhu_hdmi_hpd, "hdmi_hpd");
+       gpio_direction_input(cardhu_hdmi_hpd);
        err = platform_add_devices(cardhu_gfx_devices,
                                ARRAY_SIZE(cardhu_gfx_devices));
 
@@ -239,5 +361,11 @@ int __init cardhu_panel_init(void)
        if (!err)
                err = nvhost_device_register(&cardhu_disp1_device);
 
+       res = nvhost_get_resource_byname(&cardhu_disp2_device,
+                                        IORESOURCE_MEM, "fbmem");
+       res->start = tegra_fb2_start;
+       res->end = tegra_fb2_start + tegra_fb2_size - 1;
+       if (!err)
+               err = nvhost_device_register(&cardhu_disp2_device);
        return err;
 }
old mode 100755 (executable)
new mode 100644 (file)
index a9858ed..54eeabb
@@ -344,6 +344,7 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux[] = {
        DEFAULT_PINMUX(PEX_L2_RST_N,    PCIE,            NORMAL,    NORMAL,     OUTPUT),
        DEFAULT_PINMUX(PEX_L2_CLKREQ_N, PCIE,            NORMAL,    NORMAL,     INPUT),
        DEFAULT_PINMUX(HDMI_CEC,        CEC,             NORMAL,    NORMAL,     INPUT),
+       DEFAULT_PINMUX(HDMI_INT,        RSVD0,           NORMAL,    TRISTATE,   INPUT),
 
        /* Gpios */
        /* SDMMC1 WP gpio */