arm: tegra: usbphy: disable PLLU clock
Suresh Mangipudi [Wed, 1 Aug 2012 11:27:51 +0000 (16:27 +0530)]
Disable the MASTER_BLASTER clock for the null phy interface
when usb_bus is suspended.

Bug 992861

Change-Id: I86ff559148f9a128ee48bbea2564493f4286b420
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/120006
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

arch/arm/mach-tegra/tegra3_usb_phy.c

index 460bea1..b27c308 100644 (file)
@@ -2650,6 +2650,9 @@ static void ulpi_null_phy_close(struct tegra_usb_phy *phy)
 
 static int ulpi_null_phy_power_off(struct tegra_usb_phy *phy)
 {
+       unsigned int val;
+       void __iomem *base = phy->regs;
+
        DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
 
        if (!phy->phy_clk_on) {
@@ -2661,6 +2664,9 @@ static int ulpi_null_phy_power_off(struct tegra_usb_phy *phy)
        phy->phy_clk_on = false;
        phy->hw_accessible = false;
        ulpi_null_phy_set_tristate(true);
+       val = readl(base + ULPIS2S_CTRL);
+       val &= ~ULPIS2S_PLLU_MASTER_BLASTER60;
+       writel(val, base + ULPIS2S_CTRL);
        return 0;
 }