ARM: tegra11: clock: Don't preset EMC VREF bits
Alex Frid [Tue, 11 Dec 2012 01:13:35 +0000 (17:13 -0800)]
Don't preset VREF bits in XM2DQSPADCTRL3 registers during EMC clock
change procedure.

Change-Id: I3abb6d07d93632b61363e2b0f7de37e1d7312af0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/169874
(cherry picked from commit f44c79f042d50faca3da3e00add786ee29119624)
Reviewed-on: http://git-master/r/171625
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

arch/arm/mach-tegra/tegra11_emc.c

index 9050ee0..9d095bd 100644 (file)
@@ -404,8 +404,6 @@ static inline bool dqs_preset(const struct tegra11_emc_table *next_timing,
        } while (0)
 
        DQS_SET(XM2DQSPADCTRL2, VREF);
-       DQS_SET_TRIM(XM2DQSPADCTRL3, VREF, 0);
-       DQS_SET_TRIM(XM2DQSPADCTRL3, VREF, 1);
 
        return ret;
 }