mfd: asic3: add asic3_set_register common operation
Philipp Zabel [Fri, 5 Jun 2009 16:31:01 +0000 (18:31 +0200)]
Used to configure single bits of the SDHWCTRL_SDCONF and EXTCF_RESET/SELECT
registers needed for DS1WM, MMC/SDIO and PCMCIA functionality.

Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

drivers/mfd/asic3.c
include/linux/mfd/asic3.h

index 9e48545..ad3c591 100644 (file)
@@ -52,6 +52,21 @@ static inline u32 asic3_read_register(struct asic3 *asic,
                        (reg >> asic->bus_shift));
 }
 
+void asic3_set_register(struct asic3 *asic, u32 reg, u32 bits, bool set)
+{
+       unsigned long flags;
+       u32 val;
+
+       spin_lock_irqsave(&asic->lock, flags);
+       val = asic3_read_register(asic, reg);
+       if (set)
+               val |= bits;
+       else
+               val &= ~bits;
+       asic3_write_register(asic, reg, val);
+       spin_unlock_irqrestore(&asic->lock, flags);
+}
+
 /* IRQs */
 #define MAX_ASIC_ISR_LOOPS    20
 #define ASIC3_GPIO_BASE_INCR \
index 322cd6d..6b427ec 100644 (file)
@@ -227,8 +227,8 @@ struct asic3_platform_data {
 
 
 /* Basic control of the SD ASIC */
-#define ASIC3_SDHWCTRL_Base    0x0E00
-#define ASIC3_SDHWCTRL_SDConf    0x00
+#define ASIC3_SDHWCTRL_BASE     0x0E00
+#define ASIC3_SDHWCTRL_SDCONF     0x00
 
 #define ASIC3_SDHWCTRL_SUSPEND    (1 << 0)  /* 1=suspend all SD operations */
 #define ASIC3_SDHWCTRL_CLKSEL     (1 << 1)  /* 1=SDICK, 0=HCLK */
@@ -242,10 +242,10 @@ struct asic3_platform_data {
 /* SD card power supply ctrl 1=enable */
 #define ASIC3_SDHWCTRL_SDPWR      (1 << 6)
 
-#define ASIC3_EXTCF_Base               0x1100
+#define ASIC3_EXTCF_BASE        0x1100
 
-#define ASIC3_EXTCF_Select         0x00
-#define ASIC3_EXTCF_Reset          0x04
+#define ASIC3_EXTCF_SELECT        0x00
+#define ASIC3_EXTCF_RESET         0x04
 
 #define ASIC3_EXTCF_SMOD0               (1 << 0)  /* slot number of mode 0 */
 #define ASIC3_EXTCF_SMOD1               (1 << 1)  /* slot number of mode 1 */